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2019-03-07More doc tweaks.Prashanth Mundkur1-20/+13
2019-03-07More doc tweaks.Prashanth Mundkur4-0/+9
2019-03-07More doc updates.Prashanth Mundkur1-7/+7
2019-03-07More doc edits.Prashanth Mundkur2-7/+16
2019-03-07Minor doc edits.Prashanth Mundkur2-3/+4
2019-03-07Add sample OS images and update docs.Prashanth Mundkur8-57/+189
2019-03-06Minor clarification in readme.Prashanth Mundkur1-1/+1
2019-03-06Fix a missed case of reservation cancellation.Prashanth Mundkur1-1/+1
2019-03-06Fix RV32 reservation checks in C emulator. Also reduce default ram to 64MB.Prashanth Mundkur2-5/+15
2019-03-06Fix U-mode checks in check_Counteren()Xi Wang1-3/+3
Access to a counter in U-mode should cause an illegal instruction exception if the corresponding bit is clear in either mcounteren or scounteren. The current code checks scounteren only.
2019-03-05Some fixes to readme and makefile.Prashanth Mundkur2-11/+11
2019-03-05Fix a typo.Prashanth Mundkur1-1/+1
2019-03-05Correct capitalisation of Sv39/48 in pattern matchesBrian Campbell2-3/+3
2019-03-04Merge branch 'master' into rv32Prashanth Mundkur1-4/+3
2019-03-04Minor edit for consistency.Prashanth Mundkur1-5/+5
2019-03-04Fix missed RV32 check for shamt in sll/srl.Prashanth Mundkur1-5/+13
2019-03-04Enable pmpaddr0.Prashanth Mundkur1-2/+1
2019-03-04Update readme.Prashanth Mundkur1-5/+12
2019-03-03rmem does not need the -lem_sequential anymoreShaked Flur1-4/+2
2019-03-01Add compliance test signature support for the C emulator.Prashanth Mundkur1-13/+58
2019-03-01Make clean remove coq extras build filesBrian Campbell1-0/+1
2019-02-27Add an option to write signatures for the compliance suite.Prashanth Mundkur2-8/+62
2019-02-27Refresh to latest tests from riscv-tests. The 32-bit -v- elfs still seem ↵Prashanth Mundkur471-3176/+4828
broken to linksem.
2019-02-27Initial attempt to separate generated files by ARCH. Some ↵Prashanth Mundkur5-74/+74
backends/rvfi/rmem still to be tested.
2019-02-26Restore riscv_extras damaged by merge.Prashanth Mundkur1-9/+13
2019-02-26Reduce default ram to 64MB in ocaml emulator.Prashanth Mundkur1-1/+1
2019-02-26Remove old license header from ml files.Prashanth Mundkur2-100/+0
2019-02-26Merge branch 'master' into rv32Prashanth Mundkur7-35/+323
2019-02-26Initial cleanup of the prelude, using standard prelude instead when possible.Prashanth Mundkur3-244/+48
2019-02-25Enable C rv32 tests.Prashanth Mundkur1-14/+26
2019-02-22Fix address translation bug in ordering of width-extension and shift in pte. ↵Prashanth Mundkur5-12/+11
This showed up in RV32, but not in RV64, presumably because the highest address bits are not typically exercised typical physical memory maps.
2019-02-22Add rv32 support to the trace comparer.Prashanth Mundkur1-8/+67
2019-02-21Add rv32 tests from riscv-tests; update test script to enable ocaml rv32.Prashanth Mundkur265-9/+94903
2019-02-21Fix the ocaml platform to respect the architectural width.Prashanth Mundkur2-21/+37
2019-02-20Some changes for arch-specific initialization.Prashanth Mundkur6-31/+61
2019-02-20Add an option to report the model architecture to the emulators.Prashanth Mundkur2-4/+21
2019-02-20Update docs.Prashanth Mundkur2-10/+24
2019-02-20Add ELF architecture checks to the loaders in the OCaml and C emulators.Prashanth Mundkur7-9/+50
2019-02-19Use sizeof xlen instead of the value definitions of xlen.Prashanth Mundkur14-143/+135
2019-02-19Adjust Makefile to use an ARCH argument. Undo xlen guards in ↵Prashanth Mundkur4-13/+60
riscv_analysis, instead conditionally include it in sources, depending on the ARCH.
2019-02-15Fix riscv_analysis to use xlen.Prashanth Mundkur1-3/+3
2019-02-15More RV32 fixes.Prashanth Mundkur3-10/+8
2019-02-15Define counter CSRs, and guard accesses from RV32.Prashanth Mundkur2-87/+113
2019-02-15Add xlen guards on double-word operations to make them RV64-only.Prashanth Mundkur3-42/+43
2019-02-14Handle shamt being 5 bits in RV32 instead of 6; also fix a missed case of ↵Prashanth Mundkur1-8/+14
disabling the TLB in sfence.vma.
2019-02-14update LICENCEPeter Sewell1-15/+15
2019-02-14Fix typo in earlier commit.Prashanth Mundkur1-1/+1
2019-02-13Add Sv32 and Sv48 by essentially copying Sv39.Prashanth Mundkur8-4/+280
Being first-order prevents straight-forward abstraction over the PTE operations, but perhaps there is another way to generalize and unify.
2019-02-13Remove the use of the TLB until it is more generic across the various ↵Prashanth Mundkur1-56/+24
architectures and modes.
2019-02-13Pull out the Sv39 and its TLB into separate files.Prashanth Mundkur5-216/+226
generated by cgit v1.1 at 2024-11-05 21:29:36 +0000