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Diffstat (limited to 'ocaml_emulator')
-rw-r--r--ocaml_emulator/platform.ml4
-rw-r--r--ocaml_emulator/riscv_ocaml_sim.ml4
2 files changed, 4 insertions, 4 deletions
diff --git a/ocaml_emulator/platform.ml b/ocaml_emulator/platform.ml
index 6bc9372..1e61165 100644
--- a/ocaml_emulator/platform.ml
+++ b/ocaml_emulator/platform.ml
@@ -11,7 +11,7 @@ let config_enable_dirty_update = ref false
let config_enable_misaligned_access = ref false
let config_mtval_has_illegal_inst_bits = ref false
let config_enable_pmp = ref false
-let config_enable_fiom = ref true
+let config_enable_writable_fiom = ref true
let platform_arch = ref P.RV64
@@ -84,7 +84,7 @@ let enable_misaligned_access () = !config_enable_misaligned_access
let mtval_has_illegal_inst_bits () = !config_mtval_has_illegal_inst_bits
let enable_pmp () = !config_enable_pmp
let enable_zfinx () = false
-let enable_fiom () = !config_enable_fiom
+let enable_writable_fiom () = !config_enable_writable_fiom
let rom_base () = arch_bits_of_int64 P.rom_base
let rom_size () = arch_bits_of_int !rom_size_ref
diff --git a/ocaml_emulator/riscv_ocaml_sim.ml b/ocaml_emulator/riscv_ocaml_sim.ml
index c5b427d..814f887b9 100644
--- a/ocaml_emulator/riscv_ocaml_sim.ml
+++ b/ocaml_emulator/riscv_ocaml_sim.ml
@@ -50,8 +50,8 @@ let options = Arg.align ([("-dump-dts",
("-mtval-has-illegal-inst-bits",
Arg.Set P.config_mtval_has_illegal_inst_bits,
" mtval stores instruction bits on an illegal instruction exception");
- ("-enable-fiom",
- Arg.Set P.config_enable_fiom,
+ ("-enable-writable-fiom",
+ Arg.Set P.config_enable_writable_fiom,
" enable FIOM (Fence of I/O implies Memory) bit in menvcfg");
("-disable-rvc",
Arg.Clear P.config_enable_rvc,