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-rw-r--r--model/riscv_vmem_rv32.sail6
1 files changed, 3 insertions, 3 deletions
diff --git a/model/riscv_vmem_rv32.sail b/model/riscv_vmem_rv32.sail
index 5b640b1..02f8141 100644
--- a/model/riscv_vmem_rv32.sail
+++ b/model/riscv_vmem_rv32.sail
@@ -17,7 +17,7 @@ function translationMode(priv) = {
match arch {
Some(RV32) => {
let s = Mk_Satp32(satp[31..0]);
- if s.Mode() == false then Sbare else Sv32
+ if s.Mode() == 0b0 then Sbare else Sv32
},
_ => internal_error("unsupported address translation arch")
}
@@ -32,8 +32,8 @@ function translateAddr(vAddr, ac) = {
Execute => cur_privilege,
_ => effectivePrivilege(mstatus, cur_privilege)
};
- let mxr : bool = mstatus.MXR() == true;
- let do_sum : bool = mstatus.SUM() == true;
+ let mxr : bool = mstatus.MXR() == 0b1;
+ let do_sum : bool = mstatus.SUM() == 0b1;
let mode : SATPMode = translationMode(effPriv);
let asid = curAsid32(satp);