1 files changed, 18 insertions, 18 deletions

diff --git a/model/riscv_insts_mext.sail b/model/riscv_insts_mext.sail
index b133ac2..4830f93 100644
--- a/model/riscv_insts_mext.sail
+++ b/model/riscv_insts_mext.sail
@@ -3,7 +3,7 @@
 
 /* ****************************************************************** */
 
-union clause ast = MUL : (regbits, regbits, regbits, bool, bool, bool)
+union clause ast = MUL : (regidx, regidx, regidx, bool, bool, bool)
 
 mapping encdec_mul_op : (bool, bool, bool) <-> bits(3) = {
   (false, true, true)  <-> 0b000,
@@ -27,10 +27,10 @@ function clause execute (MUL(rs2, rs1, rd, high, signed1, signed2)) = {
                  then result_wide[(2 * sizeof(xlen) - 1) .. sizeof(xlen)]
                  else result_wide[(sizeof(xlen) - 1) .. 0];
     X(rd) = result;
-    true
+    RETIRE_SUCCESS
   } else {
     handle_illegal();
-    false
+    RETIRE_FAIL
   }
 }
 
@@ -45,7 +45,7 @@ mapping clause assembly = MUL(rs2, rs1, rd, high, signed1, signed2)
   <-> mul_mnemonic(high, signed1, signed2) ^ spc() ^ reg_name(rd) ^ sep() ^ reg_name(rs1) ^ sep() ^ reg_name(rs2)
 
 /* ****************************************************************** */
-union clause ast = DIV : (regbits, regbits, regbits, bool)
+union clause ast = DIV : (regidx, regidx, regidx, bool)
 
 mapping clause encdec = DIV(rs2, rs1, rd, s)
   <-> 0b0000001 @ rs2 @ rs1 @ 0b10 @ bool_not_bits(s) @ rd @ 0b0110011
@@ -60,10 +60,10 @@ function clause execute (DIV(rs2, rs1, rd, s)) = {
     /* check for signed overflow */
     let q': int = if s & q > xlen_max_signed then xlen_min_signed else q;
     X(rd) = to_bits(sizeof(xlen), q');
-    true
+    RETIRE_SUCCESS
   } else {
     handle_illegal();
-    false
+    RETIRE_FAIL
   }
 }
 
@@ -76,7 +76,7 @@ mapping clause assembly = DIV(rs2, rs1, rd, s)
   <-> "div" ^ maybe_not_u(s) ^ spc() ^ reg_name(rd) ^ sep() ^ reg_name(rs1) ^ sep() ^ reg_name(rs2)
 
 /* ****************************************************************** */
-union clause ast = REM : (regbits, regbits, regbits, bool)
+union clause ast = REM : (regidx, regidx, regidx, bool)
 
 mapping clause encdec = REM(rs2, rs1, rd, s)
   <-> 0b0000001 @ rs2 @ rs1 @ 0b11 @ bool_not_bits(s) @ rd @ 0b0110011
@@ -90,10 +90,10 @@ function clause execute (REM(rs2, rs1, rd, s)) = {
     let r : int = if rs2_int == 0 then rs1_int else rem_round_zero(rs1_int, rs2_int);
     /* signed overflow case returns zero naturally as required due to -1 divisor */
     X(rd) = to_bits(sizeof(xlen), r);
-    true
+    RETIRE_SUCCESS
   } else {
     handle_illegal();
-    false
+    RETIRE_FAIL
   }
 }
 
@@ -101,7 +101,7 @@ mapping clause assembly = REM(rs2, rs1, rd, s)
   <-> "rem" ^ maybe_not_u(s) ^ spc() ^ reg_name(rd) ^ sep() ^ reg_name(rs1) ^ sep() ^ reg_name(rs2)
 
 /* ****************************************************************** */
-union clause ast = MULW : (regbits, regbits, regbits)
+union clause ast = MULW : (regidx, regidx, regidx)
 
 mapping clause encdec = MULW(rs2, rs1, rd)
       if sizeof(xlen) == 64
@@ -118,10 +118,10 @@ function clause execute (MULW(rs2, rs1, rd)) = {
     let result32 = to_bits(64, rs1_int * rs2_int)[31..0];
     let result : xlenbits = EXTS(result32);
     X(rd) = result;
-    true
+    RETIRE_SUCCESS
   } else {
     handle_illegal();
-    false
+    RETIRE_FAIL
   }
 }
 
@@ -131,7 +131,7 @@ mapping clause assembly = MULW(rs2, rs1, rd)
       if sizeof(xlen) == 64
 
 /* ****************************************************************** */
-union clause ast = DIVW : (regbits, regbits, regbits, bool)
+union clause ast = DIVW : (regidx, regidx, regidx, bool)
 
 mapping clause encdec = DIVW(rs2, rs1, rd, s)
       if sizeof(xlen) == 64
@@ -148,10 +148,10 @@ function clause execute (DIVW(rs2, rs1, rd, s)) = {
     /* check for signed overflow */
     let q': int = if s & q > (2 ^ 31 - 1) then  (0 - 2^31) else q;
     X(rd) = EXTS(to_bits(32, q'));
-    true
+    RETIRE_SUCCESS
   } else {
     handle_illegal();
-    false
+    RETIRE_FAIL
   }
 }
 
@@ -161,7 +161,7 @@ mapping clause assembly = DIVW(rs2, rs1, rd, s)
       if sizeof(xlen) == 64
 
 /* ****************************************************************** */
-union clause ast = REMW : (regbits, regbits, regbits, bool)
+union clause ast = REMW : (regidx, regidx, regidx, bool)
 
 mapping clause encdec = REMW(rs2, rs1, rd, s)
       if sizeof(xlen) == 64
@@ -177,10 +177,10 @@ function clause execute (REMW(rs2, rs1, rd, s)) = {
     let r : int = if rs2_int == 0 then rs1_int else rem_round_zero(rs1_int, rs2_int);
     /* signed overflow case returns zero naturally as required due to -1 divisor */
     X(rd) = EXTS(to_bits(32, r));
-    true
+    RETIRE_SUCCESS
   } else {
     handle_illegal();
-    false
+    RETIRE_FAIL
   }
 }