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-rw-r--r--model/prelude.sail12
1 files changed, 12 insertions, 0 deletions
diff --git a/model/prelude.sail b/model/prelude.sail
index 54f7d03..9f8ad37 100644
--- a/model/prelude.sail
+++ b/model/prelude.sail
@@ -101,6 +101,18 @@ val print_reg = {ocaml: "Platform.print_reg", interpreter: "print_endline",
val print_mem = {ocaml: "Platform.print_mem_access", interpreter: "print_endline", c: "print_mem_access", lem: "print_dbg", _: "print_endline"} : string -> unit
val print_platform = {ocaml: "Platform.print_platform", interpreter: "print_endline", c: "print_platform", lem: "print_dbg", _: "print_endline"} : string -> unit
+val get_config_print_instr = {ocaml: "Platform.get_config_print_instr", c:"get_config_print_instr"} : unit -> bool
+function get_config_print_instr () -> bool = false
+
+val get_config_print_reg = {ocaml: "Platform.get_config_print_reg", c:"get_config_print_reg"} : unit -> bool
+function get_config_print_reg () -> bool = false
+
+val get_config_print_mem = {ocaml: "Platform.get_config_print_mem", c:"get_config_print_mem"} : unit -> bool
+function get_config_print_mem () -> bool = false
+
+val get_config_print_platform = {ocaml: "Platform.get_config_print_platform", c:"get_config_print_platform"} : unit -> bool
+function get_config_print_platform () -> bool = false
+
$ifndef FEATURE_IMPLICITS
val EXTS : forall 'n 'm , 'm >= 'n . bits('n) -> bits('m)
val EXTZ : forall 'n 'm , 'm >= 'n . bits('n) -> bits('m)