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| author | Robert Norton <rmn30@cam.ac.uk> | 2019-09-10 13:38:15 +0100 |
|---|---|---|
| committer | Robert Norton <rmn30@cam.ac.uk> | 2019-09-10 13:38:15 +0100 |
| commit | b26829ea77163adbeabc9ef6357d4fea9f0e850f (patch) | |
| tree | a1b06241587ac76190037b6034725f3aea2cbae6 /model | |
| parent | f9f066e89a5c20f2769fbfb2b6a585af9b3f0561 (diff) | |
| download | sail-riscv-b26829ea77163adbeabc9ef6357d4fea9f0e850f.zip sail-riscv-b26829ea77163adbeabc9ef6357d4fea9f0e850f.tar.gz sail-riscv-b26829ea77163adbeabc9ef6357d4fea9f0e850f.tar.bz2 | |
Changes from Peter Rugg to make misa.C only writable if enabled at boot by sys_enable_rvc.
Diffstat (limited to 'model')
| -rw-r--r-- | model/riscv_sys_regs.sail | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/model/riscv_sys_regs.sail b/model/riscv_sys_regs.sail index cf9d745..143fd35 100644 --- a/model/riscv_sys_regs.sail +++ b/model/riscv_sys_regs.sail @@ -80,8 +80,8 @@ function legalize_misa(m : Misa, v : xlenbits) -> Misa = { if sys_enable_writable_misa () then { /* Allow modifications to C only for now. */ let v = Mk_Misa(v); - /* Suppress changing C if nextPC would become misaligned. */ - if v.C() == 0b0 & nextPC[1] == bitone + /* Suppress changing C if nextPC would become misaligned or C was disabled at boot. */ + if (v.C() == 0b0 & nextPC[1] == bitone) | ~(sys_enable_rvc()) then m else update_C(m, v.C()) } @@ -339,7 +339,9 @@ register mepc : xlenbits * When misa.C is writable, it zeroes only xepc[0]. */ function legalize_xepc(v : xlenbits) -> xlenbits = - if sys_enable_writable_misa () | misa.C() == 0b1 + /* allow writing xepc[1] only if misa.C is enabled or could be enabled + XXX specification says this legalization should be done on read */ + if (sys_enable_writable_misa() & sys_enable_rvc()) | misa.C() == 0b1 then [v with 0 = bitzero] else v & EXTS(0b100) |