aboutsummaryrefslogtreecommitdiff
path: root/model/riscv_vmem_rv32.sail
diff options
context:
space:
mode:
authorBrian Campbell <Brian.Campbell@ed.ac.uk>2019-03-05 12:08:11 +0000
committerBrian Campbell <Brian.Campbell@ed.ac.uk>2019-03-05 12:08:11 +0000
commitc902b944f4340c837029d61f422199811b01cf7a (patch)
tree71a27260395d94e077151fc707515a9e56f6be78 /model/riscv_vmem_rv32.sail
parent7e8c195ca1ac2ac84b5f6ade6b244b6d150d2ed9 (diff)
downloadsail-riscv-c902b944f4340c837029d61f422199811b01cf7a.zip
sail-riscv-c902b944f4340c837029d61f422199811b01cf7a.tar.gz
sail-riscv-c902b944f4340c837029d61f422199811b01cf7a.tar.bz2
Correct capitalisation of Sv39/48 in pattern matches
Diffstat (limited to 'model/riscv_vmem_rv32.sail')
-rw-r--r--model/riscv_vmem_rv32.sail2
1 files changed, 1 insertions, 1 deletions
diff --git a/model/riscv_vmem_rv32.sail b/model/riscv_vmem_rv32.sail
index 539a879..b59ceae 100644
--- a/model/riscv_vmem_rv32.sail
+++ b/model/riscv_vmem_rv32.sail
@@ -43,7 +43,7 @@ function translateAddr(vAddr, ac, rt) = {
match mode {
Sbare => TR_Address(vAddr),
- SV39 => match translate32(asid, ptb, vAddr, ac, effPriv, mxr, do_sum, SV32_LEVELS - 1) {
+ Sv39 => match translate32(asid, ptb, vAddr, ac, effPriv, mxr, do_sum, SV32_LEVELS - 1) {
TR_Address(pa) => TR_Address(to_phys_addr(pa)),
TR_Failure(f) => TR_Failure(translationException(ac, f))
},