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| author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-02-15 16:07:23 -0800 |
|---|---|---|
| committer | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2019-02-15 16:07:23 -0800 |
| commit | a38c63600d89057f17164553c20942ffe77b60db (patch) | |
| tree | d40f77ac099535ae3def543cf18a5bbb5b50a7b0 /model/riscv_sys_control.sail | |
| parent | 37652558dc0432d19d057ea5a9c9318f9151dee4 (diff) | |
| download | sail-riscv-a38c63600d89057f17164553c20942ffe77b60db.zip sail-riscv-a38c63600d89057f17164553c20942ffe77b60db.tar.gz sail-riscv-a38c63600d89057f17164553c20942ffe77b60db.tar.bz2 | |
Define counter CSRs, and guard accesses from RV32.
Diffstat (limited to 'model/riscv_sys_control.sail')
| -rw-r--r-- | model/riscv_sys_control.sail | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/model/riscv_sys_control.sail b/model/riscv_sys_control.sail index f2a88c5..5238066 100644 --- a/model/riscv_sys_control.sail +++ b/model/riscv_sys_control.sail @@ -32,6 +32,16 @@ function is_CSR_defined (csr : bits(12), p : Privilege) -> bool = 0x3B0 => false, // (Disabled for Spike compatibility) // 0x3B0 => p == Machine, // pmpaddr0 + /* counters */ + 0xB00 => p == Machine, // mcycle + 0xB02 => p == Machine, // minstret + + 0xB80 => p == Machine & (xlen == 32), // mcycleh + 0xB82 => p == Machine & (xlen == 32), // minstreth + + /* disabled trigger/debug module */ + 0x7a0 => p == Machine, + /* supervisor mode: trap setup */ 0x100 => haveSupMode() & (p == Machine | p == Supervisor), // sstatus 0x102 => haveSupMode() & (p == Machine | p == Supervisor), // sedeleg @@ -50,8 +60,14 @@ function is_CSR_defined (csr : bits(12), p : Privilege) -> bool = /* supervisor mode: address translation */ 0x180 => haveSupMode() & (p == Machine | p == Supervisor), // satp - /* disabled trigger/debug module */ - 0x7a0 => p == Machine, + /* user mode: counters */ + 0xC00 => p == User, // cycle + 0xC01 => p == User, // time + 0xC02 => p == User, // instret + + 0xC80 => p == User & (xlen == 32), // cycleh + 0xC81 => p == User & (xlen == 32), // timeh + 0xC82 => p == User & (xlen == 32), // instreth /* check extensions */ _ => is_UExt_CSR_defined(csr, p) // 'N' extension |