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| author | Scott Johnson <scott.johnson@arilinc.com> | 2020-08-25 11:52:25 -0700 |
|---|---|---|
| committer | Scott Johnson <scott.johnson@arilinc.com> | 2020-08-25 12:05:43 -0700 |
| commit | 21cde61d5a402737dc7dd098e9ebaa6f32697cf8 (patch) | |
| tree | d70b96df55493e559ccdbd669b3f0cd6971e8ed0 /model/riscv_sys_control.sail | |
| parent | ffdc009deea022ff73d084db0338a4c69d0df567 (diff) | |
| download | sail-riscv-21cde61d5a402737dc7dd098e9ebaa6f32697cf8.zip sail-riscv-21cde61d5a402737dc7dd098e9ebaa6f32697cf8.tar.gz sail-riscv-21cde61d5a402737dc7dd098e9ebaa6f32697cf8.tar.bz2 | |
Allow CSR read/write to mcountinhibit
Diffstat (limited to 'model/riscv_sys_control.sail')
| -rw-r--r-- | model/riscv_sys_control.sail | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/model/riscv_sys_control.sail b/model/riscv_sys_control.sail index 558c4de..9323d90 100644 --- a/model/riscv_sys_control.sail +++ b/model/riscv_sys_control.sail @@ -21,6 +21,7 @@ function is_CSR_defined (csr : csreg, p : Privilege) -> bool = 0x304 => p == Machine, // mie 0x305 => p == Machine, // mtvec 0x306 => p == Machine & haveUsrMode(), // mcounteren + 0x320 => p == Machine, // mcountinhibit /* machine mode: trap handling */ 0x340 => p == Machine, // mscratch 0x341 => p == Machine, // mepc |