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author | Robert Norton <rmn30@cam.ac.uk> | 2019-10-31 14:25:33 +0000 |
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committer | Robert Norton <rmn30@cam.ac.uk> | 2019-10-31 14:25:33 +0000 |
commit | f736870454a8ee8fabaf4a5ad4b3af938cfcb267 (patch) | |
tree | f2740dec4028c2d5d66322c008f4cfb3ed3767ff /Makefile | |
parent | 24fb6b4f43fb017c9855e5b9c9ccd241c09c5e86 (diff) | |
download | sail-riscv-f736870454a8ee8fabaf4a5ad4b3af938cfcb267.zip sail-riscv-f736870454a8ee8fabaf4a5ad4b3af938cfcb267.tar.gz sail-riscv-f736870454a8ee8fabaf4a5ad4b3af938cfcb267.tar.bz2 |
Add convenience targets for c emulator and rvfi.
Diffstat (limited to 'Makefile')
-rw-r--r-- | Makefile | 6 |
1 files changed, 6 insertions, 0 deletions
@@ -200,6 +200,12 @@ generated_definitions/c/riscv_model_$(ARCH).c: $(SAIL_SRCS) model/main.sail Make mkdir -p generated_definitions/c $(SAIL) $(SAIL_FLAGS) -O -Oconstant_fold -memo_z3 -c -c_include riscv_prelude.h -c_include riscv_platform.h -c_no_main $(SAIL_SRCS) model/main.sail -o $(basename $@) +# convenience target +.PHONY: csim +csim: c_emulator/riscv_sim_$(ARCH) +.PHONY: rvfi +rvfi: c_emulator/riscv_rvfi + c_emulator/riscv_sim_$(ARCH): generated_definitions/c/riscv_model_$(ARCH).c $(C_INCS) $(C_SRCS) Makefile gcc -g $(C_WARNINGS) $(C_FLAGS) $< $(C_SRCS) $(SAIL_LIB_DIR)/*.c $(C_LIBS) -o $@ |