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authorPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-05-31 09:37:07 -0700
committerPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-05-31 09:37:07 -0700
commit8ae073cd301e1c430729caf6303df88e1ef601ae (patch)
tree345efd6199c6f994b3e5589d8c6253276be6a2e9 /Makefile
parent9bc6009dd7c0c646d660d34246f4f84a68b9c80c (diff)
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Fix build on MacPorts/MacOS.
Diffstat (limited to 'Makefile')
-rw-r--r--Makefile8
1 files changed, 6 insertions, 2 deletions
diff --git a/Makefile b/Makefile
index c799bff..0a198b3 100644
--- a/Makefile
+++ b/Makefile
@@ -94,8 +94,12 @@ C_WARNINGS ?=
C_INCS = $(addprefix c_emulator/,riscv_prelude.h riscv_platform_impl.h riscv_platform.h)
C_SRCS = $(addprefix c_emulator/,riscv_prelude.c riscv_platform_impl.c riscv_platform.c riscv_sim.c)
-C_FLAGS = -I $(SAIL_LIB_DIR) -I c_emulator
-C_LIBS = -lgmp -lz
+# portability for MacPorts/MacOS
+C_SYS_INCLUDES = -I /opt/local/include
+C_SYS_LIBDIRS = -L /opt/local/lib
+
+C_FLAGS = $(C_SYS_INCLUDES) -I $(SAIL_LIB_DIR) -I c_emulator
+C_LIBS = $(C_SYS_LIBDIRS) -lgmp -lz
# The C simulator can be built to be linked against Spike for tandem-verification.
# This needs the C bindings to Spike from https://github.com/SRI-CSL/l3riscv