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| author | Tim Hutt <timothy.hutt@codasip.com> | 2023-10-10 12:41:22 +0100 |
|---|---|---|
| committer | Bill McSpadden <bill@riscv.org> | 2024-02-01 15:53:16 -0600 |
| commit | 23f18200b771174e601fb58e7a857291fb32d063 (patch) | |
| tree | fea16b2c7634ccb8761edd34648b3291ccff75d1 /Makefile | |
| parent | e7c369d6993d13c1f714f66403267ee19a8ba815 (diff) | |
| download | sail-riscv-23f18200b771174e601fb58e7a857291fb32d063.zip sail-riscv-23f18200b771174e601fb58e7a857291fb32d063.tar.gz sail-riscv-23f18200b771174e601fb58e7a857291fb32d063.tar.bz2 | |
Simplify prelude.sail by including generic_equality.sail and mapping.sail
This change includes `generic_equality.sail` and `mapping.sail` from the Sail standard library which defines a lot of things that were defined in `prelude.sail`.
I also removed `reg_deref` which is no longer required.
The `mapping.sail` and `hex_bits.sail` files are in Sail 0.18 which is not yet released, so they have been temporarily copied here.
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -82,7 +82,7 @@ SAIL_VM_SRCS += $(SAIL_RV64_VM_SRCS) endif # Non-instruction sources -PRELUDE = prelude.sail prelude_mapping.sail $(SAIL_XLEN) $(SAIL_FLEN) $(SAIL_VLEN) prelude_mem_metadata.sail prelude_mem.sail +PRELUDE = prelude.sail $(SAIL_XLEN) $(SAIL_FLEN) $(SAIL_VLEN) prelude_mem_metadata.sail prelude_mem.sail SAIL_REGS_SRCS = riscv_reg_type.sail riscv_freg_type.sail riscv_regs.sail riscv_pc_access.sail riscv_sys_regs.sail SAIL_REGS_SRCS += riscv_pmp_regs.sail riscv_pmp_control.sail |