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authorPrashanth Mundkur <prashanth.mundkur@gmail.com>2018-07-27 19:11:46 -0700
committerPrashanth Mundkur <prashanth.mundkur@gmail.com>2018-07-27 19:11:46 -0700
commit58b6d6fe3247a3b2ce0af661c5049cbd418e42a8 (patch)
treed0d3fddacc747306686128d172f81ae0257404ed /Makefile
parentf70d139b24f690fc80919dba74078573048bcf44 (diff)
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Add a riscv latex target.
Diffstat (limited to 'Makefile')
-rw-r--r--Makefile3
1 files changed, 3 insertions, 0 deletions
diff --git a/Makefile b/Makefile
index 4a39604..4805c8b 100644
--- a/Makefile
+++ b/Makefile
@@ -35,6 +35,9 @@ coverage: _sbuild/coverage.native
riscv.c: $(SAIL_SRCS) Makefile
$(SAIL) -O -memo_z3 -c $(SAIL_SRCS) 1> $@
+latex: $(SAIL_SRCS) Makefile
+ $(SAIL) -latex -latex_prefix sail -o sail_ltx $(SAIL_SRCS)
+
tracecmp: tracecmp.ml
ocamlfind ocamlopt -annot -linkpkg -package unix $^ -o $@