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| author | Tim Hutt <timothy.hutt@codasip.com> | 2024-09-12 20:53:07 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-12 20:53:07 +0100 |
| commit | 31f809346e1020d191b46d519ad6435e2428be39 (patch) | |
| tree | 93d61f64593988db4ee322521726bce02f7cebfc | |
| parent | 9063a2bca1a8ce0603c089a4d3da627c37079dc1 (diff) | |
| download | sail-riscv-31f809346e1020d191b46d519ad6435e2428be39.zip sail-riscv-31f809346e1020d191b46d519ad6435e2428be39.tar.gz sail-riscv-31f809346e1020d191b46d519ad6435e2428be39.tar.bz2 | |
Derive xlen values from a logarithmic constant
The motivation for this is that it makes deriving CHERI constants (field widths etc.) which vary between RV32 and RV64 a lot easier.
| -rw-r--r-- | Makefile | 1 | ||||
| -rw-r--r-- | model/riscv_xlen.sail | 11 | ||||
| -rw-r--r-- | model/riscv_xlen32.sail | 9 | ||||
| -rw-r--r-- | model/riscv_xlen64.sail | 9 |
4 files changed, 20 insertions, 10 deletions
@@ -18,6 +18,7 @@ else $(error '$(ARCH)' is not a valid architecture, must be one of: RV32, RV64) endif +SAIL_XLEN += riscv_xlen.sail SAIL_FLEN := riscv_flen_D.sail SAIL_VLEN := riscv_vlen.sail diff --git a/model/riscv_xlen.sail b/model/riscv_xlen.sail new file mode 100644 index 0000000..75174fc --- /dev/null +++ b/model/riscv_xlen.sail @@ -0,0 +1,11 @@ +/*=======================================================================================*/ +/* This Sail RISC-V architecture model, comprising all files and */ +/* directories except where otherwise noted is subject the BSD */ +/* two-clause license in the LICENSE file. */ +/* */ +/* SPDX-License-Identifier: BSD-2-Clause */ +/*=======================================================================================*/ + +type xlen_bytes : Int = 2 ^ log2_xlen_bytes +type xlen : Int = xlen_bytes * 8 +type xlenbits = bits(xlen) diff --git a/model/riscv_xlen32.sail b/model/riscv_xlen32.sail index fb883ac..926f20f 100644 --- a/model/riscv_xlen32.sail +++ b/model/riscv_xlen32.sail @@ -6,8 +6,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /*=======================================================================================*/ -/* Define the XLEN value for the architecture. */ - -type xlen : Int = 32 -type xlen_bytes : Int = 4 -type xlenbits = bits(xlen) +// Define the XLEN value for the architecture. +// This is done using the smallest/most logarithmic possible value since Sail's +// type system works well for multiply and 2^ but not divide and log2. +type log2_xlen_bytes : Int = 2 diff --git a/model/riscv_xlen64.sail b/model/riscv_xlen64.sail index 7a90307..9878c7f 100644 --- a/model/riscv_xlen64.sail +++ b/model/riscv_xlen64.sail @@ -6,8 +6,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /*=======================================================================================*/ -/* Define the XLEN value for the architecture. */ - -type xlen : Int = 64 -type xlen_bytes : Int = 8 -type xlenbits = bits(xlen) +// Define the XLEN value for the architecture. +// This is done using the smallest/most logarithmic possible value since Sail's +// type system works well for multiply and 2^ but not divide and log2. +type log2_xlen_bytes : Int = 3 |