diff options
| author | Tim Hutt <timothy.hutt@codasip.com> | 2023-08-11 16:03:14 +0100 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2023-09-12 13:50:59 +0200 |
| commit | 7682079db2a3aaa3b21505a664b49269df1fb401 (patch) | |
| tree | e09c7e537a96f3bfc4697758761e03b180545341 | |
| parent | 9c6587e4be057c20bdebb535ec926bca41716a03 (diff) | |
| download | sail-riscv-7682079db2a3aaa3b21505a664b49269df1fb401.zip sail-riscv-7682079db2a3aaa3b21505a664b49269df1fb401.tar.gz sail-riscv-7682079db2a3aaa3b21505a664b49269df1fb401.tar.bz2 | |
Remove redundant _ match case
| -rw-r--r-- | model/riscv_sys_control.sail | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/model/riscv_sys_control.sail b/model/riscv_sys_control.sail index d057ad6..b854053 100644 --- a/model/riscv_sys_control.sail +++ b/model/riscv_sys_control.sail @@ -205,7 +205,6 @@ function check_seed_CSR (csr : csreg, p : Privilege, isWrite : bool) -> bool = { Machine => true, Supervisor => false, /* TODO: base this on mseccfg */ User => false, /* TODO: base this on mseccfg */ - _ => false } } } |