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authorPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-01-30 17:48:03 -0800
committerPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-01-30 17:48:03 -0800
commit770f0890088e6c35ddb6af18c6467ee428595641 (patch)
tree612f99ffdb615e4f1ef5e139fc73990999f95e71
parent2074a550c3e4020ebd051456aa764bba877c3e5c (diff)
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Comment out asserts.
-rw-r--r--model/riscv_sys_control.sail10
1 files changed, 5 insertions, 5 deletions
diff --git a/model/riscv_sys_control.sail b/model/riscv_sys_control.sail
index 5b57fb8..3bdaadd 100644
--- a/model/riscv_sys_control.sail
+++ b/model/riscv_sys_control.sail
@@ -174,7 +174,7 @@ function processPending(xip : Minterrupts, xie : Minterrupts, xideleg : xlenbits
* allows for example the M_Timer to be delegated to the U-mode.
*/
function getPendingSet(priv : Privilege) -> option((xlenbits, Privilege)) = {
- assert(haveUsrMode());
+ //assert(haveUsrMode());
let effective_pending = mip.bits() & mie.bits();
if effective_pending == EXTZ(0b0) then None() /* fast path */
else {
@@ -213,8 +213,8 @@ function dispatchInterrupt(priv : Privilege) -> option((InterruptType, Privilege
/* If we don't have different privilege levels, we don't need to check delegation.
* Absence of U-mode implies absence of S-mode.
*/
- if (~ (haveUsrMode())) | ((~ (haveSupMode())) & (~ (haveNExt())))
- assert(priv == Machine);
+ if (~ (haveUsrMode())) | ((~ (haveSupMode())) & (~ (haveNExt()))) then {
+ //assert(priv == Machine);
let enabled_pending = mip.bits() & mie.bits();
match findPendingInterrupt(enabled_pending) {
Some(i) => let r = (i, Machine) in Some(r),
@@ -292,7 +292,7 @@ function handle_trap(del_priv : Privilege, intr : bool, c : exc_code, pc : xlenb
}
},
Supervisor => {
- assert (haveSupMode());
+ //assert (haveSupMode());
scause->IsInterrupt() = intr;
scause->Cause() = EXTZ(c);
@@ -318,7 +318,7 @@ function handle_trap(del_priv : Privilege, intr : bool, c : exc_code, pc : xlenb
},
User => {
- assert(haveUsrMode());
+ //assert(haveUsrMode());
ucause->IsInterrupt() = intr;
ucause->Cause() = EXTZ(c);