Allow extensions to provide their own exception codes/names

4 files changed, 18 insertions, 7 deletions

diff --git a/Makefile b/Makefile
index 99c052e..caed0b7 100644
--- a/Makefile
+++ b/Makefile
@@ -51,10 +51,10 @@ SAIL_REGS_SRCS += riscv_pmp_regs.sail riscv_pmp_control.sail
 SAIL_REGS_SRCS += riscv_ext_regs.sail $(SAIL_CHECK_SRCS)
 
 SAIL_ARCH_SRCS = $(PRELUDE)
-SAIL_ARCH_SRCS += riscv_types_ext.sail riscv_types.sail
+SAIL_ARCH_SRCS += riscv_types_common.sail riscv_types_ext.sail riscv_types.sail
 SAIL_ARCH_SRCS += riscv_vmem_types.sail $(SAIL_REGS_SRCS) $(SAIL_SYS_SRCS) riscv_platform.sail
 SAIL_ARCH_SRCS += riscv_mem.sail $(SAIL_VM_SRCS)
-SAIL_ARCH_RVFI_SRCS = $(PRELUDE) rvfi_dii.sail riscv_types_ext.sail riscv_types.sail riscv_vmem_types.sail $(SAIL_REGS_SRCS) $(SAIL_SYS_SRCS) riscv_platform.sail riscv_mem.sail $(SAIL_VM_SRCS)
+SAIL_ARCH_RVFI_SRCS = $(PRELUDE) rvfi_dii.sail riscv_types_common.sail riscv_types_ext.sail riscv_types.sail riscv_vmem_types.sail $(SAIL_REGS_SRCS) $(SAIL_SYS_SRCS) riscv_platform.sail riscv_mem.sail $(SAIL_VM_SRCS)
 SAIL_STEP_SRCS = riscv_step_common.sail riscv_step_ext.sail riscv_decode_ext.sail riscv_fetch.sail riscv_step.sail
 RVFI_STEP_SRCS = riscv_step_common.sail riscv_step_rvfi.sail riscv_decode_ext.sail riscv_fetch_rvfi.sail riscv_step.sail
 
diff --git a/model/riscv_types.sail b/model/riscv_types.sail
index cacf0db..987743a 100644
--- a/model/riscv_types.sail
+++ b/model/riscv_types.sail
@@ -108,8 +108,6 @@ enum word_width = {BYTE, HALF, WORD, DOUBLE}
 
 /* architectural interrupt definitions */
 
-type exc_code = bits(8)
-
 enum InterruptType = {
   I_U_Software,
   I_S_Software,
@@ -181,7 +179,7 @@ function exceptionType_to_bits(e) =
     E_SAMO_Page_Fault()    => 0x0f,
 
     /* extensions */
-    E_Extension(e)         => 0x18    /* First code for a custom extension */
+    E_Extension(e)         => ext_exc_type_to_bits(e)
   }
 
 val num_of_ExceptionType : ExceptionType -> {'n, (0 <= 'n < xlen). int('n)}
@@ -205,7 +203,7 @@ function num_of_ExceptionType(e) =
     E_SAMO_Page_Fault()    => 15,
 
     /* extensions */
-    E_Extension(e)         => 24    /* First code for a custom extension */
+    E_Extension(e)         => num_of_ext_exc_type(e)
 
   }
 
@@ -230,7 +228,7 @@ function exceptionType_to_str(e) =
     E_SAMO_Page_Fault()    => "store/amo-page-fault",
 
     /* extensions */
-    E_Extension(e)         => "extension-exception"
+    E_Extension(e)         => ext_exc_type_to_str(e)
   }
 
 overload to_str = {exceptionType_to_str}
diff --git a/model/riscv_types_common.sail b/model/riscv_types_common.sail
new file mode 100644
index 0000000..9db34a0
--- /dev/null
+++ b/model/riscv_types_common.sail
@@ -0,0 +1 @@
+type exc_code = bits(8)
diff --git a/model/riscv_types_ext.sail b/model/riscv_types_ext.sail
index 5a05c39..6562981 100644
--- a/model/riscv_types_ext.sail
+++ b/model/riscv_types_ext.sail
@@ -20,3 +20,15 @@ type ext_exc_type = unit /* No exception extensions */
 /* Default translation of PTW errors into exception annotations */
 function ext_translate_exception(e : ext_ptw_error) -> ext_exc_type =
   e
+
+/* Default conversion of extension exceptions to bits */
+val ext_exc_type_to_bits : ext_exc_type -> exc_code
+function ext_exc_type_to_bits(e) = 0x18 /* First code for a custom extension */
+
+/* Default conversion of extension exceptions to integers */
+val num_of_ext_exc_type : ext_exc_type -> {'n, (0 <= 'n < xlen). int('n)}
+function num_of_ext_exc_type(e) = 24 /* First code for a custom extension */
+
+/* Default conversion of extension exceptions to strings */
+val ext_exc_type_to_str : ext_exc_type -> string
+function ext_exc_type_to_str(e) = "extension-exception"