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| author | Brian Campbell <Brian.Campbell@ed.ac.uk> | 2019-08-14 16:40:42 +0100 |
|---|---|---|
| committer | Brian Campbell <Brian.Campbell@ed.ac.uk> | 2019-08-14 16:40:42 +0100 |
| commit | c0c70effa02100c16870251b2a27b79a1cab7331 (patch) | |
| tree | 8f0baad144df807735d46635387e4e11f9368cda | |
| parent | 503cb6eca4831609e46abf22a54d4ba4b663d2b5 (diff) | |
| download | sail-riscv-c0c70effa02100c16870251b2a27b79a1cab7331.zip sail-riscv-c0c70effa02100c16870251b2a27b79a1cab7331.tar.gz sail-riscv-c0c70effa02100c16870251b2a27b79a1cab7331.tar.bz2 | |
Update Coq snapshots
23 files changed, 6122 insertions, 2543 deletions
diff --git a/prover_snapshots/coq/README.md b/prover_snapshots/coq/README.md index 947255e..a709cfc 100644 --- a/prover_snapshots/coq/README.md +++ b/prover_snapshots/coq/README.md @@ -1,7 +1,7 @@ Check out a copy of <https://github.com/mit-plv/bbv> in the parent directory and build it. Then run `./build`. -The model was built with -* `sail` release 0.10, commit `da307c67` -* `sail-riscv` commit `7e6ffe2` +The models were built with +* `sail` commit `ba6d82bd` +* `sail-riscv` commit `503cb6e` and checked against bbv commit `143c47b` and coq 8.9.0. diff --git a/prover_snapshots/coq/RV32/riscv.v b/prover_snapshots/coq/RV32/riscv.v index d7f3c2e..5aa28ac 100644 --- a/prover_snapshots/coq/RV32/riscv.v +++ b/prover_snapshots/coq/RV32/riscv.v @@ -41,9 +41,9 @@ Definition __id (x : Z) : {_retval : Z & ArithFact (_retval = x)} := build_ex( Definition concat_str_bits {n : Z} (str : string) (x : mword n) : string := - concat_str str (string_of_bits x). + String.append str (string_of_bits x). -Definition concat_str_dec (str : string) (x : Z) : string := concat_str str (dec_str x). +Definition concat_str_dec (str : string) (x : Z) : string := String.append str (dec_str x). @@ -66,18 +66,18 @@ Definition slice_mask (n : Z) (i : Z) (l : Z) `{ArithFact (n >= 0)} Definition read_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 11)} : read_kind := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Read_plain - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Read_reserve - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Read_acquire - else if sumbool_of_bool ((Z.eqb p0_ 3)) then Read_exclusive - else if sumbool_of_bool ((Z.eqb p0_ 4)) then Read_exclusive_acquire - else if sumbool_of_bool ((Z.eqb p0_ 5)) then Read_stream - else if sumbool_of_bool ((Z.eqb p0_ 6)) then Read_RISCV_acquire - else if sumbool_of_bool ((Z.eqb p0_ 7)) then Read_RISCV_strong_acquire - else if sumbool_of_bool ((Z.eqb p0_ 8)) then Read_RISCV_reserved - else if sumbool_of_bool ((Z.eqb p0_ 9)) then Read_RISCV_reserved_acquire - else if sumbool_of_bool ((Z.eqb p0_ 10)) then Read_RISCV_reserved_strong_acquire + let l__203 := arg_ in + if sumbool_of_bool ((Z.eqb l__203 0)) then Read_plain + else if sumbool_of_bool ((Z.eqb l__203 1)) then Read_reserve + else if sumbool_of_bool ((Z.eqb l__203 2)) then Read_acquire + else if sumbool_of_bool ((Z.eqb l__203 3)) then Read_exclusive + else if sumbool_of_bool ((Z.eqb l__203 4)) then Read_exclusive_acquire + else if sumbool_of_bool ((Z.eqb l__203 5)) then Read_stream + else if sumbool_of_bool ((Z.eqb l__203 6)) then Read_RISCV_acquire + else if sumbool_of_bool ((Z.eqb l__203 7)) then Read_RISCV_strong_acquire + else if sumbool_of_bool ((Z.eqb l__203 8)) then Read_RISCV_reserved + else if sumbool_of_bool ((Z.eqb l__203 9)) then Read_RISCV_reserved_acquire + else if sumbool_of_bool ((Z.eqb l__203 10)) then Read_RISCV_reserved_strong_acquire else Read_X86_locked. Definition num_of_read_kind (arg_ : read_kind) @@ -101,17 +101,17 @@ Definition num_of_read_kind (arg_ : read_kind) Definition write_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 10)} : write_kind := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Write_plain - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Write_conditional - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Write_release - else if sumbool_of_bool ((Z.eqb p0_ 3)) then Write_exclusive - else if sumbool_of_bool ((Z.eqb p0_ 4)) then Write_exclusive_release - else if sumbool_of_bool ((Z.eqb p0_ 5)) then Write_RISCV_release - else if sumbool_of_bool ((Z.eqb p0_ 6)) then Write_RISCV_strong_release - else if sumbool_of_bool ((Z.eqb p0_ 7)) then Write_RISCV_conditional - else if sumbool_of_bool ((Z.eqb p0_ 8)) then Write_RISCV_conditional_release - else if sumbool_of_bool ((Z.eqb p0_ 9)) then Write_RISCV_conditional_strong_release + let l__193 := arg_ in + if sumbool_of_bool ((Z.eqb l__193 0)) then Write_plain + else if sumbool_of_bool ((Z.eqb l__193 1)) then Write_conditional + else if sumbool_of_bool ((Z.eqb l__193 2)) then Write_release + else if sumbool_of_bool ((Z.eqb l__193 3)) then Write_exclusive + else if sumbool_of_bool ((Z.eqb l__193 4)) then Write_exclusive_release + else if sumbool_of_bool ((Z.eqb l__193 5)) then Write_RISCV_release + else if sumbool_of_bool ((Z.eqb l__193 6)) then Write_RISCV_strong_release + else if sumbool_of_bool ((Z.eqb l__193 7)) then Write_RISCV_conditional + else if sumbool_of_bool ((Z.eqb l__193 8)) then Write_RISCV_conditional_release + else if sumbool_of_bool ((Z.eqb l__193 9)) then Write_RISCV_conditional_strong_release else Write_X86_locked. Definition num_of_write_kind (arg_ : write_kind) @@ -131,71 +131,44 @@ Definition num_of_write_kind (arg_ : write_kind) | Write_X86_locked => 10 end). -Definition barrier_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 23)} -: barrier_kind := +Definition a64_barrier_domain_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} +: a64_barrier_domain := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Barrier_Sync - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Barrier_LwSync - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Barrier_Eieio - else if sumbool_of_bool ((Z.eqb p0_ 3)) then Barrier_Isync - else if sumbool_of_bool ((Z.eqb p0_ 4)) then Barrier_DMB - else if sumbool_of_bool ((Z.eqb p0_ 5)) then Barrier_DMB_ST - else if sumbool_of_bool ((Z.eqb p0_ 6)) then Barrier_DMB_LD - else if sumbool_of_bool ((Z.eqb p0_ 7)) then Barrier_DSB - else if sumbool_of_bool ((Z.eqb p0_ 8)) then Barrier_DSB_ST - else if sumbool_of_bool ((Z.eqb p0_ 9)) then Barrier_DSB_LD - else if sumbool_of_bool ((Z.eqb p0_ 10)) then Barrier_ISB - else if sumbool_of_bool ((Z.eqb p0_ 11)) then Barrier_MIPS_SYNC - else if sumbool_of_bool ((Z.eqb p0_ 12)) then Barrier_RISCV_rw_rw - else if sumbool_of_bool ((Z.eqb p0_ 13)) then Barrier_RISCV_r_rw - else if sumbool_of_bool ((Z.eqb p0_ 14)) then Barrier_RISCV_r_r - else if sumbool_of_bool ((Z.eqb p0_ 15)) then Barrier_RISCV_rw_w - else if sumbool_of_bool ((Z.eqb p0_ 16)) then Barrier_RISCV_w_w - else if sumbool_of_bool ((Z.eqb p0_ 17)) then Barrier_RISCV_w_rw - else if sumbool_of_bool ((Z.eqb p0_ 18)) then Barrier_RISCV_rw_r - else if sumbool_of_bool ((Z.eqb p0_ 19)) then Barrier_RISCV_r_w - else if sumbool_of_bool ((Z.eqb p0_ 20)) then Barrier_RISCV_w_r - else if sumbool_of_bool ((Z.eqb p0_ 21)) then Barrier_RISCV_tso - else if sumbool_of_bool ((Z.eqb p0_ 22)) then Barrier_RISCV_i - else Barrier_x86_MFENCE. - -Definition num_of_barrier_kind (arg_ : barrier_kind) -: {e : Z & ArithFact (0 <= e /\ e <= 23)} := + let l__190 := arg_ in + if sumbool_of_bool ((Z.eqb l__190 0)) then A64_FullShare + else if sumbool_of_bool ((Z.eqb l__190 1)) then A64_InnerShare + else if sumbool_of_bool ((Z.eqb l__190 2)) then A64_OuterShare + else A64_NonShare. + +Definition num_of_a64_barrier_domain (arg_ : a64_barrier_domain) +: {e : Z & ArithFact (0 <= e /\ e <= 3)} := build_ex(match arg_ with - | Barrier_Sync => 0 - | Barrier_LwSync => 1 - | Barrier_Eieio => 2 - | Barrier_Isync => 3 - | Barrier_DMB => 4 - | Barrier_DMB_ST => 5 - | Barrier_DMB_LD => 6 - | Barrier_DSB => 7 - | Barrier_DSB_ST => 8 - | Barrier_DSB_LD => 9 - | Barrier_ISB => 10 - | Barrier_MIPS_SYNC => 11 - | Barrier_RISCV_rw_rw => 12 - | Barrier_RISCV_r_rw => 13 - | Barrier_RISCV_r_r => 14 - | Barrier_RISCV_rw_w => 15 - | Barrier_RISCV_w_w => 16 - | Barrier_RISCV_w_rw => 17 - | Barrier_RISCV_rw_r => 18 - | Barrier_RISCV_r_w => 19 - | Barrier_RISCV_w_r => 20 - | Barrier_RISCV_tso => 21 - | Barrier_RISCV_i => 22 - | Barrier_x86_MFENCE => 23 + | A64_FullShare => 0 + | A64_InnerShare => 1 + | A64_OuterShare => 2 + | A64_NonShare => 3 end). +Definition a64_barrier_type_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} +: a64_barrier_type := + + let l__188 := arg_ in + if sumbool_of_bool ((Z.eqb l__188 0)) then A64_barrier_all + else if sumbool_of_bool ((Z.eqb l__188 1)) then A64_barrier_LD + else A64_barrier_ST. + +Definition num_of_a64_barrier_type (arg_ : a64_barrier_type) +: {e : Z & ArithFact (0 <= e /\ e <= 2)} := + + build_ex(match arg_ with | A64_barrier_all => 0 | A64_barrier_LD => 1 | A64_barrier_ST => 2 end). + Definition trans_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : trans_kind := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Transaction_start - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Transaction_commit + let l__186 := arg_ in + if sumbool_of_bool ((Z.eqb l__186 0)) then Transaction_start + else if sumbool_of_bool ((Z.eqb l__186 1)) then Transaction_commit else Transaction_abort. Definition num_of_trans_kind (arg_ : trans_kind) @@ -210,17 +183,17 @@ Definition num_of_trans_kind (arg_ : trans_kind) Definition cache_op_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 10)} : cache_op_kind := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Cache_op_D_IVAC - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Cache_op_D_ISW - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Cache_op_D_CSW - else if sumbool_of_bool ((Z.eqb p0_ 3)) then Cache_op_D_CISW - else if sumbool_of_bool ((Z.eqb p0_ 4)) then Cache_op_D_ZVA - else if sumbool_of_bool ((Z.eqb p0_ 5)) then Cache_op_D_CVAC - else if sumbool_of_bool ((Z.eqb p0_ 6)) then Cache_op_D_CVAU - else if sumbool_of_bool ((Z.eqb p0_ 7)) then Cache_op_D_CIVAC - else if sumbool_of_bool ((Z.eqb p0_ 8)) then Cache_op_I_IALLUIS - else if sumbool_of_bool ((Z.eqb p0_ 9)) then Cache_op_I_IALLU + let l__176 := arg_ in + if sumbool_of_bool ((Z.eqb l__176 0)) then Cache_op_D_IVAC + else if sumbool_of_bool ((Z.eqb l__176 1)) then Cache_op_D_ISW + else if sumbool_of_bool ((Z.eqb l__176 2)) then Cache_op_D_CSW + else if sumbool_of_bool ((Z.eqb l__176 3)) then Cache_op_D_CISW + else if sumbool_of_bool ((Z.eqb l__176 4)) then Cache_op_D_ZVA + else if sumbool_of_bool ((Z.eqb l__176 5)) then Cache_op_D_CVAC + else if sumbool_of_bool ((Z.eqb l__176 6)) then Cache_op_D_CVAU + else if sumbool_of_bool ((Z.eqb l__176 7)) then Cache_op_D_CIVAC + else if sumbool_of_bool ((Z.eqb l__176 8)) then Cache_op_I_IALLUIS + else if sumbool_of_bool ((Z.eqb l__176 9)) then Cache_op_I_IALLU else Cache_op_I_IVAU. Definition num_of_cache_op_kind (arg_ : cache_op_kind) @@ -340,7 +313,7 @@ Fixpoint _rec_n_leading_spaces (s : string) (_reclimit : Z) (_acc : Acc (Zwf 0) (projT1 (build_ex (Z.add 1 w__0) - : {_atom : Z & ArithFact (exists ex70952_ , _atom = (1 + ex70952_) /\ 0 <= ex70952_)}))) + : {_atom : Z & ArithFact (exists ex97093_ , _atom = (1 + ex97093_) /\ 0 <= ex97093_)}))) else returnm (build_ex (0 : Z))) : M ({n : Z & ArithFact (n >= 0)})) : M ({n : Z & ArithFact (n >= 0)}). @@ -359,8 +332,8 @@ Definition spc_matches_prefix (s : string) : M (option ((unit * {n : Z & ArithFact (n >= 0)}))) := (n_leading_spaces s) >>= fun '(existT _ n _) => - let p0_ := n in - returnm ((if sumbool_of_bool ((Z.eqb p0_ 0)) then None + let l__175 := n in + returnm ((if sumbool_of_bool ((Z.eqb l__175 0)) then None else Some ((tt, build_ex n))) : option ((unit * {n : Z & ArithFact (n >= 0)}))). @@ -395,7 +368,7 @@ Definition hex_bits_1_backwards_matches (s : string) match s with | s => if ((match (hex_bits_1_matches_prefix s) with - | Some ((g__39, existT _ n _)) => + | Some ((g__253, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -427,7 +400,7 @@ Definition hex_bits_2_backwards_matches (s : string) match s with | s => if ((match (hex_bits_2_matches_prefix s) with - | Some ((g__38, existT _ n _)) => + | Some ((g__252, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -459,7 +432,7 @@ Definition hex_bits_3_backwards_matches (s : string) match s with | s => if ((match (hex_bits_3_matches_prefix s) with - | Some ((g__37, existT _ n _)) => + | Some ((g__251, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -491,7 +464,7 @@ Definition hex_bits_4_backwards_matches (s : string) match s with | s => if ((match (hex_bits_4_matches_prefix s) with - | Some ((g__36, existT _ n _)) => + | Some ((g__250, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -523,7 +496,7 @@ Definition hex_bits_5_backwards_matches (s : string) match s with | s => if ((match (hex_bits_5_matches_prefix s) with - | Some ((g__35, existT _ n _)) => + | Some ((g__249, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -555,7 +528,7 @@ Definition hex_bits_6_backwards_matches (s : string) match s with | s => if ((match (hex_bits_6_matches_prefix s) with - | Some ((g__34, existT _ n _)) => + | Some ((g__248, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -587,7 +560,7 @@ Definition hex_bits_7_backwards_matches (s : string) match s with | s => if ((match (hex_bits_7_matches_prefix s) with - | Some ((g__33, existT _ n _)) => + | Some ((g__247, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -619,7 +592,7 @@ Definition hex_bits_8_backwards_matches (s : string) match s with | s => if ((match (hex_bits_8_matches_prefix s) with - | Some ((g__32, existT _ n _)) => + | Some ((g__246, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -651,7 +624,7 @@ Definition hex_bits_9_backwards_matches (s : string) match s with | s => if ((match (hex_bits_9_matches_prefix s) with - | Some ((g__31, existT _ n _)) => + | Some ((g__245, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -683,7 +656,7 @@ Definition hex_bits_10_backwards_matches (s : string) match s with | s => if ((match (hex_bits_10_matches_prefix s) with - | Some ((g__30, existT _ n _)) => + | Some ((g__244, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -715,7 +688,7 @@ Definition hex_bits_11_backwards_matches (s : string) match s with | s => if ((match (hex_bits_11_matches_prefix s) with - | Some ((g__29, existT _ n _)) => + | Some ((g__243, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -747,7 +720,7 @@ Definition hex_bits_12_backwards_matches (s : string) match s with | s => if ((match (hex_bits_12_matches_prefix s) with - | Some ((g__28, existT _ n _)) => + | Some ((g__242, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -779,7 +752,7 @@ Definition hex_bits_13_backwards_matches (s : string) match s with | s => if ((match (hex_bits_13_matches_prefix s) with - | Some ((g__27, existT _ n _)) => + | Some ((g__241, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -811,7 +784,7 @@ Definition hex_bits_14_backwards_matches (s : string) match s with | s => if ((match (hex_bits_14_matches_prefix s) with - | Some ((g__26, existT _ n _)) => + | Some ((g__240, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -843,7 +816,7 @@ Definition hex_bits_15_backwards_matches (s : string) match s with | s => if ((match (hex_bits_15_matches_prefix s) with - | Some ((g__25, existT _ n _)) => + | Some ((g__239, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -875,7 +848,7 @@ Definition hex_bits_16_backwards_matches (s : string) match s with | s => if ((match (hex_bits_16_matches_prefix s) with - | Some ((g__24, existT _ n _)) => + | Some ((g__238, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -907,7 +880,7 @@ Definition hex_bits_17_backwards_matches (s : string) match s with | s => if ((match (hex_bits_17_matches_prefix s) with - | Some ((g__23, existT _ n _)) => + | Some ((g__237, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -939,7 +912,7 @@ Definition hex_bits_18_backwards_matches (s : string) match s with | s => if ((match (hex_bits_18_matches_prefix s) with - | Some ((g__22, existT _ n _)) => + | Some ((g__236, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -971,7 +944,7 @@ Definition hex_bits_19_backwards_matches (s : string) match s with | s => if ((match (hex_bits_19_matches_prefix s) with - | Some ((g__21, existT _ n _)) => + | Some ((g__235, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1003,7 +976,7 @@ Definition hex_bits_20_backwards_matches (s : string) match s with | s => if ((match (hex_bits_20_matches_prefix s) with - | Some ((g__20, existT _ n _)) => + | Some ((g__234, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1035,7 +1008,7 @@ Definition hex_bits_21_backwards_matches (s : string) match s with | s => if ((match (hex_bits_21_matches_prefix s) with - | Some ((g__19, existT _ n _)) => + | Some ((g__233, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1067,7 +1040,7 @@ Definition hex_bits_22_backwards_matches (s : string) match s with | s => if ((match (hex_bits_22_matches_prefix s) with - | Some ((g__18, existT _ n _)) => + | Some ((g__232, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1099,7 +1072,7 @@ Definition hex_bits_23_backwards_matches (s : string) match s with | s => if ((match (hex_bits_23_matches_prefix s) with - | Some ((g__17, existT _ n _)) => + | Some ((g__231, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1131,7 +1104,7 @@ Definition hex_bits_24_backwards_matches (s : string) match s with | s => if ((match (hex_bits_24_matches_prefix s) with - | Some ((g__16, existT _ n _)) => + | Some ((g__230, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1163,7 +1136,7 @@ Definition hex_bits_25_backwards_matches (s : string) match s with | s => if ((match (hex_bits_25_matches_prefix s) with - | Some ((g__15, existT _ n _)) => + | Some ((g__229, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1195,7 +1168,7 @@ Definition hex_bits_26_backwards_matches (s : string) match s with | s => if ((match (hex_bits_26_matches_prefix s) with - | Some ((g__14, existT _ n _)) => + | Some ((g__228, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1227,7 +1200,7 @@ Definition hex_bits_27_backwards_matches (s : string) match s with | s => if ((match (hex_bits_27_matches_prefix s) with - | Some ((g__13, existT _ n _)) => + | Some ((g__227, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1259,7 +1232,7 @@ Definition hex_bits_28_backwards_matches (s : string) match s with | s => if ((match (hex_bits_28_matches_prefix s) with - | Some ((g__12, existT _ n _)) => + | Some ((g__226, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1291,7 +1264,7 @@ Definition hex_bits_29_backwards_matches (s : string) match s with | s => if ((match (hex_bits_29_matches_prefix s) with - | Some ((g__11, existT _ n _)) => + | Some ((g__225, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1323,7 +1296,7 @@ Definition hex_bits_30_backwards_matches (s : string) match s with | s => if ((match (hex_bits_30_matches_prefix s) with - | Some ((g__10, existT _ n _)) => + | Some ((g__224, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1355,7 +1328,7 @@ Definition hex_bits_31_backwards_matches (s : string) match s with | s => if ((match (hex_bits_31_matches_prefix s) with - | Some ((g__9, existT _ n _)) => + | Some ((g__223, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1387,7 +1360,7 @@ Definition hex_bits_32_backwards_matches (s : string) match s with | s => if ((match (hex_bits_32_matches_prefix s) with - | Some ((g__8, existT _ n _)) => + | Some ((g__222, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1419,7 +1392,7 @@ Definition hex_bits_33_backwards_matches (s : string) match s with | s => if ((match (hex_bits_33_matches_prefix s) with - | Some ((g__7, existT _ n _)) => + | Some ((g__221, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1451,7 +1424,7 @@ Definition hex_bits_48_backwards_matches (s : string) match s with | s => if ((match (hex_bits_48_matches_prefix s) with - | Some ((g__6, existT _ n _)) => + | Some ((g__220, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1483,7 +1456,7 @@ Definition hex_bits_64_backwards_matches (s : string) match s with | s => if ((match (hex_bits_64_matches_prefix s) with - | Some ((g__5, existT _ n _)) => + | Some ((g__219, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1574,9 +1547,9 @@ Hint Unfold sp : sail. Definition Architecture_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : Architecture := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RV32 - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RV64 + let l__173 := arg_ in + if sumbool_of_bool ((Z.eqb l__173 0)) then RV32 + else if sumbool_of_bool ((Z.eqb l__173 1)) then RV64 else RV128. Definition num_of_Architecture (arg_ : Architecture) @@ -1605,9 +1578,9 @@ Definition arch_to_bits (a : Architecture) Definition Privilege_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : Privilege := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then User - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Supervisor + let l__171 := arg_ in + if sumbool_of_bool ((Z.eqb l__171 0)) then User + else if sumbool_of_bool ((Z.eqb l__171 1)) then Supervisor else Machine. Definition num_of_Privilege (arg_ : Privilege) @@ -1644,8 +1617,8 @@ Definition privLevel_to_str (p : Privilege) Definition Retired_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 1)} : Retired := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RETIRE_SUCCESS + let l__170 := arg_ in + if sumbool_of_bool ((Z.eqb l__170 0)) then RETIRE_SUCCESS else RETIRE_FAIL. Definition num_of_Retired (arg_ : Retired) @@ -1656,10 +1629,10 @@ Definition num_of_Retired (arg_ : Retired) Definition AccessType_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} : AccessType := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Read - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Write - else if sumbool_of_bool ((Z.eqb p0_ 2)) then ReadWrite + let l__167 := arg_ in + if sumbool_of_bool ((Z.eqb l__167 0)) then Read + else if sumbool_of_bool ((Z.eqb l__167 1)) then Write + else if sumbool_of_bool ((Z.eqb l__167 2)) then ReadWrite else Execute. Definition num_of_AccessType (arg_ : AccessType) @@ -1675,10 +1648,10 @@ Definition accessType_to_str (a : AccessType) Definition word_width_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} : word_width := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then BYTE - else if sumbool_of_bool ((Z.eqb p0_ 1)) then HALF - else if sumbool_of_bool ((Z.eqb p0_ 2)) then WORD + let l__164 := arg_ in + if sumbool_of_bool ((Z.eqb l__164 0)) then BYTE + else if sumbool_of_bool ((Z.eqb l__164 1)) then HALF + else if sumbool_of_bool ((Z.eqb l__164 2)) then WORD else DOUBLE. Definition num_of_word_width (arg_ : word_width) @@ -1689,15 +1662,15 @@ Definition num_of_word_width (arg_ : word_width) Definition InterruptType_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 8)} : InterruptType := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then I_U_Software - else if sumbool_of_bool ((Z.eqb p0_ 1)) then I_S_Software - else if sumbool_of_bool ((Z.eqb p0_ 2)) then I_M_Software - else if sumbool_of_bool ((Z.eqb p0_ 3)) then I_U_Timer - else if sumbool_of_bool ((Z.eqb p0_ 4)) then I_S_Timer - else if sumbool_of_bool ((Z.eqb p0_ 5)) then I_M_Timer - else if sumbool_of_bool ((Z.eqb p0_ 6)) then I_U_External - else if sumbool_of_bool ((Z.eqb p0_ 7)) then I_S_External + let l__156 := arg_ in + if sumbool_of_bool ((Z.eqb l__156 0)) then I_U_Software + else if sumbool_of_bool ((Z.eqb l__156 1)) then I_S_Software + else if sumbool_of_bool ((Z.eqb l__156 2)) then I_M_Software + else if sumbool_of_bool ((Z.eqb l__156 3)) then I_U_Timer + else if sumbool_of_bool ((Z.eqb l__156 4)) then I_S_Timer + else if sumbool_of_bool ((Z.eqb l__156 5)) then I_M_Timer + else if sumbool_of_bool ((Z.eqb l__156 6)) then I_U_External + else if sumbool_of_bool ((Z.eqb l__156 7)) then I_S_External else I_M_External. Definition num_of_InterruptType (arg_ : InterruptType) @@ -1733,23 +1706,23 @@ Definition interruptType_to_bits (i : InterruptType) Definition ExceptionType_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 16)} : ExceptionType := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then E_Fetch_Addr_Align - else if sumbool_of_bool ((Z.eqb p0_ 1)) then E_Fetch_Access_Fault - else if sumbool_of_bool ((Z.eqb p0_ 2)) then E_Illegal_Instr - else if sumbool_of_bool ((Z.eqb p0_ 3)) then E_Breakpoint - else if sumbool_of_bool ((Z.eqb p0_ 4)) then E_Load_Addr_Align - else if sumbool_of_bool ((Z.eqb p0_ 5)) then E_Load_Access_Fault - else if sumbool_of_bool ((Z.eqb p0_ 6)) then E_SAMO_Addr_Align - else if sumbool_of_bool ((Z.eqb p0_ 7)) then E_SAMO_Access_Fault - else if sumbool_of_bool ((Z.eqb p0_ 8)) then E_U_EnvCall - else if sumbool_of_bool ((Z.eqb p0_ 9)) then E_S_EnvCall - else if sumbool_of_bool ((Z.eqb p0_ 10)) then E_Reserved_10 - else if sumbool_of_bool ((Z.eqb p0_ 11)) then E_M_EnvCall - else if sumbool_of_bool ((Z.eqb p0_ 12)) then E_Fetch_Page_Fault - else if sumbool_of_bool ((Z.eqb p0_ 13)) then E_Load_Page_Fault - else if sumbool_of_bool ((Z.eqb p0_ 14)) then E_Reserved_14 - else if sumbool_of_bool ((Z.eqb p0_ 15)) then E_SAMO_Page_Fault + let l__140 := arg_ in + if sumbool_of_bool ((Z.eqb l__140 0)) then E_Fetch_Addr_Align + else if sumbool_of_bool ((Z.eqb l__140 1)) then E_Fetch_Access_Fault + else if sumbool_of_bool ((Z.eqb l__140 2)) then E_Illegal_Instr + else if sumbool_of_bool ((Z.eqb l__140 3)) then E_Breakpoint + else if sumbool_of_bool ((Z.eqb l__140 4)) then E_Load_Addr_Align + else if sumbool_of_bool ((Z.eqb l__140 5)) then E_Load_Access_Fault + else if sumbool_of_bool ((Z.eqb l__140 6)) then E_SAMO_Addr_Align + else if sumbool_of_bool ((Z.eqb l__140 7)) then E_SAMO_Access_Fault + else if sumbool_of_bool ((Z.eqb l__140 8)) then E_U_EnvCall + else if sumbool_of_bool ((Z.eqb l__140 9)) then E_S_EnvCall + else if sumbool_of_bool ((Z.eqb l__140 10)) then E_Reserved_10 + else if sumbool_of_bool ((Z.eqb l__140 11)) then E_M_EnvCall + else if sumbool_of_bool ((Z.eqb l__140 12)) then E_Fetch_Page_Fault + else if sumbool_of_bool ((Z.eqb l__140 13)) then E_Load_Page_Fault + else if sumbool_of_bool ((Z.eqb l__140 14)) then E_Reserved_14 + else if sumbool_of_bool ((Z.eqb l__140 15)) then E_SAMO_Page_Fault else E_CHERI. Definition num_of_ExceptionType (arg_ : ExceptionType) @@ -1835,9 +1808,9 @@ Definition internal_error {a : Type} (s : string) Definition TrapVectorMode_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : TrapVectorMode := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then TV_Direct - else if sumbool_of_bool ((Z.eqb p0_ 1)) then TV_Vector + let l__138 := arg_ in + if sumbool_of_bool ((Z.eqb l__138 0)) then TV_Direct + else if sumbool_of_bool ((Z.eqb l__138 1)) then TV_Vector else TV_Reserved. Definition num_of_TrapVectorMode (arg_ : TrapVectorMode) @@ -1856,10 +1829,10 @@ Definition trapVectorMode_of_bits (m : mword 2) Definition ExtStatus_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} : ExtStatus := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Off - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Initial - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Clean + let l__135 := arg_ in + if sumbool_of_bool ((Z.eqb l__135 0)) then Off + else if sumbool_of_bool ((Z.eqb l__135 1)) then Initial + else if sumbool_of_bool ((Z.eqb l__135 2)) then Clean else Dirty. Definition num_of_ExtStatus (arg_ : ExtStatus) @@ -1893,10 +1866,10 @@ Definition extStatus_of_bits (e : mword 2) Definition SATPMode_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} : SATPMode := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Sbare - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Sv32 - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Sv39 + let l__132 := arg_ in + if sumbool_of_bool ((Z.eqb l__132 0)) then Sbare + else if sumbool_of_bool ((Z.eqb l__132 1)) then Sv32 + else if sumbool_of_bool ((Z.eqb l__132 2)) then Sv39 else Sv48. Definition num_of_SATPMode (arg_ : SATPMode) @@ -1908,10 +1881,10 @@ Definition satp64Mode_of_bits (a : Architecture) (m : mword 4) : option SATPMode := match (a, m) with - | (g__4, b__0) => + | (g__218, b__0) => if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0] : mword 4))) then Some (Sbare) else - match (g__4, b__0) with + match (g__218, b__0) with | (RV32, b__0) => if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1] : mword 4))) then Some (Sv32) else match (RV32, b__0) with | (_, _) => None end @@ -1926,8 +1899,8 @@ Definition satp64Mode_of_bits (a : Architecture) (m : mword 4) Definition uop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 1)} : uop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_LUI + let l__131 := arg_ in + if sumbool_of_bool ((Z.eqb l__131 0)) then RISCV_LUI else RISCV_AUIPC. Definition num_of_uop (arg_ : uop) @@ -1938,12 +1911,12 @@ Definition num_of_uop (arg_ : uop) Definition bop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 5)} : bop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_BEQ - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_BNE - else if sumbool_of_bool ((Z.eqb p0_ 2)) then RISCV_BLT - else if sumbool_of_bool ((Z.eqb p0_ 3)) then RISCV_BGE - else if sumbool_of_bool ((Z.eqb p0_ 4)) then RISCV_BLTU + let l__126 := arg_ in + if sumbool_of_bool ((Z.eqb l__126 0)) then RISCV_BEQ + else if sumbool_of_bool ((Z.eqb l__126 1)) then RISCV_BNE + else if sumbool_of_bool ((Z.eqb l__126 2)) then RISCV_BLT + else if sumbool_of_bool ((Z.eqb l__126 3)) then RISCV_BGE + else if sumbool_of_bool ((Z.eqb l__126 4)) then RISCV_BLTU else RISCV_BGEU. Definition num_of_bop (arg_ : bop) @@ -1961,12 +1934,12 @@ Definition num_of_bop (arg_ : bop) Definition iop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 5)} : iop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_ADDI - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_SLTI - else if sumbool_of_bool ((Z.eqb p0_ 2)) then RISCV_SLTIU - else if sumbool_of_bool ((Z.eqb p0_ 3)) then RISCV_XORI - else if sumbool_of_bool ((Z.eqb p0_ 4)) then RISCV_ORI + let l__121 := arg_ in + if sumbool_of_bool ((Z.eqb l__121 0)) then RISCV_ADDI + else if sumbool_of_bool ((Z.eqb l__121 1)) then RISCV_SLTI + else if sumbool_of_bool ((Z.eqb l__121 2)) then RISCV_SLTIU + else if sumbool_of_bool ((Z.eqb l__121 3)) then RISCV_XORI + else if sumbool_of_bool ((Z.eqb l__121 4)) then RISCV_ORI else RISCV_ANDI. Definition num_of_iop (arg_ : iop) @@ -1984,9 +1957,9 @@ Definition num_of_iop (arg_ : iop) Definition sop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : sop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_SLLI - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_SRLI + let l__119 := arg_ in + if sumbool_of_bool ((Z.eqb l__119 0)) then RISCV_SLLI + else if sumbool_of_bool ((Z.eqb l__119 1)) then RISCV_SRLI else RISCV_SRAI. Definition num_of_sop (arg_ : sop) @@ -1997,16 +1970,16 @@ Definition num_of_sop (arg_ : sop) Definition rop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 9)} : rop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_ADD - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_SUB - else if sumbool_of_bool ((Z.eqb p0_ 2)) then RISCV_SLL - else if sumbool_of_bool ((Z.eqb p0_ 3)) then RISCV_SLT - else if sumbool_of_bool ((Z.eqb p0_ 4)) then RISCV_SLTU - else if sumbool_of_bool ((Z.eqb p0_ 5)) then RISCV_XOR - else if sumbool_of_bool ((Z.eqb p0_ 6)) then RISCV_SRL - else if sumbool_of_bool ((Z.eqb p0_ 7)) then RISCV_SRA - else if sumbool_of_bool ((Z.eqb p0_ 8)) then RISCV_OR + let l__110 := arg_ in + if sumbool_of_bool ((Z.eqb l__110 0)) then RISCV_ADD + else if sumbool_of_bool ((Z.eqb l__110 1)) then RISCV_SUB + else if sumbool_of_bool ((Z.eqb l__110 2)) then RISCV_SLL + else if sumbool_of_bool ((Z.eqb l__110 3)) then RISCV_SLT + else if sumbool_of_bool ((Z.eqb l__110 4)) then RISCV_SLTU + else if sumbool_of_bool ((Z.eqb l__110 5)) then RISCV_XOR + else if sumbool_of_bool ((Z.eqb l__110 6)) then RISCV_SRL + else if sumbool_of_bool ((Z.eqb l__110 7)) then RISCV_SRA + else if sumbool_of_bool ((Z.eqb l__110 8)) then RISCV_OR else RISCV_AND. Definition num_of_rop (arg_ : rop) @@ -2028,11 +2001,11 @@ Definition num_of_rop (arg_ : rop) Definition ropw_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 4)} : ropw := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_ADDW - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_SUBW - else if sumbool_of_bool ((Z.eqb p0_ 2)) then RISCV_SLLW - else if sumbool_of_bool ((Z.eqb p0_ 3)) then RISCV_SRLW + let l__106 := arg_ in + if sumbool_of_bool ((Z.eqb l__106 0)) then RISCV_ADDW + else if sumbool_of_bool ((Z.eqb l__106 1)) then RISCV_SUBW + else if sumbool_of_bool ((Z.eqb l__106 2)) then RISCV_SLLW + else if sumbool_of_bool ((Z.eqb l__106 3)) then RISCV_SRLW else RISCV_SRAW. Definition num_of_ropw (arg_ : ropw) @@ -2049,9 +2022,9 @@ Definition num_of_ropw (arg_ : ropw) Definition sopw_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : sopw := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_SLLIW - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_SRLIW + let l__104 := arg_ in + if sumbool_of_bool ((Z.eqb l__104 0)) then RISCV_SLLIW + else if sumbool_of_bool ((Z.eqb l__104 1)) then RISCV_SRLIW else RISCV_SRAIW. Definition num_of_sopw (arg_ : sopw) @@ -2062,15 +2035,15 @@ Definition num_of_sopw (arg_ : sopw) Definition amoop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 8)} : amoop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then AMOSWAP - else if sumbool_of_bool ((Z.eqb p0_ 1)) then AMOADD - else if sumbool_of_bool ((Z.eqb p0_ 2)) then AMOXOR - else if sumbool_of_bool ((Z.eqb p0_ 3)) then AMOAND - else if sumbool_of_bool ((Z.eqb p0_ 4)) then AMOOR - else if sumbool_of_bool ((Z.eqb p0_ 5)) then AMOMIN - else if sumbool_of_bool ((Z.eqb p0_ 6)) then AMOMAX - else if sumbool_of_bool ((Z.eqb p0_ 7)) then AMOMINU + let l__96 := arg_ in + if sumbool_of_bool ((Z.eqb l__96 0)) then AMOSWAP + else if sumbool_of_bool ((Z.eqb l__96 1)) then AMOADD + else if sumbool_of_bool ((Z.eqb l__96 2)) then AMOXOR + else if sumbool_of_bool ((Z.eqb l__96 3)) then AMOAND + else if sumbool_of_bool ((Z.eqb l__96 4)) then AMOOR + else if sumbool_of_bool ((Z.eqb l__96 5)) then AMOMIN + else if sumbool_of_bool ((Z.eqb l__96 6)) then AMOMAX + else if sumbool_of_bool ((Z.eqb l__96 7)) then AMOMINU else AMOMAXU. Definition num_of_amoop (arg_ : amoop) @@ -2091,9 +2064,9 @@ Definition num_of_amoop (arg_ : amoop) Definition csrop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : csrop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then CSRRW - else if sumbool_of_bool ((Z.eqb p0_ 1)) then CSRRS + let l__94 := arg_ in + if sumbool_of_bool ((Z.eqb l__94 0)) then CSRRW + else if sumbool_of_bool ((Z.eqb l__94 1)) then CSRRS else CSRRC. Definition num_of_csrop (arg_ : csrop) @@ -2495,81 +2468,99 @@ Definition regval_into_reg (v : mword 32) : mword 32 := v. Definition rX (r : Z) `{ArithFact (0 <= r /\ r < 32)} : M (mword 32) := - let p0_ := r in - (if sumbool_of_bool ((Z.eqb p0_ 0)) then returnm (zero_reg : mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 1)) then ((read_reg x1_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 2)) then ((read_reg x2_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 3)) then ((read_reg x3_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 4)) then ((read_reg x4_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 5)) then ((read_reg x5_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 6)) then ((read_reg x6_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 7)) then ((read_reg x7_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 8)) then ((read_reg x8_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 9)) then ((read_reg x9_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 10)) then + let l__62 := r in + (if sumbool_of_bool ((Z.eqb l__62 0)) then returnm (zero_reg : mword 32) + else if sumbool_of_bool ((Z.eqb l__62 1)) then + ((read_reg x1_ref) : M (mword 32)) + : M (mword 32) + else if sumbool_of_bool ((Z.eqb l__62 2)) then + ((read_reg x2_ref) : M (mword 32)) + : M (mword 32) + else if sumbool_of_bool ((Z.eqb l__62 3)) then + ((read_reg x3_ref) : M (mword 32)) + : M (mword 32) + else if sumbool_of_bool ((Z.eqb l__62 4)) then + ((read_reg x4_ref) : M (mword 32)) + : M (mword 32) + else if sumbool_of_bool ((Z.eqb l__62 5)) then + ((read_reg x5_ref) : M (mword 32)) + : M (mword 32) + else if sumbool_of_bool ((Z.eqb l__62 6)) then + ((read_reg x6_ref) : M (mword 32)) + : M (mword 32) + else if sumbool_of_bool ((Z.eqb l__62 7)) then + ((read_reg x7_ref) : M (mword 32)) + : M (mword 32) + else if sumbool_of_bool ((Z.eqb l__62 8)) then + ((read_reg x8_ref) : M (mword 32)) + : M (mword 32) + else if sumbool_of_bool ((Z.eqb l__62 9)) then + ((read_reg x9_ref) : M (mword 32)) + : M (mword 32) + else if sumbool_of_bool ((Z.eqb l__62 10)) then ((read_reg x10_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 11)) then + else if sumbool_of_bool ((Z.eqb l__62 11)) then ((read_reg x11_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 12)) then + else if sumbool_of_bool ((Z.eqb l__62 12)) then ((read_reg x12_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 13)) then + else if sumbool_of_bool ((Z.eqb l__62 13)) then ((read_reg x13_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 14)) then + else if sumbool_of_bool ((Z.eqb l__62 14)) then ((read_reg x14_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 15)) then + else if sumbool_of_bool ((Z.eqb l__62 15)) then ((read_reg x15_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 16)) then + else if sumbool_of_bool ((Z.eqb l__62 16)) then ((read_reg x16_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 17)) then + else if sumbool_of_bool ((Z.eqb l__62 17)) then ((read_reg x17_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 18)) then + else if sumbool_of_bool ((Z.eqb l__62 18)) then ((read_reg x18_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 19)) then + else if sumbool_of_bool ((Z.eqb l__62 19)) then ((read_reg x19_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 20)) then + else if sumbool_of_bool ((Z.eqb l__62 20)) then ((read_reg x20_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 21)) then + else if sumbool_of_bool ((Z.eqb l__62 21)) then ((read_reg x21_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 22)) then + else if sumbool_of_bool ((Z.eqb l__62 22)) then ((read_reg x22_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 23)) then + else if sumbool_of_bool ((Z.eqb l__62 23)) then ((read_reg x23_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 24)) then + else if sumbool_of_bool ((Z.eqb l__62 24)) then ((read_reg x24_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 25)) then + else if sumbool_of_bool ((Z.eqb l__62 25)) then ((read_reg x25_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 26)) then + else if sumbool_of_bool ((Z.eqb l__62 26)) then ((read_reg x26_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 27)) then + else if sumbool_of_bool ((Z.eqb l__62 27)) then ((read_reg x27_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 28)) then + else if sumbool_of_bool ((Z.eqb l__62 28)) then ((read_reg x28_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 29)) then + else if sumbool_of_bool ((Z.eqb l__62 29)) then ((read_reg x29_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 30)) then + else if sumbool_of_bool ((Z.eqb l__62 30)) then ((read_reg x30_ref) : M (mword 32)) : M (mword 32) - else if sumbool_of_bool ((Z.eqb p0_ 31)) then + else if sumbool_of_bool ((Z.eqb l__62 31)) then ((read_reg x31_ref) : M (mword 32)) : M (mword 32) else assert_exp' false "invalid register number" >>= fun _ => exit tt) >>= fun v : regtype => @@ -2582,45 +2573,46 @@ Definition wX (r : Z) (in_v : mword 32) `{ArithFact (0 <= r /\ r < 32)} : M (unit) := let v := regval_into_reg in_v in - let p0_ := r in - (if sumbool_of_bool ((Z.eqb p0_ 0)) then returnm (tt : unit) - else if sumbool_of_bool ((Z.eqb p0_ 1)) then write_reg x1_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 2)) then write_reg x2_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 3)) then write_reg x3_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 4)) then write_reg x4_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 5)) then write_reg x5_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 6)) then write_reg x6_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 7)) then write_reg x7_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 8)) then write_reg x8_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 9)) then write_reg x9_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 10)) then write_reg x10_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 11)) then write_reg x11_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 12)) then write_reg x12_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 13)) then write_reg x13_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 14)) then write_reg x14_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 15)) then write_reg x15_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 16)) then write_reg x16_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 17)) then write_reg x17_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 18)) then write_reg x18_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 19)) then write_reg x19_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 20)) then write_reg x20_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 21)) then write_reg x21_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 22)) then write_reg x22_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 23)) then write_reg x23_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 24)) then write_reg x24_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 25)) then write_reg x25_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 26)) then write_reg x26_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 27)) then write_reg x27_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 28)) then write_reg x28_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 29)) then write_reg x29_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 30)) then write_reg x30_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 31)) then write_reg x31_ref v : M (unit) + let l__30 := r in + (if sumbool_of_bool ((Z.eqb l__30 0)) then returnm (tt : unit) + else if sumbool_of_bool ((Z.eqb l__30 1)) then write_reg x1_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 2)) then write_reg x2_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 3)) then write_reg x3_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 4)) then write_reg x4_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 5)) then write_reg x5_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 6)) then write_reg x6_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 7)) then write_reg x7_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 8)) then write_reg x8_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 9)) then write_reg x9_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 10)) then write_reg x10_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 11)) then write_reg x11_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 12)) then write_reg x12_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 13)) then write_reg x13_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 14)) then write_reg x14_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 15)) then write_reg x15_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 16)) then write_reg x16_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 17)) then write_reg x17_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 18)) then write_reg x18_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 19)) then write_reg x19_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 20)) then write_reg x20_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 21)) then write_reg x21_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 22)) then write_reg x22_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 23)) then write_reg x23_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 24)) then write_reg x24_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 25)) then write_reg x25_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 26)) then write_reg x26_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 27)) then write_reg x27_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 28)) then write_reg x28_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 29)) then write_reg x29_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 30)) then write_reg x30_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__30 31)) then write_reg x31_ref v : M (unit) else assert_exp' false "invalid register number" >>= fun _ => exit tt) >> returnm ((if sumbool_of_bool ((projT1 (neq_int r 0))) then let '_ := (rvfi_wX r in_v) : unit in if ((get_config_print_reg tt)) then print_endline - (concat_str "x" (concat_str (string_of_int r) (concat_str " <- " (RegStr v)))) + (String.append "x" + (String.append (string_of_int r) (String.append " <- " (RegStr v)))) else tt else tt) : unit). @@ -2629,166 +2621,38 @@ Definition reg_name_abi (r : mword 5) : M (string) := let b__0 := r in - (if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))))) then - returnm ("zero" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))))) then - returnm ("ra" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))))) then - returnm ("sp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))))) then - returnm ("gp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))))) then - returnm ("tp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))))) then - returnm ("t0" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))))) then - returnm ("t1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))))) then - returnm ("t2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))))) then - returnm ("fp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))))) then - returnm ("s1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))))) then - returnm ("a0" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))))) then - returnm ("a1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))))) then - returnm ("a2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))))) then - returnm ("a3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))))) then - returnm ("a4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))))) then - returnm ("a5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))))) then - returnm ("a6" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))))) then - returnm ("a7" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))))) then - returnm ("s2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))))) then - returnm ("s3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))))) then - returnm ("s4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))))) then - returnm ("s5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))))) then - returnm ("s6" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))))) then - returnm ("s7" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))))) then - returnm ("s8" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))))) then - returnm ("s9" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))))) then - returnm ("s10" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))))) then - returnm ("s11" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))))) then - returnm ("t3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))))) then - returnm ("t4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))))) then - returnm ("t5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))))) then - returnm ("t6" - : string) + (if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))) then returnm ("zero" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))) then returnm ("ra" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))) then returnm ("sp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))) then returnm ("gp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))) then returnm ("tp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))) then returnm ("t0" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))) then returnm ("t1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))) then returnm ("t2" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))) then returnm ("fp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))) then returnm ("s1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))) then returnm ("a0" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))) then returnm ("a1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))) then returnm ("a2" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))) then returnm ("a3" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))) then returnm ("a4" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))) then returnm ("a5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))) then returnm ("a6" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))) then returnm ("a7" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))) then returnm ("s2" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))) then returnm ("s3" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))) then returnm ("s4" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))) then returnm ("s5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))) then returnm ("s6" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))) then returnm ("s7" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))) then returnm ("s8" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))) then returnm ("s9" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))) then returnm ("s10" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))) then returnm ("s11" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))) then returnm ("t3" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))) then returnm ("t4" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))) then returnm ("t5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))) then returnm ("t6" : string) else assert_exp' false "Pattern match failure at model/riscv_regs.sail 149:2 - 182:3" >>= fun _ => exit tt) @@ -2798,166 +2662,38 @@ Definition reg_name_forwards (arg_ : mword 5) : M (string) := let b__0 := arg_ in - (if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))))) then - returnm ("zero" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))))) then - returnm ("ra" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))))) then - returnm ("sp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))))) then - returnm ("gp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))))) then - returnm ("tp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))))) then - returnm ("t0" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))))) then - returnm ("t1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))))) then - returnm ("t2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))))) then - returnm ("fp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))))) then - returnm ("s1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))))) then - returnm ("a0" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))))) then - returnm ("a1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))))) then - returnm ("a2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))))) then - returnm ("a3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))))) then - returnm ("a4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))))) then - returnm ("a5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))))) then - returnm ("a6" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))))) then - returnm ("a7" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))))) then - returnm ("s2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))))) then - returnm ("s3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))))) then - returnm ("s4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))))) then - returnm ("s5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))))) then - returnm ("s6" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))))) then - returnm ("s7" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))))) then - returnm ("s8" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))))) then - returnm ("s9" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))))) then - returnm ("s10" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))))) then - returnm ("s11" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))))) then - returnm ("t3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))))) then - returnm ("t4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))))) then - returnm ("t5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))))) then - returnm ("t6" - : string) + (if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))) then returnm ("zero" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))) then returnm ("ra" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))) then returnm ("sp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))) then returnm ("gp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))) then returnm ("tp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))) then returnm ("t0" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))) then returnm ("t1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))) then returnm ("t2" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))) then returnm ("fp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))) then returnm ("s1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))) then returnm ("a0" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))) then returnm ("a1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))) then returnm ("a2" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))) then returnm ("a3" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))) then returnm ("a4" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))) then returnm ("a5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))) then returnm ("a6" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))) then returnm ("a7" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))) then returnm ("s2" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))) then returnm ("s3" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))) then returnm ("s4" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))) then returnm ("s5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))) then returnm ("s6" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))) then returnm ("s7" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))) then returnm ("s8" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))) then returnm ("s9" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))) then returnm ("s10" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))) then returnm ("s11" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))) then returnm ("t3" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))) then returnm ("t4" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))) then returnm ("t5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))) then returnm ("t6" : string) else assert_exp' false "Pattern match failure at unknown location" >>= fun _ => exit tt) : M (string). @@ -3066,134 +2802,38 @@ Definition reg_name_forwards_matches (arg_ : mword 5) : bool := let b__0 := arg_ in - if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))))) then - true + if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))) then true else false. Definition reg_name_backwards_matches (arg_ : string) @@ -7373,10 +7013,10 @@ Definition legalize_satp32 (a : Architecture) (o : mword 32) (v : mword 32) : m Definition PmpAddrMatchType_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} : PmpAddrMatchType := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then OFF - else if sumbool_of_bool ((Z.eqb p0_ 1)) then TOR - else if sumbool_of_bool ((Z.eqb p0_ 2)) then NA4 + let l__27 := arg_ in + if sumbool_of_bool ((Z.eqb l__27 0)) then OFF + else if sumbool_of_bool ((Z.eqb l__27 1)) then TOR + else if sumbool_of_bool ((Z.eqb l__27 2)) then NA4 else NAPOT. Definition num_of_PmpAddrMatchType (arg_ : PmpAddrMatchType) @@ -7567,8 +7207,8 @@ Definition _update_Pmpcfg_ent_R (v : Pmpcfg_ent) (x : mword 1) Definition pmpReadCfgReg (n : Z) `{ArithFact (0 <= n /\ n < 4)} : M (mword 32) := - let p0_ := n in - (if sumbool_of_bool ((Z.eqb p0_ 0)) then + let l__23 := n in + (if sumbool_of_bool ((Z.eqb l__23 0)) then read_reg pmp3cfg_ref >>= fun w__0 : Pmpcfg_ent => read_reg pmp2cfg_ref >>= fun w__1 : Pmpcfg_ent => read_reg pmp1cfg_ref >>= fun w__2 : Pmpcfg_ent => @@ -7577,7 +7217,7 @@ Definition pmpReadCfgReg (n : Z) `{ArithFact (0 <= n /\ n < 4)} (concat_vec (_get_Pmpcfg_ent_bits w__1) (concat_vec (_get_Pmpcfg_ent_bits w__2) (_get_Pmpcfg_ent_bits w__3)))) : mword (8 + (8 + (8 + 8)))) - else if sumbool_of_bool ((Z.eqb p0_ 1)) then + else if sumbool_of_bool ((Z.eqb l__23 1)) then read_reg pmp7cfg_ref >>= fun w__4 : Pmpcfg_ent => read_reg pmp6cfg_ref >>= fun w__5 : Pmpcfg_ent => read_reg pmp5cfg_ref >>= fun w__6 : Pmpcfg_ent => @@ -7586,7 +7226,7 @@ Definition pmpReadCfgReg (n : Z) `{ArithFact (0 <= n /\ n < 4)} (concat_vec (_get_Pmpcfg_ent_bits w__5) (concat_vec (_get_Pmpcfg_ent_bits w__6) (_get_Pmpcfg_ent_bits w__7)))) : mword (8 + (8 + (8 + 8)))) - else if sumbool_of_bool ((Z.eqb p0_ 2)) then + else if sumbool_of_bool ((Z.eqb l__23 2)) then read_reg pmp11cfg_ref >>= fun w__8 : Pmpcfg_ent => read_reg pmp10cfg_ref >>= fun w__9 : Pmpcfg_ent => read_reg pmp9cfg_ref >>= fun w__10 : Pmpcfg_ent => @@ -7595,7 +7235,7 @@ Definition pmpReadCfgReg (n : Z) `{ArithFact (0 <= n /\ n < 4)} (concat_vec (_get_Pmpcfg_ent_bits w__9) (concat_vec (_get_Pmpcfg_ent_bits w__10) (_get_Pmpcfg_ent_bits w__11)))) : mword (8 + (8 + (8 + 8)))) - else if sumbool_of_bool ((Z.eqb p0_ 3)) then + else if sumbool_of_bool ((Z.eqb l__23 3)) then read_reg pmp15cfg_ref >>= fun w__12 : Pmpcfg_ent => read_reg pmp14cfg_ref >>= fun w__13 : Pmpcfg_ent => read_reg pmp13cfg_ref >>= fun w__14 : Pmpcfg_ent => @@ -7618,8 +7258,8 @@ Definition pmpWriteCfg (cfg : Pmpcfg_ent) (v : mword 8) Definition pmpWriteCfgReg (n : Z) (v : mword 32) `{ArithFact (0 <= n /\ n < 4)} : M (unit) := - let p0_ := n in - (if sumbool_of_bool ((Z.eqb p0_ 0)) then + let l__19 := n in + (if sumbool_of_bool ((Z.eqb l__19 0)) then read_reg pmp0cfg_ref >>= fun w__0 : Pmpcfg_ent => write_reg pmp0cfg_ref (pmpWriteCfg w__0 (subrange_vec_dec v 7 0)) >> read_reg pmp1cfg_ref >>= fun w__1 : Pmpcfg_ent => @@ -7629,7 +7269,7 @@ Definition pmpWriteCfgReg (n : Z) (v : mword 32) `{ArithFact (0 <= n /\ n < 4)} read_reg pmp3cfg_ref >>= fun w__3 : Pmpcfg_ent => write_reg pmp3cfg_ref (pmpWriteCfg w__3 (subrange_vec_dec v 31 24)) : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 1)) then + else if sumbool_of_bool ((Z.eqb l__19 1)) then read_reg pmp4cfg_ref >>= fun w__4 : Pmpcfg_ent => write_reg pmp4cfg_ref (pmpWriteCfg w__4 (subrange_vec_dec v 7 0)) >> read_reg pmp5cfg_ref >>= fun w__5 : Pmpcfg_ent => @@ -7639,7 +7279,7 @@ Definition pmpWriteCfgReg (n : Z) (v : mword 32) `{ArithFact (0 <= n /\ n < 4)} read_reg pmp7cfg_ref >>= fun w__7 : Pmpcfg_ent => write_reg pmp7cfg_ref (pmpWriteCfg w__7 (subrange_vec_dec v 31 24)) : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 2)) then + else if sumbool_of_bool ((Z.eqb l__19 2)) then read_reg pmp8cfg_ref >>= fun w__8 : Pmpcfg_ent => let pmp8cfg8 := pmpWriteCfg w__8 (subrange_vec_dec v 7 0) in read_reg pmp9cfg_ref >>= fun w__9 : Pmpcfg_ent => @@ -7649,7 +7289,7 @@ Definition pmpWriteCfgReg (n : Z) (v : mword 32) `{ArithFact (0 <= n /\ n < 4)} read_reg pmp11cfg_ref >>= fun w__11 : Pmpcfg_ent => write_reg pmp11cfg_ref (pmpWriteCfg w__11 (subrange_vec_dec v 31 24)) : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 3)) then + else if sumbool_of_bool ((Z.eqb l__19 3)) then read_reg pmp12cfg_ref >>= fun w__12 : Pmpcfg_ent => write_reg pmp12cfg_ref (pmpWriteCfg w__12 (subrange_vec_dec v 7 0)) >> read_reg pmp13cfg_ref >>= fun w__13 : Pmpcfg_ent => @@ -7716,9 +7356,9 @@ Definition pmpCheckPerms (ent : Pmpcfg_ent) (acc : AccessType) (priv : Privilege Definition pmpAddrMatch_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : pmpAddrMatch := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then PMP_NoMatch - else if sumbool_of_bool ((Z.eqb p0_ 1)) then PMP_PartialMatch + let l__17 := arg_ in + if sumbool_of_bool ((Z.eqb l__17 0)) then PMP_NoMatch + else if sumbool_of_bool ((Z.eqb l__17 1)) then PMP_PartialMatch else PMP_Match. Definition num_of_pmpAddrMatch (arg_ : pmpAddrMatch) @@ -7741,9 +7381,9 @@ Definition pmpMatchAddr (addr : mword 32) (width : mword 32) (rng : option ((mwo Definition pmpMatch_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : pmpMatch := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then PMP_Success - else if sumbool_of_bool ((Z.eqb p0_ 1)) then PMP_Continue + let l__15 := arg_ in + if sumbool_of_bool ((Z.eqb l__15 0)) then PMP_Success + else if sumbool_of_bool ((Z.eqb l__15 1)) then PMP_Continue else PMP_Fail. Definition num_of_pmpMatch (arg_ : pmpMatch) @@ -10718,11 +10358,12 @@ Definition write_NExt_CSR (csr : mword 12) (value : mword 32) let '_ := (if ((get_config_print_reg tt)) then print_endline - (concat_str "CSR " - (concat_str (csr_name csr) - (concat_str " <- " - (concat_str (string_of_bits v) - (concat_str " (input: " (concat_str (string_of_bits value) ")")))))) + (String.append "CSR " + (String.append (csr_name csr) + (String.append " <- " + (String.append (string_of_bits v) + (String.append " (input: " + (String.append (string_of_bits value) ")")))))) else tt) : unit in true @@ -11332,12 +10973,12 @@ Definition trap_handler let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "handling " - (concat_str (if sumbool_of_bool (intr) then "int#" else "exc#") - (concat_str (string_of_bits c) - (concat_str " at priv " - (concat_str (privLevel_to_str del_priv) - (concat_str " with tval " (string_of_bits (tval info)))))))) + (String.append "handling " + (String.append (if sumbool_of_bool (intr) then "int#" else "exc#") + (String.append (string_of_bits c) + (String.append " at priv " + (String.append (privLevel_to_str del_priv) + (String.append " with tval " (string_of_bits (tval info)))))))) else tt) : unit in let '_ := (cancel_reservation tt) : unit in @@ -11357,7 +10998,7 @@ Definition trap_handler (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__2 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__2)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__2)))) : unit) else returnm (tt : unit)) >> read_reg mcause_ref >>= fun w__3 : Mcause => @@ -11385,7 +11026,7 @@ Definition trap_handler (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__10 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__10)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__10)))) : unit) else returnm (tt : unit)) >> read_reg scause_ref >>= fun w__11 : Mcause => @@ -11406,7 +11047,7 @@ Definition trap_handler (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__15 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__15)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__15)))) : unit) else returnm (tt : unit)) >> read_reg ucause_ref >>= fun w__16 : Mcause => @@ -11424,11 +11065,12 @@ Definition exception_handler (cur_priv : Privilege) (ctl : ctl_result) (pc : mwo let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "trapping from " - (concat_str (privLevel_to_str cur_priv) - (concat_str " to " - (concat_str (privLevel_to_str del_priv) - (concat_str " to handle " (exceptionType_to_str e.(sync_exception_trap))))))) + (String.append "trapping from " + (String.append (privLevel_to_str cur_priv) + (String.append " to " + (String.append (privLevel_to_str del_priv) + (String.append " to handle " + (exceptionType_to_str e.(sync_exception_trap))))))) else tt) : unit in (trap_handler del_priv false ((exceptionType_to_bits e.(sync_exception_trap)) : mword 8) pc @@ -11448,15 +11090,15 @@ Definition exception_handler (cur_priv : Privilege) (ctl : ctl_result) (pc : mwo (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__5 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__5)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__5)))) : unit) else returnm (tt : unit)) >> (if ((get_config_print_platform tt)) then read_reg cur_privilege_ref >>= fun w__6 : Privilege => returnm ((print_endline - (concat_str "ret-ing from " - (concat_str (privLevel_to_str prev_priv) - (concat_str " to " (privLevel_to_str w__6))))) + (String.append "ret-ing from " + (String.append (privLevel_to_str prev_priv) + (String.append " to " (privLevel_to_str w__6))))) : unit) else returnm (tt : unit)) >> let '_ := (cancel_reservation tt) : unit in @@ -11476,15 +11118,15 @@ Definition exception_handler (cur_priv : Privilege) (ctl : ctl_result) (pc : mwo (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__11 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__11)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__11)))) : unit) else returnm (tt : unit)) >> (if ((get_config_print_platform tt)) then read_reg cur_privilege_ref >>= fun w__12 : Privilege => returnm ((print_endline - (concat_str "ret-ing from " - (concat_str (privLevel_to_str prev_priv) - (concat_str " to " (privLevel_to_str w__12))))) + (String.append "ret-ing from " + (String.append (privLevel_to_str prev_priv) + (String.append " to " (privLevel_to_str w__12))))) : unit) else returnm (tt : unit)) >> let '_ := (cancel_reservation tt) : unit in @@ -11501,15 +11143,15 @@ Definition exception_handler (cur_priv : Privilege) (ctl : ctl_result) (pc : mwo (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__16 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__16)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__16)))) : unit) else returnm (tt : unit)) >> (if ((get_config_print_platform tt)) then read_reg cur_privilege_ref >>= fun w__17 : Privilege => returnm ((print_endline - (concat_str "ret-ing from " - (concat_str (privLevel_to_str prev_priv) - (concat_str " to " (privLevel_to_str w__17))))) + (String.append "ret-ing from " + (String.append (privLevel_to_str prev_priv) + (String.append " to " (privLevel_to_str w__17))))) : unit) else returnm (tt : unit)) >> let '_ := (cancel_reservation tt) : unit in @@ -11578,10 +11220,10 @@ Definition init_sys '(tt : unit) (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__4 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " - (concat_str (string_of_bits (_get_Mstatus_bits w__4)) - (concat_str " (input: " - (concat_str + (String.append "CSR mstatus <- " + (String.append (string_of_bits (_get_Mstatus_bits w__4)) + (String.append " (input: " + (String.append (string_of_bits ((EXTZ 32 (vec_of_bits [B0] : mword 1)) : xlenbits)) ")"))))) : unit) @@ -11638,19 +11280,20 @@ Definition within_phys_mem (addr : mword 32) (width : Z) `{ArithFact (width <= 1 else let '_ := (print_endline - (concat_str "within_phys_mem: " (concat_str (string_of_bits addr) " not within phys-mem:"))) + (String.append "within_phys_mem: " + (String.append (string_of_bits addr) " not within phys-mem:"))) : unit in let '_ := - (print_endline (concat_str " plat_rom_base: " (string_of_bits (plat_rom_base tt)))) + (print_endline (String.append " plat_rom_base: " (string_of_bits (plat_rom_base tt)))) : unit in let '_ := - (print_endline (concat_str " plat_rom_size: " (string_of_bits (plat_rom_size tt)))) + (print_endline (String.append " plat_rom_size: " (string_of_bits (plat_rom_size tt)))) : unit in let '_ := - (print_endline (concat_str " plat_ram_base: " (string_of_bits (plat_ram_base tt)))) + (print_endline (String.append " plat_ram_base: " (string_of_bits (plat_ram_base tt)))) : unit in let '_ := - (print_endline (concat_str " plat_ram_size: " (string_of_bits (plat_ram_size tt)))) + (print_endline (String.append " plat_ram_size: " (string_of_bits (plat_ram_size tt)))) : unit in false. @@ -11704,9 +11347,9 @@ Definition clint_load (addr : mword 32) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then read_reg mip_ref >>= fun w__0 : Minterrupts => returnm ((print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits (_get_Minterrupts_MSI w__0)))))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits (_get_Minterrupts_MSI w__0)))))) : unit) else returnm (tt : unit)) >> read_reg mip_ref >>= fun w__1 : Minterrupts => @@ -11718,9 +11361,9 @@ Definition clint_load (addr : mword 32) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__2 : mword 64 => returnm ((print_endline - (concat_str "clint<4>[" - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits (subrange_vec_dec w__2 31 0)))))) + (String.append "clint<4>[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits (subrange_vec_dec w__2 31 0)))))) : unit) else returnm (tt : unit)) >> ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__3 : mword 64 => @@ -11732,8 +11375,9 @@ Definition clint_load (addr : mword 32) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__4 : mword 64 => returnm ((print_endline - (concat_str "clint<8>[" - (concat_str (string_of_bits addr) (concat_str "] -> " (string_of_bits w__4))))) + (String.append "clint<8>[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits w__4))))) : unit) else returnm (tt : unit)) >> ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__5 : mword 64 => @@ -11745,9 +11389,9 @@ Definition clint_load (addr : mword 32) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__6 : mword 64 => returnm ((print_endline - (concat_str "clint-hi<4>[" - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits (subrange_vec_dec w__6 63 32)))))) + (String.append "clint-hi<4>[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits (subrange_vec_dec w__6 63 32)))))) : unit) else returnm (tt : unit)) >> ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__7 : mword 64 => @@ -11758,8 +11402,9 @@ Definition clint_load (addr : mword 32) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtime_ref) : M (mword 64)) >>= fun w__8 : mword 64 => returnm ((print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) (concat_str "] -> " (string_of_bits w__8))))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits w__8))))) : unit) else returnm (tt : unit)) >> ((read_reg mtime_ref) : M (mword 64)) >>= fun w__9 : mword 64 => @@ -11770,9 +11415,9 @@ Definition clint_load (addr : mword 32) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtime_ref) : M (mword 64)) >>= fun w__10 : mword 64 => returnm ((print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits w__10))))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits w__10))))) : unit) else returnm (tt : unit)) >> ((read_reg mtime_ref) : M (mword 64)) >>= fun w__11 : mword 64 => @@ -11784,9 +11429,9 @@ Definition clint_load (addr : mword 32) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtime_ref) : M (mword 64)) >>= fun w__12 : mword 64 => returnm ((print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits w__12))))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits w__12))))) : unit) else returnm (tt : unit)) >> ((read_reg mtime_ref) : M (mword 64)) >>= fun w__13 : mword 64 => @@ -11797,7 +11442,7 @@ Definition clint_load (addr : mword 32) (width : Z) `{ArithFact (width > 0)} let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "clint[" (concat_str (string_of_bits addr) "] -> <not-mapped>")) + (String.append "clint[" (String.append (string_of_bits addr) "] -> <not-mapped>")) else tt) : unit in returnm ((MemException @@ -11810,7 +11455,7 @@ Definition clint_dispatch '(tt : unit) (if ((get_config_print_platform tt)) then ((read_reg mtime_ref) : M (mword 64)) >>= fun w__0 : mword 64 => - returnm ((print_endline (concat_str "clint::tick mtime <- " (string_of_bits w__0))) + returnm ((print_endline (String.append "clint::tick mtime <- " (string_of_bits w__0))) : unit) else returnm (tt : unit)) >> (_set_Minterrupts_MTI mip_ref ((bool_to_bits false) : mword 1)) >> @@ -11819,7 +11464,8 @@ Definition clint_dispatch '(tt : unit) (if ((zopz0zIzJ_u w__1 w__2)) then (if ((get_config_print_platform tt)) then ((read_reg mtime_ref) : M (mword 64)) >>= fun w__3 : mword 64 => - returnm ((print_endline (concat_str " clint timer pending at mtime " (string_of_bits w__3))) + returnm ((print_endline + (String.append " clint timer pending at mtime " (string_of_bits w__3))) : unit) else returnm (tt : unit)) >> (_set_Minterrupts_MTI mip_ref ((bool_to_bits true) : mword 1)) @@ -11838,11 +11484,12 @@ Definition clint_store (addr : mword 32) (width : Z) (data : mword (8 * width)) (if ((get_config_print_platform tt)) then (cast_unit_vec (access_vec_dec data 0)) >>= fun w__0 : mword 1 => returnm ((print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) - (concat_str "] <- " - (concat_str (string_of_bits data) - (concat_str " (mip.MSI <- " (concat_str (string_of_bits w__0) ")"))))))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] <- " + (String.append (string_of_bits data) + (String.append " (mip.MSI <- " + (String.append (string_of_bits w__0) ")"))))))) : unit) else returnm (tt : unit)) >> (cast_unit_vec (access_vec_dec data 0)) >>= fun w__1 : mword 1 => @@ -11855,9 +11502,9 @@ Definition clint_store (addr : mword 32) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "clint<8>[" - (concat_str (string_of_bits addr) - (concat_str "] <- " (concat_str (string_of_bits data) " (mtimecmp)")))) + (String.append "clint<8>[" + (String.append (string_of_bits addr) + (String.append "] <- " (String.append (string_of_bits data) " (mtimecmp)")))) else tt) : unit in write_reg mtimecmp_ref (zero_extend data 64) >> @@ -11867,9 +11514,9 @@ Definition clint_store (addr : mword 32) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "clint<4>[" - (concat_str (string_of_bits addr) - (concat_str "] <- " (concat_str (string_of_bits data) " (mtimecmp)")))) + (String.append "clint<4>[" + (String.append (string_of_bits addr) + (String.append "] <- " (String.append (string_of_bits data) " (mtimecmp)")))) else tt) : unit in ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__2 : mword 64 => @@ -11880,9 +11527,9 @@ Definition clint_store (addr : mword 32) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "clint<4>[" - (concat_str (string_of_bits addr) - (concat_str "] <- " (concat_str (string_of_bits data) " (mtimecmp)")))) + (String.append "clint<4>[" + (String.append (string_of_bits addr) + (String.append "] <- " (String.append (string_of_bits data) " (mtimecmp)")))) else tt) : unit in ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__3 : mword 64 => @@ -11892,9 +11539,9 @@ Definition clint_store (addr : mword 32) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) - (concat_str "] <- " (concat_str (string_of_bits data) " (<unmapped>)")))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] <- " (String.append (string_of_bits data) " (<unmapped>)")))) else tt) : unit in returnm ((MemException @@ -12024,8 +11671,9 @@ Definition htif_load (addr : mword 32) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg htif_tohost_ref) : M (mword 64)) >>= fun w__0 : mword 64 => returnm ((print_endline - (concat_str "htif[" - (concat_str (string_of_bits addr) (concat_str "] -> " (string_of_bits w__0))))) + (String.append "htif[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits w__0))))) : unit) else returnm (tt : unit)) >> (if sumbool_of_bool ((andb (Z.eqb width 8) (eq_vec addr (plat_htif_tohost tt)))) then @@ -12054,8 +11702,8 @@ Definition htif_store (addr : mword 32) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "htif[" - (concat_str (string_of_bits addr) (concat_str "] <- " (string_of_bits data)))) + (String.append "htif[" + (String.append (string_of_bits addr) (String.append "] <- " (string_of_bits data)))) else tt) : unit in (if sumbool_of_bool ((Z.eqb width 8)) then write_reg htif_tohost_ref (EXTZ 64 data) : M (unit) @@ -12076,7 +11724,7 @@ Definition htif_store (addr : mword 32) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "htif-syscall-proxy cmd: " (string_of_bits (_get_htif_cmd_payload cmd))) + (String.append "htif-syscall-proxy cmd: " (string_of_bits (_get_htif_cmd_payload cmd))) else tt) : unit in (cast_unit_vec (access_vec_dec (_get_htif_cmd_payload cmd) 0)) >>= fun w__3 : mword 1 => @@ -12091,15 +11739,16 @@ Definition htif_store (addr : mword 32) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "htif-term cmd: " (string_of_bits (_get_htif_cmd_payload cmd))) + (String.append "htif-term cmd: " + (string_of_bits (_get_htif_cmd_payload cmd))) else tt) : unit in let b__2 := _get_htif_cmd_cmd cmd in if ((eq_vec b__2 (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : mword 8))) then tt else if ((eq_vec b__2 (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B1] : mword 8))) then plat_term_write (subrange_vec_dec (_get_htif_cmd_payload cmd) 7 0) - else print_endline (concat_str "Unknown term cmd: " (string_of_bits b__2)) - else print_endline (concat_str "htif-???? cmd: " (string_of_bits data))) + else print_endline (String.append "Unknown term cmd: " (string_of_bits b__2)) + else print_endline (String.append "htif-???? cmd: " (string_of_bits data))) : unit)) >> returnm ((MemValue (true)) @@ -12110,7 +11759,7 @@ Definition htif_tick '(tt : unit) (if ((get_config_print_platform tt)) then ((read_reg htif_tohost_ref) : M (mword 64)) >>= fun w__0 : mword 64 => - returnm ((print_endline (concat_str "htif::tick " (string_of_bits w__0))) + returnm ((print_endline (String.append "htif::tick " (string_of_bits w__0))) : unit) else returnm (tt : unit)) >> write_reg htif_tohost_ref (EXTZ 64 (vec_of_bits [B0] : mword 1)) @@ -12252,11 +11901,11 @@ Definition phys_mem_read let '_ := (if ((get_config_print_mem tt)) then print_endline - (concat_str "mem[" - (concat_str (accessType_to_str t) - (concat_str "," - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits v)))))) + (String.append "mem[" + (String.append (accessType_to_str t) + (String.append "," + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits v)))))) else tt) : unit in MemValue @@ -12385,8 +12034,8 @@ Definition phys_mem_write let '_ := (if ((get_config_print_mem tt)) then print_endline - (concat_str "mem[" - (concat_str (string_of_bits addr) (concat_str "] <- " (string_of_bits data)))) + (String.append "mem[" + (String.append (string_of_bits addr) (String.append "] <- " (string_of_bits data)))) else tt) : unit in returnm (result @@ -12767,11 +12416,11 @@ Definition update_PTE_Bits (p : PTE_Bits) (a : AccessType) Definition PTW_Error_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 4)} : PTW_Error := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then PTW_Access - else if sumbool_of_bool ((Z.eqb p0_ 1)) then PTW_Invalid_PTE - else if sumbool_of_bool ((Z.eqb p0_ 2)) then PTW_No_Permission - else if sumbool_of_bool ((Z.eqb p0_ 3)) then PTW_Misaligned + let l__11 := arg_ in + if sumbool_of_bool ((Z.eqb l__11 0)) then PTW_Access + else if sumbool_of_bool ((Z.eqb l__11 1)) then PTW_Invalid_PTE + else if sumbool_of_bool ((Z.eqb l__11 2)) then PTW_No_Permission + else if sumbool_of_bool ((Z.eqb l__11 3)) then PTW_Misaligned else PTW_PTE_Update. Definition num_of_PTW_Error (arg_ : PTW_Error) @@ -16138,49 +15787,17 @@ Definition encdec_amoop_backwards (arg_ : mword 5) : M (amoop) := let b__0 := arg_ in - (if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))))) then - returnm (AMOSWAP - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))))) then - returnm (AMOADD - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))))) then - returnm (AMOXOR - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))))) then - returnm (AMOAND - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))))) then - returnm (AMOOR - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))))) then - returnm (AMOMIN - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))))) then - returnm (AMOMAX - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))))) then + (if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))) then returnm (AMOSWAP : amoop) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))) then returnm (AMOADD : amoop) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))) then returnm (AMOXOR : amoop) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))) then returnm (AMOAND : amoop) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))) then returnm (AMOOR : amoop) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))) then returnm (AMOMIN : amoop) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))) then returnm (AMOMAX : amoop) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))) then returnm (AMOMINU : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))))) then + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))) then returnm (AMOMAXU : amoop) else assert_exp' false "Pattern match failure at unknown location" >>= fun _ => exit tt) @@ -16205,42 +15822,15 @@ Definition encdec_amoop_backwards_matches (arg_ : mword 5) : bool := let b__0 := arg_ in - if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))))) then - true + if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))) then true else false. Definition amo_mnemonic_forwards (arg_ : amoop) @@ -16770,7 +16360,7 @@ Definition readCSR (csr : mword 12) : M (mword 32) := (match (csr, 32) with - | (b__0, g__3) => + | (b__0, g__217) => (if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B0;B1] : mword 12))) then ((read_reg mvendorid_ref) : M (mword 32)) >>= fun w__0 : mword 32 => returnm ((EXTZ 32 w__0) @@ -16831,19 +16421,19 @@ Definition readCSR (csr : mword 12) else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : mword 12))) then (pmpReadCfgReg 0) : M (mword 32) - else if sumbool_of_bool ((andb (Z.eqb g__3 32) + else if sumbool_of_bool ((andb (eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] - : mword 12)))) then + : mword 12)) (Z.eqb g__217 32))) then (pmpReadCfgReg 1) : M (mword 32) else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : mword 12))) then (pmpReadCfgReg 2) : M (mword 32) - else if sumbool_of_bool ((andb (Z.eqb g__3 32) + else if sumbool_of_bool ((andb (eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] - : mword 12)))) then + : mword 12)) (Z.eqb g__217 32))) then (pmpReadCfgReg 3) : M (mword 32) else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B0] : mword 12))) then @@ -16902,17 +16492,17 @@ Definition readCSR (csr : mword 12) ((read_reg minstret_ref) : M (mword 64)) >>= fun w__38 : mword 64 => returnm ((subrange_vec_dec w__38 (Z.sub 32 1) 0) : mword (31 - 0 + 1)) - else if sumbool_of_bool ((andb (Z.eqb g__3 32) + else if sumbool_of_bool ((andb (eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B0;B0] - : mword 12)))) then + : mword 12)) (Z.eqb g__217 32))) then ((read_reg mcycle_ref) : M (mword 64)) >>= fun w__39 : mword 64 => returnm ((subrange_vec_dec w__39 63 32) : mword (63 - 32 + 1)) - else if sumbool_of_bool ((andb (Z.eqb g__3 32) + else if sumbool_of_bool ((andb (eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B1;B0] - : mword 12)))) then + : mword 12)) (Z.eqb g__217 32))) then ((read_reg minstret_ref) : M (mword 64)) >>= fun w__40 : mword 64 => returnm ((subrange_vec_dec w__40 63 32) : mword (63 - 32 + 1)) @@ -16979,24 +16569,24 @@ Definition readCSR (csr : mword 12) ((read_reg minstret_ref) : M (mword 64)) >>= fun w__59 : mword 64 => returnm ((subrange_vec_dec w__59 (Z.sub 32 1) 0) : mword (31 - 0 + 1)) - else if sumbool_of_bool ((andb (Z.eqb g__3 32) + else if sumbool_of_bool ((andb (eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B0] - : mword 12)))) then + : mword 12)) (Z.eqb g__217 32))) then ((read_reg mcycle_ref) : M (mword 64)) >>= fun w__60 : mword 64 => returnm ((subrange_vec_dec w__60 63 32) : mword (63 - 32 + 1)) - else if sumbool_of_bool ((andb (Z.eqb g__3 32) + else if sumbool_of_bool ((andb (eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B0;B1] - : mword 12)))) then + : mword 12)) (Z.eqb g__217 32))) then ((read_reg mtime_ref) : M (mword 64)) >>= fun w__61 : mword 64 => returnm ((subrange_vec_dec w__61 63 32) : mword (63 - 32 + 1)) - else if sumbool_of_bool ((andb (Z.eqb g__3 32) + else if sumbool_of_bool ((andb (eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B1;B0;B0;B0;B0;B0;B1;B0] - : mword 12)))) then + : mword 12)) (Z.eqb g__217 32))) then ((read_reg minstret_ref) : M (mword 64)) >>= fun w__62 : mword 64 => returnm ((subrange_vec_dec w__62 63 32) : mword (63 - 32 + 1)) @@ -17014,7 +16604,8 @@ Definition readCSR (csr : mword 12) let '_ := (if ((get_config_print_reg tt)) then print_endline - (concat_str "CSR " (concat_str (csr_name csr) (concat_str " -> " (string_of_bits res)))) + (String.append "CSR " + (String.append (csr_name csr) (String.append " -> " (string_of_bits res)))) else tt) : unit in returnm (res @@ -17024,7 +16615,7 @@ Definition writeCSR (csr : mword 12) (value : mword 32) : M (unit) := (match (csr, 32) with - | (b__0, g__2) => + | (b__0, g__216) => (if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : mword 12))) then read_reg mstatus_ref >>= fun w__0 : Mstatus => (legalize_mstatus w__0 value) >>= fun w__1 : Mstatus => @@ -17109,17 +16700,17 @@ Definition writeCSR (csr : mword 12) (value : mword 32) : option (mword 32)) else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B0] : mword 12))) then (pmpWriteCfgReg 0 value) >> returnm ((Some (value)) : option (mword 32)) - else if sumbool_of_bool ((andb (Z.eqb g__2 32) + else if sumbool_of_bool ((andb (eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B0;B1] - : mword 12)))) then + : mword 12)) (Z.eqb g__216 32))) then (pmpWriteCfgReg 1 value) >> returnm ((Some (value)) : option (mword 32)) else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B0] : mword 12))) then (pmpWriteCfgReg 2 value) >> returnm ((Some (value)) : option (mword 32)) - else if sumbool_of_bool ((andb (Z.eqb g__2 32) + else if sumbool_of_bool ((andb (eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B0;B0;B0;B1;B1] - : mword 12)))) then + : mword 12)) (Z.eqb g__216 32))) then (pmpWriteCfgReg 3 value) >> returnm ((Some (value)) : option (mword 32)) else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1;B0;B1;B1;B0;B0;B0;B0] : mword 12))) then read_reg pmp0cfg_ref >>= fun w__24 : Pmpcfg_ent => @@ -17259,19 +16850,19 @@ Definition writeCSR (csr : mword 12) (value : mword 32) ((read_reg minstret_ref) : M (mword 64)) >>= fun w__73 : mword 64 => write_reg minstret_ref (update_subrange_vec_dec w__73 (Z.sub 32 1) 0 value) >> write_reg minstret_written_ref true >> returnm ((Some (value)) : option (mword 32)) - else if sumbool_of_bool ((andb (Z.eqb g__2 32) + else if sumbool_of_bool ((andb (eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B0;B0] - : mword 12)))) then + : mword 12)) (Z.eqb g__216 32))) then ((read_reg mcycle_ref) : M (mword 64)) >>= fun w__74 : mword 64 => write_reg mcycle_ref (update_subrange_vec_dec w__74 63 32 value) >> returnm ((Some (value)) : option (mword 32)) - else if sumbool_of_bool ((andb (Z.eqb g__2 32) + else if sumbool_of_bool ((andb (eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B1;B0;B0;B0;B0;B0;B1;B0] - : mword 12)))) then + : mword 12)) (Z.eqb g__216 32))) then ((read_reg minstret_ref) : M (mword 64)) >>= fun w__75 : mword 64 => write_reg minstret_ref (update_subrange_vec_dec w__75 63 32 value) >> write_reg minstret_written_ref true >> returnm ((Some (value)) : option (mword 32)) @@ -17371,11 +16962,12 @@ Definition writeCSR (csr : mword 12) (value : mword 32) | Some (v) => returnm ((if ((get_config_print_reg tt)) then print_endline - (concat_str "CSR " - (concat_str (csr_name csr) - (concat_str " <- " - (concat_str (string_of_bits v) - (concat_str " (input: " (concat_str (string_of_bits value) ")")))))) + (String.append "CSR " + (String.append (csr_name csr) + (String.append " <- " + (String.append (string_of_bits v) + (String.append " (input: " + (String.append (string_of_bits value) ")")))))) else tt) : unit) | None => @@ -18875,26 +18467,18 @@ Definition encdec_backwards (arg_ : mword 32) : M (bool))) : M (bool)) (returnm ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__7 31 27))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B1;B0] : mword 5)))) - ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__7 24 20))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B0;B0] : mword 5)))) - (andb - (eq_vec (subrange_vec_dec v__7 14 14) - (vec_of_bits [B0] : mword (14 - 14 + 1))) - (eq_vec (subrange_vec_dec v__7 6 0) - (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] - : mword (6 - 0 + 1))))) - : bool)) + (eq_vec (subrange_vec_dec v__7 31 27) + (vec_of_bits [B0;B0;B0;B1;B0] : mword (31 - 27 + 1))) + (andb + (eq_vec (subrange_vec_dec v__7 24 20) + (vec_of_bits [B0;B0;B0;B0;B0] + : mword (24 - 20 + 1))) + (andb + (eq_vec (subrange_vec_dec v__7 14 14) + (vec_of_bits [B0] : mword (14 - 14 + 1))) + (eq_vec (subrange_vec_dec v__7 6 0) + (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] + : mword (6 - 0 + 1)))))) : bool))) >>= fun w__31 : bool => (if sumbool_of_bool (w__31) then let rs1 : mword 5 := subrange_vec_dec v__7 19 15 in @@ -18964,12 +18548,9 @@ Definition encdec_backwards (arg_ : mword 32) : M (bool))) : M (bool)) (returnm ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__7 31 27))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B1;B1] : mword 5)))) + (eq_vec (subrange_vec_dec v__7 31 27) + (vec_of_bits [B0;B0;B0;B1;B1] + : mword (31 - 27 + 1))) (andb (eq_vec (subrange_vec_dec v__7 14 14) (vec_of_bits [B0] : mword (14 - 14 + 1))) @@ -20218,26 +19799,18 @@ Definition encdec_backwards_matches (arg_ : mword 32) : M (bool))) : M (bool)) (returnm ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__225 31 27))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B1;B0] : mword 5)))) - ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__225 24 20))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B0;B0] : mword 5)))) - (andb - (eq_vec (subrange_vec_dec v__225 14 14) - (vec_of_bits [B0] : mword (14 - 14 + 1))) - (eq_vec (subrange_vec_dec v__225 6 0) - (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] - : mword (6 - 0 + 1))))) - : bool)) + (eq_vec (subrange_vec_dec v__225 31 27) + (vec_of_bits [B0;B0;B0;B1;B0] : mword (31 - 27 + 1))) + (andb + (eq_vec (subrange_vec_dec v__225 24 20) + (vec_of_bits [B0;B0;B0;B0;B0] + : mword (24 - 20 + 1))) + (andb + (eq_vec (subrange_vec_dec v__225 14 14) + (vec_of_bits [B0] : mword (14 - 14 + 1))) + (eq_vec (subrange_vec_dec v__225 6 0) + (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] + : mword (6 - 0 + 1)))))) : bool))) >>= fun w__31 : bool => (if sumbool_of_bool (w__31) then let _mappingpatterns_8_ : mword 2 := subrange_vec_dec v__225 13 12 in @@ -20304,12 +19877,9 @@ Definition encdec_backwards_matches (arg_ : mword 32) : M (bool))) : M (bool)) (returnm ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__225 31 27))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B1;B1] : mword 5)))) + (eq_vec (subrange_vec_dec v__225 31 27) + (vec_of_bits [B0;B0;B0;B1;B1] + : mword (31 - 27 + 1))) (andb (eq_vec (subrange_vec_dec v__225 14 14) (vec_of_bits [B0] : mword (14 - 14 + 1))) @@ -21390,13 +20960,11 @@ Definition encdec_compressed_backwards (arg_ : mword 16) (andb (eq_vec (subrange_vec_dec v__460 15 13) (vec_of_bits [B0;B1;B1] : mword (15 - 13 + 1))) - ((andb - (Z.eqb (projT1 (regidx_to_regno (subrange_vec_dec v__460 11 7))) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : mword 5)))) - (eq_vec (subrange_vec_dec v__460 1 0) - (vec_of_bits [B0;B1] : mword (1 - 0 + 1)))) - : bool)))) then + (andb + (eq_vec (subrange_vec_dec v__460 11 7) + (vec_of_bits [B0;B0;B0;B1;B0] : mword (11 - 7 + 1))) + (eq_vec (subrange_vec_dec v__460 1 0) + (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))))) then let nzi9 : bits 1 := subrange_vec_dec v__460 12 12 in let nzi87 : bits 2 := subrange_vec_dec v__460 4 3 in let nzi6 : bits 1 := subrange_vec_dec v__460 5 5 in @@ -22017,13 +21585,11 @@ Definition encdec_compressed_backwards_matches (arg_ : mword 16) (andb (eq_vec (subrange_vec_dec v__618 15 13) (vec_of_bits [B0;B1;B1] : mword (15 - 13 + 1))) - ((andb - (Z.eqb (projT1 (regidx_to_regno (subrange_vec_dec v__618 11 7))) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : mword 5)))) - (eq_vec (subrange_vec_dec v__618 1 0) - (vec_of_bits [B0;B1] : mword (1 - 0 + 1)))) - : bool)))) then + (andb + (eq_vec (subrange_vec_dec v__618 11 7) + (vec_of_bits [B0;B0;B0;B1;B0] : mword (11 - 7 + 1))) + (eq_vec (subrange_vec_dec v__618 1 0) + (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))))) then true else if sumbool_of_bool ((andb (let rd : regidx := subrange_vec_dec v__618 11 7 in @@ -22569,16 +22135,16 @@ Definition execute_SFENCE_VMA (rs1 : mword 5) (rs2 : mword 5) | Supervisor => read_reg mstatus_ref >>= fun w__3 : Mstatus => read_reg mstatus_ref >>= fun w__4 : Mstatus => - let p__1 := (architecture (get_mstatus_SXL w__3), _get_Mstatus_TVM w__4) in - (match p__1 with - | (Some (g__0), v_0) => + let p__215 := (architecture (get_mstatus_SXL w__3), _get_Mstatus_TVM w__4) in + (match p__215 with + | (Some (g__214), v_0) => (if ((eq_vec v_0 ((bool_to_bits true) : mword 1))) then (handle_illegal tt) >> returnm (RETIRE_FAIL : Retired) else if ((eq_vec v_0 ((bool_to_bits false) : mword 1))) then (flush_TLB asid addr) >> returnm (RETIRE_SUCCESS : Retired) else (match (Some - (g__0), v_0) with + (g__214), v_0) with | (_, _) => (internal_error "unimplemented sfence architecture") : M (Retired) end) : M (Retired)) @@ -22890,7 +22456,7 @@ Definition execute_FENCE_TSO (pred : mword 4) (succ : mword 4) (if ((andb (eq_vec (subrange_vec_dec v__794 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__795 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_tso) + (barrier (Barrier_RISCV_tso (tt))) : M (unit) else returnm ((if ((andb @@ -22918,55 +22484,55 @@ Definition execute_FENCE (pred : mword 4) (succ : mword 4) (if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_rw_rw) + (barrier (Barrier_RISCV_rw_rw (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_r_rw) + (barrier (Barrier_RISCV_r_rw (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_r_r) + (barrier (Barrier_RISCV_r_r (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_rw_w) + (barrier (Barrier_RISCV_rw_w (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_w_w) + (barrier (Barrier_RISCV_w_w (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_w_rw) + (barrier (Barrier_RISCV_w_rw (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_rw_r) + (barrier (Barrier_RISCV_rw_r (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_r_w) + (barrier (Barrier_RISCV_r_w (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_w_r) + (barrier (Barrier_RISCV_w_r (tt))) : M (unit) else returnm ((if ((andb diff --git a/prover_snapshots/coq/RV32/riscv_extras.v b/prover_snapshots/coq/RV32/riscv_extras.v index 5828f88..84f6761 100644 --- a/prover_snapshots/coq/RV32/riscv_extras.v +++ b/prover_snapshots/coq/RV32/riscv_extras.v @@ -9,17 +9,17 @@ Import List.ListNotations. Axiom real : Type. -Definition MEM_fence_rw_rw {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_rw_rw. -Definition MEM_fence_r_rw {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_r_rw. -Definition MEM_fence_r_r {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_r_r. -Definition MEM_fence_rw_w {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_rw_w. -Definition MEM_fence_w_w {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_w_w. -Definition MEM_fence_w_rw {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_w_rw. -Definition MEM_fence_rw_r {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_rw_r. -Definition MEM_fence_r_w {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_r_w. -Definition MEM_fence_w_r {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_w_r. -Definition MEM_fence_tso {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_tso. -Definition MEM_fence_i {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_i. +Definition MEM_fence_rw_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_rw tt). +Definition MEM_fence_r_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_rw tt). +Definition MEM_fence_r_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_r tt). +Definition MEM_fence_rw_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_w tt). +Definition MEM_fence_w_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_w tt). +Definition MEM_fence_w_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_rw tt). +Definition MEM_fence_rw_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_r tt). +Definition MEM_fence_r_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_w tt). +Definition MEM_fence_w_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_r tt). +Definition MEM_fence_tso {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_tso tt). +Definition MEM_fence_i {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_i tt). (* val MEMea : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e val MEMea_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e diff --git a/prover_snapshots/coq/RV32/riscv_types.v b/prover_snapshots/coq/RV32/riscv_types.v index 69429ce..79dfb2a 100644 --- a/prover_snapshots/coq/RV32/riscv_types.v +++ b/prover_snapshots/coq/RV32/riscv_types.v @@ -31,6 +31,18 @@ Inductive diafp := | DIAFP_none : unit -> diafp | DIAFP_concrete : bits 64 -> diafp | DIAFP_reg : regfp -> diafp. Arguments diafp : clear implicits. +Inductive a64_barrier_domain := A64_FullShare | A64_InnerShare | A64_OuterShare | A64_NonShare. +Scheme Equality for a64_barrier_domain. +Instance Decidable_eq_a64_barrier_domain : +forall (x y : a64_barrier_domain), Decidable (x = y) := +Decidable_eq_from_dec a64_barrier_domain_eq_dec. + +Inductive a64_barrier_type := A64_barrier_all | A64_barrier_LD | A64_barrier_ST. +Scheme Equality for a64_barrier_type. +Instance Decidable_eq_a64_barrier_type : +forall (x y : a64_barrier_type), Decidable (x = y) := +Decidable_eq_from_dec a64_barrier_type_eq_dec. + Inductive cache_op_kind := Cache_op_D_IVAC | Cache_op_D_ISW @@ -699,9 +711,10 @@ Inductive register_value := | Regval_Sedeleg : Sedeleg -> register_value | Regval_Sinterrupts : Sinterrupts -> register_value | Regval_TLB_Entry_9_32_34_32 : TLB_Entry 9 32 34 32 -> register_value - | Regval_bool : bool -> register_value - | Regval_vector_32_dec_bit : mword 32 -> register_value - | Regval_vector_64_dec_bit : mword 64 -> register_value. + | Regval_bit : bitU -> register_value + | Regval_bitvector_32_dec : mword 32 -> register_value + | Regval_bitvector_64_dec : mword 64 -> register_value + | Regval_bool : bool -> register_value. Arguments register_value : clear implicits. Record regstate := @@ -13005,35 +13018,42 @@ Definition regval_of_TLB_Entry_9_32_34_32 (v : TLB_Entry 9 32 34 32) Regval_TLB_Entry_9_32_34_32 (v). -Definition bool_of_regval (merge_var : register_value) -: option bool := +Definition bit_of_regval (merge_var : register_value) +: option bitU := - match merge_var with | Regval_bool (v) => Some (v) | _ => None end. + match merge_var with | Regval_bit (v) => Some (v) | _ => None end. -Definition regval_of_bool (v : bool) : register_value := Regval_bool (v). +Definition regval_of_bit (v : bitU) : register_value := Regval_bit (v). -Definition vector_32_dec_bit_of_regval (merge_var : register_value) +Definition bitvector_32_dec_of_regval (merge_var : register_value) : option (mword 32) := - match merge_var with | Regval_vector_32_dec_bit (v) => Some (v) | _ => None end. + match merge_var with | Regval_bitvector_32_dec (v) => Some (v) | _ => None end. -Definition regval_of_vector_32_dec_bit (v : mword 32) +Definition regval_of_bitvector_32_dec (v : mword 32) : register_value := - Regval_vector_32_dec_bit + Regval_bitvector_32_dec (v). -Definition vector_64_dec_bit_of_regval (merge_var : register_value) +Definition bitvector_64_dec_of_regval (merge_var : register_value) : option (mword 64) := - match merge_var with | Regval_vector_64_dec_bit (v) => Some (v) | _ => None end. + match merge_var with | Regval_bitvector_64_dec (v) => Some (v) | _ => None end. -Definition regval_of_vector_64_dec_bit (v : mword 64) +Definition regval_of_bitvector_64_dec (v : mword 64) : register_value := - Regval_vector_64_dec_bit + Regval_bitvector_64_dec (v). +Definition bool_of_regval (merge_var : register_value) +: option bool := + + match merge_var with | Regval_bool (v) => Some (v) | _ => None end. + +Definition regval_of_bool (v : bool) : register_value := Regval_bool (v). + Definition vector_of_regval {a} n (of_regval : register_value -> option a) (rv : register_value) : option (vec a n) := match rv with @@ -13062,8 +13082,8 @@ Definition satp_ref := {| name := "satp"; read_from := (fun s => s.(satp)); write_to := (fun v s => ({[ s with satp := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition tlb32_ref := {| name := "tlb32"; @@ -13076,8 +13096,8 @@ Definition htif_exit_code_ref := {| name := "htif_exit_code"; read_from := (fun s => s.(htif_exit_code)); write_to := (fun v s => ({[ s with htif_exit_code := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition htif_done_ref := {| name := "htif_done"; @@ -13090,22 +13110,22 @@ Definition htif_tohost_ref := {| name := "htif_tohost"; read_from := (fun s => s.(htif_tohost)); write_to := (fun v s => ({[ s with htif_tohost := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition mtimecmp_ref := {| name := "mtimecmp"; read_from := (fun s => s.(mtimecmp)); write_to := (fun v s => ({[ s with mtimecmp := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition utval_ref := {| name := "utval"; read_from := (fun s => s.(utval)); write_to := (fun v s => ({[ s with utval := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition ucause_ref := {| name := "ucause"; @@ -13118,15 +13138,15 @@ Definition uepc_ref := {| name := "uepc"; read_from := (fun s => s.(uepc)); write_to := (fun v s => ({[ s with uepc := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition uscratch_ref := {| name := "uscratch"; read_from := (fun s => s.(uscratch)); write_to := (fun v s => ({[ s with uscratch := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition utvec_ref := {| name := "utvec"; @@ -13139,113 +13159,113 @@ Definition pmpaddr15_ref := {| name := "pmpaddr15"; read_from := (fun s => s.(pmpaddr15)); write_to := (fun v s => ({[ s with pmpaddr15 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr14_ref := {| name := "pmpaddr14"; read_from := (fun s => s.(pmpaddr14)); write_to := (fun v s => ({[ s with pmpaddr14 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr13_ref := {| name := "pmpaddr13"; read_from := (fun s => s.(pmpaddr13)); write_to := (fun v s => ({[ s with pmpaddr13 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr12_ref := {| name := "pmpaddr12"; read_from := (fun s => s.(pmpaddr12)); write_to := (fun v s => ({[ s with pmpaddr12 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr11_ref := {| name := "pmpaddr11"; read_from := (fun s => s.(pmpaddr11)); write_to := (fun v s => ({[ s with pmpaddr11 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr10_ref := {| name := "pmpaddr10"; read_from := (fun s => s.(pmpaddr10)); write_to := (fun v s => ({[ s with pmpaddr10 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr9_ref := {| name := "pmpaddr9"; read_from := (fun s => s.(pmpaddr9)); write_to := (fun v s => ({[ s with pmpaddr9 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr8_ref := {| name := "pmpaddr8"; read_from := (fun s => s.(pmpaddr8)); write_to := (fun v s => ({[ s with pmpaddr8 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr7_ref := {| name := "pmpaddr7"; read_from := (fun s => s.(pmpaddr7)); write_to := (fun v s => ({[ s with pmpaddr7 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr6_ref := {| name := "pmpaddr6"; read_from := (fun s => s.(pmpaddr6)); write_to := (fun v s => ({[ s with pmpaddr6 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr5_ref := {| name := "pmpaddr5"; read_from := (fun s => s.(pmpaddr5)); write_to := (fun v s => ({[ s with pmpaddr5 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr4_ref := {| name := "pmpaddr4"; read_from := (fun s => s.(pmpaddr4)); write_to := (fun v s => ({[ s with pmpaddr4 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr3_ref := {| name := "pmpaddr3"; read_from := (fun s => s.(pmpaddr3)); write_to := (fun v s => ({[ s with pmpaddr3 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr2_ref := {| name := "pmpaddr2"; read_from := (fun s => s.(pmpaddr2)); write_to := (fun v s => ({[ s with pmpaddr2 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr1_ref := {| name := "pmpaddr1"; read_from := (fun s => s.(pmpaddr1)); write_to := (fun v s => ({[ s with pmpaddr1 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmpaddr0_ref := {| name := "pmpaddr0"; read_from := (fun s => s.(pmpaddr0)); write_to := (fun v s => ({[ s with pmpaddr0 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition pmp15cfg_ref := {| name := "pmp15cfg"; @@ -13363,15 +13383,15 @@ Definition tselect_ref := {| name := "tselect"; read_from := (fun s => s.(tselect)); write_to := (fun v s => ({[ s with tselect := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition stval_ref := {| name := "stval"; read_from := (fun s => s.(stval)); write_to := (fun v s => ({[ s with stval := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition scause_ref := {| name := "scause"; @@ -13384,15 +13404,15 @@ Definition sepc_ref := {| name := "sepc"; read_from := (fun s => s.(sepc)); write_to := (fun v s => ({[ s with sepc := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition sscratch_ref := {| name := "sscratch"; read_from := (fun s => s.(sscratch)); write_to := (fun v s => ({[ s with sscratch := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition stvec_ref := {| name := "stvec"; @@ -13419,29 +13439,29 @@ Definition mhartid_ref := {| name := "mhartid"; read_from := (fun s => s.(mhartid)); write_to := (fun v s => ({[ s with mhartid := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition marchid_ref := {| name := "marchid"; read_from := (fun s => s.(marchid)); write_to := (fun v s => ({[ s with marchid := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition mimpid_ref := {| name := "mimpid"; read_from := (fun s => s.(mimpid)); write_to := (fun v s => ({[ s with mimpid := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition mvendorid_ref := {| name := "mvendorid"; read_from := (fun s => s.(mvendorid)); write_to := (fun v s => ({[ s with mvendorid := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition minstret_written_ref := {| name := "minstret_written"; @@ -13454,22 +13474,22 @@ Definition minstret_ref := {| name := "minstret"; read_from := (fun s => s.(minstret)); write_to := (fun v s => ({[ s with minstret := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition mtime_ref := {| name := "mtime"; read_from := (fun s => s.(mtime)); write_to := (fun v s => ({[ s with mtime := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition mcycle_ref := {| name := "mcycle"; read_from := (fun s => s.(mcycle)); write_to := (fun v s => ({[ s with mcycle := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition scounteren_ref := {| name := "scounteren"; @@ -13489,22 +13509,22 @@ Definition mscratch_ref := {| name := "mscratch"; read_from := (fun s => s.(mscratch)); write_to := (fun v s => ({[ s with mscratch := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition mtval_ref := {| name := "mtval"; read_from := (fun s => s.(mtval)); write_to := (fun v s => ({[ s with mtval := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition mepc_ref := {| name := "mepc"; read_from := (fun s => s.(mepc)); write_to := (fun v s => ({[ s with mepc := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition mcause_ref := {| name := "mcause"; @@ -13566,8 +13586,8 @@ Definition cur_inst_ref := {| name := "cur_inst"; read_from := (fun s => s.(cur_inst)); write_to := (fun v s => ({[ s with cur_inst := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition cur_privilege_ref := {| name := "cur_privilege"; @@ -13580,246 +13600,246 @@ Definition x31_ref := {| name := "x31"; read_from := (fun s => s.(x31)); write_to := (fun v s => ({[ s with x31 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x30_ref := {| name := "x30"; read_from := (fun s => s.(x30)); write_to := (fun v s => ({[ s with x30 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x29_ref := {| name := "x29"; read_from := (fun s => s.(x29)); write_to := (fun v s => ({[ s with x29 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x28_ref := {| name := "x28"; read_from := (fun s => s.(x28)); write_to := (fun v s => ({[ s with x28 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x27_ref := {| name := "x27"; read_from := (fun s => s.(x27)); write_to := (fun v s => ({[ s with x27 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x26_ref := {| name := "x26"; read_from := (fun s => s.(x26)); write_to := (fun v s => ({[ s with x26 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x25_ref := {| name := "x25"; read_from := (fun s => s.(x25)); write_to := (fun v s => ({[ s with x25 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x24_ref := {| name := "x24"; read_from := (fun s => s.(x24)); write_to := (fun v s => ({[ s with x24 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x23_ref := {| name := "x23"; read_from := (fun s => s.(x23)); write_to := (fun v s => ({[ s with x23 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x22_ref := {| name := "x22"; read_from := (fun s => s.(x22)); write_to := (fun v s => ({[ s with x22 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x21_ref := {| name := "x21"; read_from := (fun s => s.(x21)); write_to := (fun v s => ({[ s with x21 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x20_ref := {| name := "x20"; read_from := (fun s => s.(x20)); write_to := (fun v s => ({[ s with x20 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x19_ref := {| name := "x19"; read_from := (fun s => s.(x19)); write_to := (fun v s => ({[ s with x19 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x18_ref := {| name := "x18"; read_from := (fun s => s.(x18)); write_to := (fun v s => ({[ s with x18 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x17_ref := {| name := "x17"; read_from := (fun s => s.(x17)); write_to := (fun v s => ({[ s with x17 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x16_ref := {| name := "x16"; read_from := (fun s => s.(x16)); write_to := (fun v s => ({[ s with x16 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x15_ref := {| name := "x15"; read_from := (fun s => s.(x15)); write_to := (fun v s => ({[ s with x15 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x14_ref := {| name := "x14"; read_from := (fun s => s.(x14)); write_to := (fun v s => ({[ s with x14 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x13_ref := {| name := "x13"; read_from := (fun s => s.(x13)); write_to := (fun v s => ({[ s with x13 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x12_ref := {| name := "x12"; read_from := (fun s => s.(x12)); write_to := (fun v s => ({[ s with x12 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x11_ref := {| name := "x11"; read_from := (fun s => s.(x11)); write_to := (fun v s => ({[ s with x11 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x10_ref := {| name := "x10"; read_from := (fun s => s.(x10)); write_to := (fun v s => ({[ s with x10 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x9_ref := {| name := "x9"; read_from := (fun s => s.(x9)); write_to := (fun v s => ({[ s with x9 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x8_ref := {| name := "x8"; read_from := (fun s => s.(x8)); write_to := (fun v s => ({[ s with x8 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x7_ref := {| name := "x7"; read_from := (fun s => s.(x7)); write_to := (fun v s => ({[ s with x7 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x6_ref := {| name := "x6"; read_from := (fun s => s.(x6)); write_to := (fun v s => ({[ s with x6 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x5_ref := {| name := "x5"; read_from := (fun s => s.(x5)); write_to := (fun v s => ({[ s with x5 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x4_ref := {| name := "x4"; read_from := (fun s => s.(x4)); write_to := (fun v s => ({[ s with x4 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x3_ref := {| name := "x3"; read_from := (fun s => s.(x3)); write_to := (fun v s => ({[ s with x3 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x2_ref := {| name := "x2"; read_from := (fun s => s.(x2)); write_to := (fun v s => ({[ s with x2 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition x1_ref := {| name := "x1"; read_from := (fun s => s.(x1)); write_to := (fun v s => ({[ s with x1 := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition Xs_ref := {| name := "Xs"; read_from := (fun s => s.(Xs)); write_to := (fun v s => ({[ s with Xs := v ]})); - of_regval := (fun v => vector_of_regval 32 (fun v => vector_32_dec_bit_of_regval v) v); - regval_of := (fun v => regval_of_vector (fun v => regval_of_vector_32_dec_bit v) 32 false v) |}. + of_regval := (fun v => vector_of_regval 32 (fun v => bitvector_32_dec_of_regval v) v); + regval_of := (fun v => regval_of_vector (fun v => regval_of_bitvector_32_dec v) 32 false v) |}. Definition instbits_ref := {| name := "instbits"; read_from := (fun s => s.(instbits)); write_to := (fun v s => ({[ s with instbits := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition nextPC_ref := {| name := "nextPC"; read_from := (fun s => s.(nextPC)); write_to := (fun v s => ({[ s with nextPC := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition PC_ref := {| name := "PC"; read_from := (fun s => s.(PC)); write_to := (fun v s => ({[ s with PC := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Local Open Scope string. Definition get_regval (reg_name : string) (s : regstate) : option register_value := diff --git a/prover_snapshots/coq/RV64/riscv.v b/prover_snapshots/coq/RV64/riscv.v index a3d05ac..fc0e61d 100644 --- a/prover_snapshots/coq/RV64/riscv.v +++ b/prover_snapshots/coq/RV64/riscv.v @@ -41,9 +41,9 @@ Definition __id (x : Z) : {_retval : Z & ArithFact (_retval = x)} := build_ex( Definition concat_str_bits {n : Z} (str : string) (x : mword n) : string := - concat_str str (string_of_bits x). + String.append str (string_of_bits x). -Definition concat_str_dec (str : string) (x : Z) : string := concat_str str (dec_str x). +Definition concat_str_dec (str : string) (x : Z) : string := String.append str (dec_str x). @@ -66,18 +66,18 @@ Definition slice_mask (n : Z) (i : Z) (l : Z) `{ArithFact (n >= 0)} Definition read_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 11)} : read_kind := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Read_plain - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Read_reserve - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Read_acquire - else if sumbool_of_bool ((Z.eqb p0_ 3)) then Read_exclusive - else if sumbool_of_bool ((Z.eqb p0_ 4)) then Read_exclusive_acquire - else if sumbool_of_bool ((Z.eqb p0_ 5)) then Read_stream - else if sumbool_of_bool ((Z.eqb p0_ 6)) then Read_RISCV_acquire - else if sumbool_of_bool ((Z.eqb p0_ 7)) then Read_RISCV_strong_acquire - else if sumbool_of_bool ((Z.eqb p0_ 8)) then Read_RISCV_reserved - else if sumbool_of_bool ((Z.eqb p0_ 9)) then Read_RISCV_reserved_acquire - else if sumbool_of_bool ((Z.eqb p0_ 10)) then Read_RISCV_reserved_strong_acquire + let l__196 := arg_ in + if sumbool_of_bool ((Z.eqb l__196 0)) then Read_plain + else if sumbool_of_bool ((Z.eqb l__196 1)) then Read_reserve + else if sumbool_of_bool ((Z.eqb l__196 2)) then Read_acquire + else if sumbool_of_bool ((Z.eqb l__196 3)) then Read_exclusive + else if sumbool_of_bool ((Z.eqb l__196 4)) then Read_exclusive_acquire + else if sumbool_of_bool ((Z.eqb l__196 5)) then Read_stream + else if sumbool_of_bool ((Z.eqb l__196 6)) then Read_RISCV_acquire + else if sumbool_of_bool ((Z.eqb l__196 7)) then Read_RISCV_strong_acquire + else if sumbool_of_bool ((Z.eqb l__196 8)) then Read_RISCV_reserved + else if sumbool_of_bool ((Z.eqb l__196 9)) then Read_RISCV_reserved_acquire + else if sumbool_of_bool ((Z.eqb l__196 10)) then Read_RISCV_reserved_strong_acquire else Read_X86_locked. Definition num_of_read_kind (arg_ : read_kind) @@ -101,17 +101,17 @@ Definition num_of_read_kind (arg_ : read_kind) Definition write_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 10)} : write_kind := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Write_plain - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Write_conditional - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Write_release - else if sumbool_of_bool ((Z.eqb p0_ 3)) then Write_exclusive - else if sumbool_of_bool ((Z.eqb p0_ 4)) then Write_exclusive_release - else if sumbool_of_bool ((Z.eqb p0_ 5)) then Write_RISCV_release - else if sumbool_of_bool ((Z.eqb p0_ 6)) then Write_RISCV_strong_release - else if sumbool_of_bool ((Z.eqb p0_ 7)) then Write_RISCV_conditional - else if sumbool_of_bool ((Z.eqb p0_ 8)) then Write_RISCV_conditional_release - else if sumbool_of_bool ((Z.eqb p0_ 9)) then Write_RISCV_conditional_strong_release + let l__186 := arg_ in + if sumbool_of_bool ((Z.eqb l__186 0)) then Write_plain + else if sumbool_of_bool ((Z.eqb l__186 1)) then Write_conditional + else if sumbool_of_bool ((Z.eqb l__186 2)) then Write_release + else if sumbool_of_bool ((Z.eqb l__186 3)) then Write_exclusive + else if sumbool_of_bool ((Z.eqb l__186 4)) then Write_exclusive_release + else if sumbool_of_bool ((Z.eqb l__186 5)) then Write_RISCV_release + else if sumbool_of_bool ((Z.eqb l__186 6)) then Write_RISCV_strong_release + else if sumbool_of_bool ((Z.eqb l__186 7)) then Write_RISCV_conditional + else if sumbool_of_bool ((Z.eqb l__186 8)) then Write_RISCV_conditional_release + else if sumbool_of_bool ((Z.eqb l__186 9)) then Write_RISCV_conditional_strong_release else Write_X86_locked. Definition num_of_write_kind (arg_ : write_kind) @@ -131,71 +131,44 @@ Definition num_of_write_kind (arg_ : write_kind) | Write_X86_locked => 10 end). -Definition barrier_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 23)} -: barrier_kind := +Definition a64_barrier_domain_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} +: a64_barrier_domain := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Barrier_Sync - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Barrier_LwSync - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Barrier_Eieio - else if sumbool_of_bool ((Z.eqb p0_ 3)) then Barrier_Isync - else if sumbool_of_bool ((Z.eqb p0_ 4)) then Barrier_DMB - else if sumbool_of_bool ((Z.eqb p0_ 5)) then Barrier_DMB_ST - else if sumbool_of_bool ((Z.eqb p0_ 6)) then Barrier_DMB_LD - else if sumbool_of_bool ((Z.eqb p0_ 7)) then Barrier_DSB - else if sumbool_of_bool ((Z.eqb p0_ 8)) then Barrier_DSB_ST - else if sumbool_of_bool ((Z.eqb p0_ 9)) then Barrier_DSB_LD - else if sumbool_of_bool ((Z.eqb p0_ 10)) then Barrier_ISB - else if sumbool_of_bool ((Z.eqb p0_ 11)) then Barrier_MIPS_SYNC - else if sumbool_of_bool ((Z.eqb p0_ 12)) then Barrier_RISCV_rw_rw - else if sumbool_of_bool ((Z.eqb p0_ 13)) then Barrier_RISCV_r_rw - else if sumbool_of_bool ((Z.eqb p0_ 14)) then Barrier_RISCV_r_r - else if sumbool_of_bool ((Z.eqb p0_ 15)) then Barrier_RISCV_rw_w - else if sumbool_of_bool ((Z.eqb p0_ 16)) then Barrier_RISCV_w_w - else if sumbool_of_bool ((Z.eqb p0_ 17)) then Barrier_RISCV_w_rw - else if sumbool_of_bool ((Z.eqb p0_ 18)) then Barrier_RISCV_rw_r - else if sumbool_of_bool ((Z.eqb p0_ 19)) then Barrier_RISCV_r_w - else if sumbool_of_bool ((Z.eqb p0_ 20)) then Barrier_RISCV_w_r - else if sumbool_of_bool ((Z.eqb p0_ 21)) then Barrier_RISCV_tso - else if sumbool_of_bool ((Z.eqb p0_ 22)) then Barrier_RISCV_i - else Barrier_x86_MFENCE. - -Definition num_of_barrier_kind (arg_ : barrier_kind) -: {e : Z & ArithFact (0 <= e /\ e <= 23)} := + let l__183 := arg_ in + if sumbool_of_bool ((Z.eqb l__183 0)) then A64_FullShare + else if sumbool_of_bool ((Z.eqb l__183 1)) then A64_InnerShare + else if sumbool_of_bool ((Z.eqb l__183 2)) then A64_OuterShare + else A64_NonShare. + +Definition num_of_a64_barrier_domain (arg_ : a64_barrier_domain) +: {e : Z & ArithFact (0 <= e /\ e <= 3)} := build_ex(match arg_ with - | Barrier_Sync => 0 - | Barrier_LwSync => 1 - | Barrier_Eieio => 2 - | Barrier_Isync => 3 - | Barrier_DMB => 4 - | Barrier_DMB_ST => 5 - | Barrier_DMB_LD => 6 - | Barrier_DSB => 7 - | Barrier_DSB_ST => 8 - | Barrier_DSB_LD => 9 - | Barrier_ISB => 10 - | Barrier_MIPS_SYNC => 11 - | Barrier_RISCV_rw_rw => 12 - | Barrier_RISCV_r_rw => 13 - | Barrier_RISCV_r_r => 14 - | Barrier_RISCV_rw_w => 15 - | Barrier_RISCV_w_w => 16 - | Barrier_RISCV_w_rw => 17 - | Barrier_RISCV_rw_r => 18 - | Barrier_RISCV_r_w => 19 - | Barrier_RISCV_w_r => 20 - | Barrier_RISCV_tso => 21 - | Barrier_RISCV_i => 22 - | Barrier_x86_MFENCE => 23 + | A64_FullShare => 0 + | A64_InnerShare => 1 + | A64_OuterShare => 2 + | A64_NonShare => 3 end). +Definition a64_barrier_type_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} +: a64_barrier_type := + + let l__181 := arg_ in + if sumbool_of_bool ((Z.eqb l__181 0)) then A64_barrier_all + else if sumbool_of_bool ((Z.eqb l__181 1)) then A64_barrier_LD + else A64_barrier_ST. + +Definition num_of_a64_barrier_type (arg_ : a64_barrier_type) +: {e : Z & ArithFact (0 <= e /\ e <= 2)} := + + build_ex(match arg_ with | A64_barrier_all => 0 | A64_barrier_LD => 1 | A64_barrier_ST => 2 end). + Definition trans_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : trans_kind := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Transaction_start - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Transaction_commit + let l__179 := arg_ in + if sumbool_of_bool ((Z.eqb l__179 0)) then Transaction_start + else if sumbool_of_bool ((Z.eqb l__179 1)) then Transaction_commit else Transaction_abort. Definition num_of_trans_kind (arg_ : trans_kind) @@ -210,17 +183,17 @@ Definition num_of_trans_kind (arg_ : trans_kind) Definition cache_op_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 10)} : cache_op_kind := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Cache_op_D_IVAC - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Cache_op_D_ISW - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Cache_op_D_CSW - else if sumbool_of_bool ((Z.eqb p0_ 3)) then Cache_op_D_CISW - else if sumbool_of_bool ((Z.eqb p0_ 4)) then Cache_op_D_ZVA - else if sumbool_of_bool ((Z.eqb p0_ 5)) then Cache_op_D_CVAC - else if sumbool_of_bool ((Z.eqb p0_ 6)) then Cache_op_D_CVAU - else if sumbool_of_bool ((Z.eqb p0_ 7)) then Cache_op_D_CIVAC - else if sumbool_of_bool ((Z.eqb p0_ 8)) then Cache_op_I_IALLUIS - else if sumbool_of_bool ((Z.eqb p0_ 9)) then Cache_op_I_IALLU + let l__169 := arg_ in + if sumbool_of_bool ((Z.eqb l__169 0)) then Cache_op_D_IVAC + else if sumbool_of_bool ((Z.eqb l__169 1)) then Cache_op_D_ISW + else if sumbool_of_bool ((Z.eqb l__169 2)) then Cache_op_D_CSW + else if sumbool_of_bool ((Z.eqb l__169 3)) then Cache_op_D_CISW + else if sumbool_of_bool ((Z.eqb l__169 4)) then Cache_op_D_ZVA + else if sumbool_of_bool ((Z.eqb l__169 5)) then Cache_op_D_CVAC + else if sumbool_of_bool ((Z.eqb l__169 6)) then Cache_op_D_CVAU + else if sumbool_of_bool ((Z.eqb l__169 7)) then Cache_op_D_CIVAC + else if sumbool_of_bool ((Z.eqb l__169 8)) then Cache_op_I_IALLUIS + else if sumbool_of_bool ((Z.eqb l__169 9)) then Cache_op_I_IALLU else Cache_op_I_IVAU. Definition num_of_cache_op_kind (arg_ : cache_op_kind) @@ -340,7 +313,7 @@ Fixpoint _rec_n_leading_spaces (s : string) (_reclimit : Z) (_acc : Acc (Zwf 0) (projT1 (build_ex (Z.add 1 w__0) - : {_atom : Z & ArithFact (exists ex72067_ , _atom = (1 + ex72067_) /\ 0 <= ex72067_)}))) + : {_atom : Z & ArithFact (exists ex98922_ , _atom = (1 + ex98922_) /\ 0 <= ex98922_)}))) else returnm (build_ex (0 : Z))) : M ({n : Z & ArithFact (n >= 0)})) : M ({n : Z & ArithFact (n >= 0)}). @@ -359,8 +332,8 @@ Definition spc_matches_prefix (s : string) : M (option ((unit * {n : Z & ArithFact (n >= 0)}))) := (n_leading_spaces s) >>= fun '(existT _ n _) => - let p0_ := n in - returnm ((if sumbool_of_bool ((Z.eqb p0_ 0)) then None + let l__168 := n in + returnm ((if sumbool_of_bool ((Z.eqb l__168 0)) then None else Some ((tt, build_ex n))) : option ((unit * {n : Z & ArithFact (n >= 0)}))). @@ -395,7 +368,7 @@ Definition hex_bits_1_backwards_matches (s : string) match s with | s => if ((match (hex_bits_1_matches_prefix s) with - | Some ((g__51, existT _ n _)) => + | Some ((g__258, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -427,7 +400,7 @@ Definition hex_bits_2_backwards_matches (s : string) match s with | s => if ((match (hex_bits_2_matches_prefix s) with - | Some ((g__50, existT _ n _)) => + | Some ((g__257, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -459,7 +432,7 @@ Definition hex_bits_3_backwards_matches (s : string) match s with | s => if ((match (hex_bits_3_matches_prefix s) with - | Some ((g__49, existT _ n _)) => + | Some ((g__256, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -491,7 +464,7 @@ Definition hex_bits_4_backwards_matches (s : string) match s with | s => if ((match (hex_bits_4_matches_prefix s) with - | Some ((g__48, existT _ n _)) => + | Some ((g__255, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -523,7 +496,7 @@ Definition hex_bits_5_backwards_matches (s : string) match s with | s => if ((match (hex_bits_5_matches_prefix s) with - | Some ((g__47, existT _ n _)) => + | Some ((g__254, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -555,7 +528,7 @@ Definition hex_bits_6_backwards_matches (s : string) match s with | s => if ((match (hex_bits_6_matches_prefix s) with - | Some ((g__46, existT _ n _)) => + | Some ((g__253, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -587,7 +560,7 @@ Definition hex_bits_7_backwards_matches (s : string) match s with | s => if ((match (hex_bits_7_matches_prefix s) with - | Some ((g__45, existT _ n _)) => + | Some ((g__252, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -619,7 +592,7 @@ Definition hex_bits_8_backwards_matches (s : string) match s with | s => if ((match (hex_bits_8_matches_prefix s) with - | Some ((g__44, existT _ n _)) => + | Some ((g__251, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -651,7 +624,7 @@ Definition hex_bits_9_backwards_matches (s : string) match s with | s => if ((match (hex_bits_9_matches_prefix s) with - | Some ((g__43, existT _ n _)) => + | Some ((g__250, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -683,7 +656,7 @@ Definition hex_bits_10_backwards_matches (s : string) match s with | s => if ((match (hex_bits_10_matches_prefix s) with - | Some ((g__42, existT _ n _)) => + | Some ((g__249, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -715,7 +688,7 @@ Definition hex_bits_11_backwards_matches (s : string) match s with | s => if ((match (hex_bits_11_matches_prefix s) with - | Some ((g__41, existT _ n _)) => + | Some ((g__248, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -747,7 +720,7 @@ Definition hex_bits_12_backwards_matches (s : string) match s with | s => if ((match (hex_bits_12_matches_prefix s) with - | Some ((g__40, existT _ n _)) => + | Some ((g__247, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -779,7 +752,7 @@ Definition hex_bits_13_backwards_matches (s : string) match s with | s => if ((match (hex_bits_13_matches_prefix s) with - | Some ((g__39, existT _ n _)) => + | Some ((g__246, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -811,7 +784,7 @@ Definition hex_bits_14_backwards_matches (s : string) match s with | s => if ((match (hex_bits_14_matches_prefix s) with - | Some ((g__38, existT _ n _)) => + | Some ((g__245, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -843,7 +816,7 @@ Definition hex_bits_15_backwards_matches (s : string) match s with | s => if ((match (hex_bits_15_matches_prefix s) with - | Some ((g__37, existT _ n _)) => + | Some ((g__244, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -875,7 +848,7 @@ Definition hex_bits_16_backwards_matches (s : string) match s with | s => if ((match (hex_bits_16_matches_prefix s) with - | Some ((g__36, existT _ n _)) => + | Some ((g__243, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -907,7 +880,7 @@ Definition hex_bits_17_backwards_matches (s : string) match s with | s => if ((match (hex_bits_17_matches_prefix s) with - | Some ((g__35, existT _ n _)) => + | Some ((g__242, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -939,7 +912,7 @@ Definition hex_bits_18_backwards_matches (s : string) match s with | s => if ((match (hex_bits_18_matches_prefix s) with - | Some ((g__34, existT _ n _)) => + | Some ((g__241, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -971,7 +944,7 @@ Definition hex_bits_19_backwards_matches (s : string) match s with | s => if ((match (hex_bits_19_matches_prefix s) with - | Some ((g__33, existT _ n _)) => + | Some ((g__240, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1003,7 +976,7 @@ Definition hex_bits_20_backwards_matches (s : string) match s with | s => if ((match (hex_bits_20_matches_prefix s) with - | Some ((g__32, existT _ n _)) => + | Some ((g__239, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1035,7 +1008,7 @@ Definition hex_bits_21_backwards_matches (s : string) match s with | s => if ((match (hex_bits_21_matches_prefix s) with - | Some ((g__31, existT _ n _)) => + | Some ((g__238, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1067,7 +1040,7 @@ Definition hex_bits_22_backwards_matches (s : string) match s with | s => if ((match (hex_bits_22_matches_prefix s) with - | Some ((g__30, existT _ n _)) => + | Some ((g__237, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1099,7 +1072,7 @@ Definition hex_bits_23_backwards_matches (s : string) match s with | s => if ((match (hex_bits_23_matches_prefix s) with - | Some ((g__29, existT _ n _)) => + | Some ((g__236, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1131,7 +1104,7 @@ Definition hex_bits_24_backwards_matches (s : string) match s with | s => if ((match (hex_bits_24_matches_prefix s) with - | Some ((g__28, existT _ n _)) => + | Some ((g__235, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1163,7 +1136,7 @@ Definition hex_bits_25_backwards_matches (s : string) match s with | s => if ((match (hex_bits_25_matches_prefix s) with - | Some ((g__27, existT _ n _)) => + | Some ((g__234, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1195,7 +1168,7 @@ Definition hex_bits_26_backwards_matches (s : string) match s with | s => if ((match (hex_bits_26_matches_prefix s) with - | Some ((g__26, existT _ n _)) => + | Some ((g__233, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1227,7 +1200,7 @@ Definition hex_bits_27_backwards_matches (s : string) match s with | s => if ((match (hex_bits_27_matches_prefix s) with - | Some ((g__25, existT _ n _)) => + | Some ((g__232, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1259,7 +1232,7 @@ Definition hex_bits_28_backwards_matches (s : string) match s with | s => if ((match (hex_bits_28_matches_prefix s) with - | Some ((g__24, existT _ n _)) => + | Some ((g__231, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1291,7 +1264,7 @@ Definition hex_bits_29_backwards_matches (s : string) match s with | s => if ((match (hex_bits_29_matches_prefix s) with - | Some ((g__23, existT _ n _)) => + | Some ((g__230, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1323,7 +1296,7 @@ Definition hex_bits_30_backwards_matches (s : string) match s with | s => if ((match (hex_bits_30_matches_prefix s) with - | Some ((g__22, existT _ n _)) => + | Some ((g__229, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1355,7 +1328,7 @@ Definition hex_bits_31_backwards_matches (s : string) match s with | s => if ((match (hex_bits_31_matches_prefix s) with - | Some ((g__21, existT _ n _)) => + | Some ((g__228, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1387,7 +1360,7 @@ Definition hex_bits_32_backwards_matches (s : string) match s with | s => if ((match (hex_bits_32_matches_prefix s) with - | Some ((g__20, existT _ n _)) => + | Some ((g__227, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1419,7 +1392,7 @@ Definition hex_bits_33_backwards_matches (s : string) match s with | s => if ((match (hex_bits_33_matches_prefix s) with - | Some ((g__19, existT _ n _)) => + | Some ((g__226, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1451,7 +1424,7 @@ Definition hex_bits_48_backwards_matches (s : string) match s with | s => if ((match (hex_bits_48_matches_prefix s) with - | Some ((g__18, existT _ n _)) => + | Some ((g__225, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1483,7 +1456,7 @@ Definition hex_bits_64_backwards_matches (s : string) match s with | s => if ((match (hex_bits_64_matches_prefix s) with - | Some ((g__17, existT _ n _)) => + | Some ((g__224, existT _ n _)) => if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false | _ => false end)) then @@ -1574,9 +1547,9 @@ Hint Unfold sp : sail. Definition Architecture_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : Architecture := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RV32 - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RV64 + let l__166 := arg_ in + if sumbool_of_bool ((Z.eqb l__166 0)) then RV32 + else if sumbool_of_bool ((Z.eqb l__166 1)) then RV64 else RV128. Definition num_of_Architecture (arg_ : Architecture) @@ -1605,9 +1578,9 @@ Definition arch_to_bits (a : Architecture) Definition Privilege_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : Privilege := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then User - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Supervisor + let l__164 := arg_ in + if sumbool_of_bool ((Z.eqb l__164 0)) then User + else if sumbool_of_bool ((Z.eqb l__164 1)) then Supervisor else Machine. Definition num_of_Privilege (arg_ : Privilege) @@ -1644,8 +1617,8 @@ Definition privLevel_to_str (p : Privilege) Definition Retired_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 1)} : Retired := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RETIRE_SUCCESS + let l__163 := arg_ in + if sumbool_of_bool ((Z.eqb l__163 0)) then RETIRE_SUCCESS else RETIRE_FAIL. Definition num_of_Retired (arg_ : Retired) @@ -1656,10 +1629,10 @@ Definition num_of_Retired (arg_ : Retired) Definition AccessType_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} : AccessType := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Read - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Write - else if sumbool_of_bool ((Z.eqb p0_ 2)) then ReadWrite + let l__160 := arg_ in + if sumbool_of_bool ((Z.eqb l__160 0)) then Read + else if sumbool_of_bool ((Z.eqb l__160 1)) then Write + else if sumbool_of_bool ((Z.eqb l__160 2)) then ReadWrite else Execute. Definition num_of_AccessType (arg_ : AccessType) @@ -1675,10 +1648,10 @@ Definition accessType_to_str (a : AccessType) Definition word_width_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} : word_width := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then BYTE - else if sumbool_of_bool ((Z.eqb p0_ 1)) then HALF - else if sumbool_of_bool ((Z.eqb p0_ 2)) then WORD + let l__157 := arg_ in + if sumbool_of_bool ((Z.eqb l__157 0)) then BYTE + else if sumbool_of_bool ((Z.eqb l__157 1)) then HALF + else if sumbool_of_bool ((Z.eqb l__157 2)) then WORD else DOUBLE. Definition num_of_word_width (arg_ : word_width) @@ -1689,15 +1662,15 @@ Definition num_of_word_width (arg_ : word_width) Definition InterruptType_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 8)} : InterruptType := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then I_U_Software - else if sumbool_of_bool ((Z.eqb p0_ 1)) then I_S_Software - else if sumbool_of_bool ((Z.eqb p0_ 2)) then I_M_Software - else if sumbool_of_bool ((Z.eqb p0_ 3)) then I_U_Timer - else if sumbool_of_bool ((Z.eqb p0_ 4)) then I_S_Timer - else if sumbool_of_bool ((Z.eqb p0_ 5)) then I_M_Timer - else if sumbool_of_bool ((Z.eqb p0_ 6)) then I_U_External - else if sumbool_of_bool ((Z.eqb p0_ 7)) then I_S_External + let l__149 := arg_ in + if sumbool_of_bool ((Z.eqb l__149 0)) then I_U_Software + else if sumbool_of_bool ((Z.eqb l__149 1)) then I_S_Software + else if sumbool_of_bool ((Z.eqb l__149 2)) then I_M_Software + else if sumbool_of_bool ((Z.eqb l__149 3)) then I_U_Timer + else if sumbool_of_bool ((Z.eqb l__149 4)) then I_S_Timer + else if sumbool_of_bool ((Z.eqb l__149 5)) then I_M_Timer + else if sumbool_of_bool ((Z.eqb l__149 6)) then I_U_External + else if sumbool_of_bool ((Z.eqb l__149 7)) then I_S_External else I_M_External. Definition num_of_InterruptType (arg_ : InterruptType) @@ -1733,23 +1706,23 @@ Definition interruptType_to_bits (i : InterruptType) Definition ExceptionType_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 16)} : ExceptionType := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then E_Fetch_Addr_Align - else if sumbool_of_bool ((Z.eqb p0_ 1)) then E_Fetch_Access_Fault - else if sumbool_of_bool ((Z.eqb p0_ 2)) then E_Illegal_Instr - else if sumbool_of_bool ((Z.eqb p0_ 3)) then E_Breakpoint - else if sumbool_of_bool ((Z.eqb p0_ 4)) then E_Load_Addr_Align - else if sumbool_of_bool ((Z.eqb p0_ 5)) then E_Load_Access_Fault - else if sumbool_of_bool ((Z.eqb p0_ 6)) then E_SAMO_Addr_Align - else if sumbool_of_bool ((Z.eqb p0_ 7)) then E_SAMO_Access_Fault - else if sumbool_of_bool ((Z.eqb p0_ 8)) then E_U_EnvCall - else if sumbool_of_bool ((Z.eqb p0_ 9)) then E_S_EnvCall - else if sumbool_of_bool ((Z.eqb p0_ 10)) then E_Reserved_10 - else if sumbool_of_bool ((Z.eqb p0_ 11)) then E_M_EnvCall - else if sumbool_of_bool ((Z.eqb p0_ 12)) then E_Fetch_Page_Fault - else if sumbool_of_bool ((Z.eqb p0_ 13)) then E_Load_Page_Fault - else if sumbool_of_bool ((Z.eqb p0_ 14)) then E_Reserved_14 - else if sumbool_of_bool ((Z.eqb p0_ 15)) then E_SAMO_Page_Fault + let l__133 := arg_ in + if sumbool_of_bool ((Z.eqb l__133 0)) then E_Fetch_Addr_Align + else if sumbool_of_bool ((Z.eqb l__133 1)) then E_Fetch_Access_Fault + else if sumbool_of_bool ((Z.eqb l__133 2)) then E_Illegal_Instr + else if sumbool_of_bool ((Z.eqb l__133 3)) then E_Breakpoint + else if sumbool_of_bool ((Z.eqb l__133 4)) then E_Load_Addr_Align + else if sumbool_of_bool ((Z.eqb l__133 5)) then E_Load_Access_Fault + else if sumbool_of_bool ((Z.eqb l__133 6)) then E_SAMO_Addr_Align + else if sumbool_of_bool ((Z.eqb l__133 7)) then E_SAMO_Access_Fault + else if sumbool_of_bool ((Z.eqb l__133 8)) then E_U_EnvCall + else if sumbool_of_bool ((Z.eqb l__133 9)) then E_S_EnvCall + else if sumbool_of_bool ((Z.eqb l__133 10)) then E_Reserved_10 + else if sumbool_of_bool ((Z.eqb l__133 11)) then E_M_EnvCall + else if sumbool_of_bool ((Z.eqb l__133 12)) then E_Fetch_Page_Fault + else if sumbool_of_bool ((Z.eqb l__133 13)) then E_Load_Page_Fault + else if sumbool_of_bool ((Z.eqb l__133 14)) then E_Reserved_14 + else if sumbool_of_bool ((Z.eqb l__133 15)) then E_SAMO_Page_Fault else E_CHERI. Definition num_of_ExceptionType (arg_ : ExceptionType) @@ -1835,9 +1808,9 @@ Definition internal_error {a : Type} (s : string) Definition TrapVectorMode_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : TrapVectorMode := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then TV_Direct - else if sumbool_of_bool ((Z.eqb p0_ 1)) then TV_Vector + let l__131 := arg_ in + if sumbool_of_bool ((Z.eqb l__131 0)) then TV_Direct + else if sumbool_of_bool ((Z.eqb l__131 1)) then TV_Vector else TV_Reserved. Definition num_of_TrapVectorMode (arg_ : TrapVectorMode) @@ -1856,10 +1829,10 @@ Definition trapVectorMode_of_bits (m : mword 2) Definition ExtStatus_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} : ExtStatus := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Off - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Initial - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Clean + let l__128 := arg_ in + if sumbool_of_bool ((Z.eqb l__128 0)) then Off + else if sumbool_of_bool ((Z.eqb l__128 1)) then Initial + else if sumbool_of_bool ((Z.eqb l__128 2)) then Clean else Dirty. Definition num_of_ExtStatus (arg_ : ExtStatus) @@ -1893,10 +1866,10 @@ Definition extStatus_of_bits (e : mword 2) Definition SATPMode_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} : SATPMode := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then Sbare - else if sumbool_of_bool ((Z.eqb p0_ 1)) then Sv32 - else if sumbool_of_bool ((Z.eqb p0_ 2)) then Sv39 + let l__125 := arg_ in + if sumbool_of_bool ((Z.eqb l__125 0)) then Sbare + else if sumbool_of_bool ((Z.eqb l__125 1)) then Sv32 + else if sumbool_of_bool ((Z.eqb l__125 2)) then Sv39 else Sv48. Definition num_of_SATPMode (arg_ : SATPMode) @@ -1908,10 +1881,10 @@ Definition satp64Mode_of_bits (a : Architecture) (m : mword 4) : option SATPMode := match (a, m) with - | (g__16, b__0) => + | (g__223, b__0) => if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0] : mword 4))) then Some (Sbare) else - match (g__16, b__0) with + match (g__223, b__0) with | (RV32, b__0) => if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1] : mword 4))) then Some (Sv32) else match (RV32, b__0) with | (_, _) => None end @@ -1926,8 +1899,8 @@ Definition satp64Mode_of_bits (a : Architecture) (m : mword 4) Definition uop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 1)} : uop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_LUI + let l__124 := arg_ in + if sumbool_of_bool ((Z.eqb l__124 0)) then RISCV_LUI else RISCV_AUIPC. Definition num_of_uop (arg_ : uop) @@ -1938,12 +1911,12 @@ Definition num_of_uop (arg_ : uop) Definition bop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 5)} : bop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_BEQ - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_BNE - else if sumbool_of_bool ((Z.eqb p0_ 2)) then RISCV_BLT - else if sumbool_of_bool ((Z.eqb p0_ 3)) then RISCV_BGE - else if sumbool_of_bool ((Z.eqb p0_ 4)) then RISCV_BLTU + let l__119 := arg_ in + if sumbool_of_bool ((Z.eqb l__119 0)) then RISCV_BEQ + else if sumbool_of_bool ((Z.eqb l__119 1)) then RISCV_BNE + else if sumbool_of_bool ((Z.eqb l__119 2)) then RISCV_BLT + else if sumbool_of_bool ((Z.eqb l__119 3)) then RISCV_BGE + else if sumbool_of_bool ((Z.eqb l__119 4)) then RISCV_BLTU else RISCV_BGEU. Definition num_of_bop (arg_ : bop) @@ -1961,12 +1934,12 @@ Definition num_of_bop (arg_ : bop) Definition iop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 5)} : iop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_ADDI - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_SLTI - else if sumbool_of_bool ((Z.eqb p0_ 2)) then RISCV_SLTIU - else if sumbool_of_bool ((Z.eqb p0_ 3)) then RISCV_XORI - else if sumbool_of_bool ((Z.eqb p0_ 4)) then RISCV_ORI + let l__114 := arg_ in + if sumbool_of_bool ((Z.eqb l__114 0)) then RISCV_ADDI + else if sumbool_of_bool ((Z.eqb l__114 1)) then RISCV_SLTI + else if sumbool_of_bool ((Z.eqb l__114 2)) then RISCV_SLTIU + else if sumbool_of_bool ((Z.eqb l__114 3)) then RISCV_XORI + else if sumbool_of_bool ((Z.eqb l__114 4)) then RISCV_ORI else RISCV_ANDI. Definition num_of_iop (arg_ : iop) @@ -1984,9 +1957,9 @@ Definition num_of_iop (arg_ : iop) Definition sop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : sop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_SLLI - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_SRLI + let l__112 := arg_ in + if sumbool_of_bool ((Z.eqb l__112 0)) then RISCV_SLLI + else if sumbool_of_bool ((Z.eqb l__112 1)) then RISCV_SRLI else RISCV_SRAI. Definition num_of_sop (arg_ : sop) @@ -1997,16 +1970,16 @@ Definition num_of_sop (arg_ : sop) Definition rop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 9)} : rop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_ADD - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_SUB - else if sumbool_of_bool ((Z.eqb p0_ 2)) then RISCV_SLL - else if sumbool_of_bool ((Z.eqb p0_ 3)) then RISCV_SLT - else if sumbool_of_bool ((Z.eqb p0_ 4)) then RISCV_SLTU - else if sumbool_of_bool ((Z.eqb p0_ 5)) then RISCV_XOR - else if sumbool_of_bool ((Z.eqb p0_ 6)) then RISCV_SRL - else if sumbool_of_bool ((Z.eqb p0_ 7)) then RISCV_SRA - else if sumbool_of_bool ((Z.eqb p0_ 8)) then RISCV_OR + let l__103 := arg_ in + if sumbool_of_bool ((Z.eqb l__103 0)) then RISCV_ADD + else if sumbool_of_bool ((Z.eqb l__103 1)) then RISCV_SUB + else if sumbool_of_bool ((Z.eqb l__103 2)) then RISCV_SLL + else if sumbool_of_bool ((Z.eqb l__103 3)) then RISCV_SLT + else if sumbool_of_bool ((Z.eqb l__103 4)) then RISCV_SLTU + else if sumbool_of_bool ((Z.eqb l__103 5)) then RISCV_XOR + else if sumbool_of_bool ((Z.eqb l__103 6)) then RISCV_SRL + else if sumbool_of_bool ((Z.eqb l__103 7)) then RISCV_SRA + else if sumbool_of_bool ((Z.eqb l__103 8)) then RISCV_OR else RISCV_AND. Definition num_of_rop (arg_ : rop) @@ -2028,11 +2001,11 @@ Definition num_of_rop (arg_ : rop) Definition ropw_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 4)} : ropw := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_ADDW - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_SUBW - else if sumbool_of_bool ((Z.eqb p0_ 2)) then RISCV_SLLW - else if sumbool_of_bool ((Z.eqb p0_ 3)) then RISCV_SRLW + let l__99 := arg_ in + if sumbool_of_bool ((Z.eqb l__99 0)) then RISCV_ADDW + else if sumbool_of_bool ((Z.eqb l__99 1)) then RISCV_SUBW + else if sumbool_of_bool ((Z.eqb l__99 2)) then RISCV_SLLW + else if sumbool_of_bool ((Z.eqb l__99 3)) then RISCV_SRLW else RISCV_SRAW. Definition num_of_ropw (arg_ : ropw) @@ -2049,9 +2022,9 @@ Definition num_of_ropw (arg_ : ropw) Definition sopw_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : sopw := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then RISCV_SLLIW - else if sumbool_of_bool ((Z.eqb p0_ 1)) then RISCV_SRLIW + let l__97 := arg_ in + if sumbool_of_bool ((Z.eqb l__97 0)) then RISCV_SLLIW + else if sumbool_of_bool ((Z.eqb l__97 1)) then RISCV_SRLIW else RISCV_SRAIW. Definition num_of_sopw (arg_ : sopw) @@ -2062,15 +2035,15 @@ Definition num_of_sopw (arg_ : sopw) Definition amoop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 8)} : amoop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then AMOSWAP - else if sumbool_of_bool ((Z.eqb p0_ 1)) then AMOADD - else if sumbool_of_bool ((Z.eqb p0_ 2)) then AMOXOR - else if sumbool_of_bool ((Z.eqb p0_ 3)) then AMOAND - else if sumbool_of_bool ((Z.eqb p0_ 4)) then AMOOR - else if sumbool_of_bool ((Z.eqb p0_ 5)) then AMOMIN - else if sumbool_of_bool ((Z.eqb p0_ 6)) then AMOMAX - else if sumbool_of_bool ((Z.eqb p0_ 7)) then AMOMINU + let l__89 := arg_ in + if sumbool_of_bool ((Z.eqb l__89 0)) then AMOSWAP + else if sumbool_of_bool ((Z.eqb l__89 1)) then AMOADD + else if sumbool_of_bool ((Z.eqb l__89 2)) then AMOXOR + else if sumbool_of_bool ((Z.eqb l__89 3)) then AMOAND + else if sumbool_of_bool ((Z.eqb l__89 4)) then AMOOR + else if sumbool_of_bool ((Z.eqb l__89 5)) then AMOMIN + else if sumbool_of_bool ((Z.eqb l__89 6)) then AMOMAX + else if sumbool_of_bool ((Z.eqb l__89 7)) then AMOMINU else AMOMAXU. Definition num_of_amoop (arg_ : amoop) @@ -2091,9 +2064,9 @@ Definition num_of_amoop (arg_ : amoop) Definition csrop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : csrop := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then CSRRW - else if sumbool_of_bool ((Z.eqb p0_ 1)) then CSRRS + let l__87 := arg_ in + if sumbool_of_bool ((Z.eqb l__87 0)) then CSRRW + else if sumbool_of_bool ((Z.eqb l__87 1)) then CSRRS else CSRRC. Definition num_of_csrop (arg_ : csrop) @@ -2495,81 +2468,99 @@ Definition regval_into_reg (v : mword 64) : mword 64 := v. Definition rX (r : Z) `{ArithFact (0 <= r /\ r < 32)} : M (mword 64) := - let p0_ := r in - (if sumbool_of_bool ((Z.eqb p0_ 0)) then returnm (zero_reg : mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 1)) then ((read_reg x1_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 2)) then ((read_reg x2_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 3)) then ((read_reg x3_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 4)) then ((read_reg x4_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 5)) then ((read_reg x5_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 6)) then ((read_reg x6_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 7)) then ((read_reg x7_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 8)) then ((read_reg x8_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 9)) then ((read_reg x9_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 10)) then + let l__55 := r in + (if sumbool_of_bool ((Z.eqb l__55 0)) then returnm (zero_reg : mword 64) + else if sumbool_of_bool ((Z.eqb l__55 1)) then + ((read_reg x1_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool ((Z.eqb l__55 2)) then + ((read_reg x2_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool ((Z.eqb l__55 3)) then + ((read_reg x3_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool ((Z.eqb l__55 4)) then + ((read_reg x4_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool ((Z.eqb l__55 5)) then + ((read_reg x5_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool ((Z.eqb l__55 6)) then + ((read_reg x6_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool ((Z.eqb l__55 7)) then + ((read_reg x7_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool ((Z.eqb l__55 8)) then + ((read_reg x8_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool ((Z.eqb l__55 9)) then + ((read_reg x9_ref) : M (mword 64)) + : M (mword 64) + else if sumbool_of_bool ((Z.eqb l__55 10)) then ((read_reg x10_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 11)) then + else if sumbool_of_bool ((Z.eqb l__55 11)) then ((read_reg x11_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 12)) then + else if sumbool_of_bool ((Z.eqb l__55 12)) then ((read_reg x12_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 13)) then + else if sumbool_of_bool ((Z.eqb l__55 13)) then ((read_reg x13_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 14)) then + else if sumbool_of_bool ((Z.eqb l__55 14)) then ((read_reg x14_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 15)) then + else if sumbool_of_bool ((Z.eqb l__55 15)) then ((read_reg x15_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 16)) then + else if sumbool_of_bool ((Z.eqb l__55 16)) then ((read_reg x16_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 17)) then + else if sumbool_of_bool ((Z.eqb l__55 17)) then ((read_reg x17_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 18)) then + else if sumbool_of_bool ((Z.eqb l__55 18)) then ((read_reg x18_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 19)) then + else if sumbool_of_bool ((Z.eqb l__55 19)) then ((read_reg x19_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 20)) then + else if sumbool_of_bool ((Z.eqb l__55 20)) then ((read_reg x20_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 21)) then + else if sumbool_of_bool ((Z.eqb l__55 21)) then ((read_reg x21_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 22)) then + else if sumbool_of_bool ((Z.eqb l__55 22)) then ((read_reg x22_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 23)) then + else if sumbool_of_bool ((Z.eqb l__55 23)) then ((read_reg x23_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 24)) then + else if sumbool_of_bool ((Z.eqb l__55 24)) then ((read_reg x24_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 25)) then + else if sumbool_of_bool ((Z.eqb l__55 25)) then ((read_reg x25_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 26)) then + else if sumbool_of_bool ((Z.eqb l__55 26)) then ((read_reg x26_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 27)) then + else if sumbool_of_bool ((Z.eqb l__55 27)) then ((read_reg x27_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 28)) then + else if sumbool_of_bool ((Z.eqb l__55 28)) then ((read_reg x28_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 29)) then + else if sumbool_of_bool ((Z.eqb l__55 29)) then ((read_reg x29_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 30)) then + else if sumbool_of_bool ((Z.eqb l__55 30)) then ((read_reg x30_ref) : M (mword 64)) : M (mword 64) - else if sumbool_of_bool ((Z.eqb p0_ 31)) then + else if sumbool_of_bool ((Z.eqb l__55 31)) then ((read_reg x31_ref) : M (mword 64)) : M (mword 64) else assert_exp' false "invalid register number" >>= fun _ => exit tt) >>= fun v : regtype => @@ -2582,45 +2573,46 @@ Definition wX (r : Z) (in_v : mword 64) `{ArithFact (0 <= r /\ r < 32)} : M (unit) := let v := regval_into_reg in_v in - let p0_ := r in - (if sumbool_of_bool ((Z.eqb p0_ 0)) then returnm (tt : unit) - else if sumbool_of_bool ((Z.eqb p0_ 1)) then write_reg x1_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 2)) then write_reg x2_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 3)) then write_reg x3_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 4)) then write_reg x4_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 5)) then write_reg x5_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 6)) then write_reg x6_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 7)) then write_reg x7_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 8)) then write_reg x8_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 9)) then write_reg x9_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 10)) then write_reg x10_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 11)) then write_reg x11_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 12)) then write_reg x12_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 13)) then write_reg x13_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 14)) then write_reg x14_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 15)) then write_reg x15_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 16)) then write_reg x16_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 17)) then write_reg x17_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 18)) then write_reg x18_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 19)) then write_reg x19_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 20)) then write_reg x20_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 21)) then write_reg x21_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 22)) then write_reg x22_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 23)) then write_reg x23_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 24)) then write_reg x24_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 25)) then write_reg x25_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 26)) then write_reg x26_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 27)) then write_reg x27_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 28)) then write_reg x28_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 29)) then write_reg x29_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 30)) then write_reg x30_ref v : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 31)) then write_reg x31_ref v : M (unit) + let l__23 := r in + (if sumbool_of_bool ((Z.eqb l__23 0)) then returnm (tt : unit) + else if sumbool_of_bool ((Z.eqb l__23 1)) then write_reg x1_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 2)) then write_reg x2_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 3)) then write_reg x3_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 4)) then write_reg x4_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 5)) then write_reg x5_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 6)) then write_reg x6_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 7)) then write_reg x7_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 8)) then write_reg x8_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 9)) then write_reg x9_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 10)) then write_reg x10_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 11)) then write_reg x11_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 12)) then write_reg x12_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 13)) then write_reg x13_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 14)) then write_reg x14_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 15)) then write_reg x15_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 16)) then write_reg x16_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 17)) then write_reg x17_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 18)) then write_reg x18_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 19)) then write_reg x19_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 20)) then write_reg x20_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 21)) then write_reg x21_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 22)) then write_reg x22_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 23)) then write_reg x23_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 24)) then write_reg x24_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 25)) then write_reg x25_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 26)) then write_reg x26_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 27)) then write_reg x27_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 28)) then write_reg x28_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 29)) then write_reg x29_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 30)) then write_reg x30_ref v : M (unit) + else if sumbool_of_bool ((Z.eqb l__23 31)) then write_reg x31_ref v : M (unit) else assert_exp' false "invalid register number" >>= fun _ => exit tt) >> returnm ((if sumbool_of_bool ((projT1 (neq_int r 0))) then let '_ := (rvfi_wX r in_v) : unit in if ((get_config_print_reg tt)) then print_endline - (concat_str "x" (concat_str (string_of_int r) (concat_str " <- " (RegStr v)))) + (String.append "x" + (String.append (string_of_int r) (String.append " <- " (RegStr v)))) else tt else tt) : unit). @@ -2629,166 +2621,38 @@ Definition reg_name_abi (r : mword 5) : M (string) := let b__0 := r in - (if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))))) then - returnm ("zero" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))))) then - returnm ("ra" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))))) then - returnm ("sp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))))) then - returnm ("gp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))))) then - returnm ("tp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))))) then - returnm ("t0" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))))) then - returnm ("t1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))))) then - returnm ("t2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))))) then - returnm ("fp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))))) then - returnm ("s1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))))) then - returnm ("a0" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))))) then - returnm ("a1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))))) then - returnm ("a2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))))) then - returnm ("a3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))))) then - returnm ("a4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))))) then - returnm ("a5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))))) then - returnm ("a6" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))))) then - returnm ("a7" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))))) then - returnm ("s2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))))) then - returnm ("s3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))))) then - returnm ("s4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))))) then - returnm ("s5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))))) then - returnm ("s6" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))))) then - returnm ("s7" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))))) then - returnm ("s8" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))))) then - returnm ("s9" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))))) then - returnm ("s10" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))))) then - returnm ("s11" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))))) then - returnm ("t3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))))) then - returnm ("t4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))))) then - returnm ("t5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))))) then - returnm ("t6" - : string) + (if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))) then returnm ("zero" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))) then returnm ("ra" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))) then returnm ("sp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))) then returnm ("gp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))) then returnm ("tp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))) then returnm ("t0" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))) then returnm ("t1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))) then returnm ("t2" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))) then returnm ("fp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))) then returnm ("s1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))) then returnm ("a0" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))) then returnm ("a1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))) then returnm ("a2" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))) then returnm ("a3" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))) then returnm ("a4" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))) then returnm ("a5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))) then returnm ("a6" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))) then returnm ("a7" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))) then returnm ("s2" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))) then returnm ("s3" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))) then returnm ("s4" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))) then returnm ("s5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))) then returnm ("s6" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))) then returnm ("s7" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))) then returnm ("s8" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))) then returnm ("s9" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))) then returnm ("s10" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))) then returnm ("s11" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))) then returnm ("t3" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))) then returnm ("t4" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))) then returnm ("t5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))) then returnm ("t6" : string) else assert_exp' false "Pattern match failure at model/riscv_regs.sail 149:2 - 182:3" >>= fun _ => exit tt) @@ -2798,166 +2662,38 @@ Definition reg_name_forwards (arg_ : mword 5) : M (string) := let b__0 := arg_ in - (if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))))) then - returnm ("zero" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))))) then - returnm ("ra" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))))) then - returnm ("sp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))))) then - returnm ("gp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))))) then - returnm ("tp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))))) then - returnm ("t0" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))))) then - returnm ("t1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))))) then - returnm ("t2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))))) then - returnm ("fp" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))))) then - returnm ("s1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))))) then - returnm ("a0" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))))) then - returnm ("a1" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))))) then - returnm ("a2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))))) then - returnm ("a3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))))) then - returnm ("a4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))))) then - returnm ("a5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))))) then - returnm ("a6" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))))) then - returnm ("a7" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))))) then - returnm ("s2" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))))) then - returnm ("s3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))))) then - returnm ("s4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))))) then - returnm ("s5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))))) then - returnm ("s6" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))))) then - returnm ("s7" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))))) then - returnm ("s8" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))))) then - returnm ("s9" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))))) then - returnm ("s10" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))))) then - returnm ("s11" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))))) then - returnm ("t3" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))))) then - returnm ("t4" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))))) then - returnm ("t5" - : string) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))))) then - returnm ("t6" - : string) + (if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))) then returnm ("zero" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))) then returnm ("ra" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))) then returnm ("sp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))) then returnm ("gp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))) then returnm ("tp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))) then returnm ("t0" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))) then returnm ("t1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))) then returnm ("t2" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))) then returnm ("fp" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))) then returnm ("s1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))) then returnm ("a0" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))) then returnm ("a1" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))) then returnm ("a2" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))) then returnm ("a3" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))) then returnm ("a4" : string) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))) then returnm ("a5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))) then returnm ("a6" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))) then returnm ("a7" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))) then returnm ("s2" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))) then returnm ("s3" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))) then returnm ("s4" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))) then returnm ("s5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))) then returnm ("s6" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))) then returnm ("s7" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))) then returnm ("s8" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))) then returnm ("s9" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))) then returnm ("s10" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))) then returnm ("s11" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))) then returnm ("t3" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))) then returnm ("t4" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))) then returnm ("t5" : string) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))) then returnm ("t6" : string) else assert_exp' false "Pattern match failure at unknown location" >>= fun _ => exit tt) : M (string). @@ -3066,134 +2802,38 @@ Definition reg_name_forwards_matches (arg_ : mword 5) : bool := let b__0 := arg_ in - if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))))) then - true + if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B1;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B1] : mword 5))) then true else false. Definition reg_name_backwards_matches (arg_ : string) @@ -7387,10 +7027,10 @@ Definition legalize_satp32 (a : Architecture) (o : mword 32) (v : mword 32) : m Definition PmpAddrMatchType_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} : PmpAddrMatchType := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then OFF - else if sumbool_of_bool ((Z.eqb p0_ 1)) then TOR - else if sumbool_of_bool ((Z.eqb p0_ 2)) then NA4 + let l__20 := arg_ in + if sumbool_of_bool ((Z.eqb l__20 0)) then OFF + else if sumbool_of_bool ((Z.eqb l__20 1)) then TOR + else if sumbool_of_bool ((Z.eqb l__20 2)) then NA4 else NAPOT. Definition num_of_PmpAddrMatchType (arg_ : PmpAddrMatchType) @@ -7581,8 +7221,8 @@ Definition _update_Pmpcfg_ent_R (v : Pmpcfg_ent) (x : mword 1) Definition pmpReadCfgReg (n : Z) `{ArithFact (0 <= n /\ n < 4)} : M (mword 64) := - let p0_ := n in - (if sumbool_of_bool ((Z.eqb p0_ 0)) then + let l__18 := n in + (if sumbool_of_bool ((Z.eqb l__18 0)) then read_reg pmp7cfg_ref >>= fun w__0 : Pmpcfg_ent => read_reg pmp6cfg_ref >>= fun w__1 : Pmpcfg_ent => read_reg pmp5cfg_ref >>= fun w__2 : Pmpcfg_ent => @@ -7599,7 +7239,7 @@ Definition pmpReadCfgReg (n : Z) `{ArithFact (0 <= n /\ n < 4)} (concat_vec (_get_Pmpcfg_ent_bits w__5) (concat_vec (_get_Pmpcfg_ent_bits w__6) (_get_Pmpcfg_ent_bits w__7)))))))) : mword (8 + (8 + (8 + (8 + (8 + (8 + (8 + 8)))))))) - else if sumbool_of_bool ((Z.eqb p0_ 2)) then + else if sumbool_of_bool ((Z.eqb l__18 2)) then read_reg pmp15cfg_ref >>= fun w__8 : Pmpcfg_ent => read_reg pmp14cfg_ref >>= fun w__9 : Pmpcfg_ent => read_reg pmp13cfg_ref >>= fun w__10 : Pmpcfg_ent => @@ -7631,8 +7271,8 @@ Definition pmpWriteCfg (cfg : Pmpcfg_ent) (v : mword 8) Definition pmpWriteCfgReg (n : Z) (v : mword 64) `{ArithFact (0 <= n /\ n < 4)} : M (unit) := - let p0_ := n in - (if sumbool_of_bool ((Z.eqb p0_ 0)) then + let l__16 := n in + (if sumbool_of_bool ((Z.eqb l__16 0)) then read_reg pmp0cfg_ref >>= fun w__0 : Pmpcfg_ent => write_reg pmp0cfg_ref (pmpWriteCfg w__0 (subrange_vec_dec v 7 0)) >> read_reg pmp1cfg_ref >>= fun w__1 : Pmpcfg_ent => @@ -7650,7 +7290,7 @@ Definition pmpWriteCfgReg (n : Z) (v : mword 64) `{ArithFact (0 <= n /\ n < 4)} read_reg pmp7cfg_ref >>= fun w__7 : Pmpcfg_ent => write_reg pmp7cfg_ref (pmpWriteCfg w__7 (subrange_vec_dec v 63 56)) : M (unit) - else if sumbool_of_bool ((Z.eqb p0_ 2)) then + else if sumbool_of_bool ((Z.eqb l__16 2)) then read_reg pmp8cfg_ref >>= fun w__8 : Pmpcfg_ent => let pmp8cfg8 := pmpWriteCfg w__8 (subrange_vec_dec v 7 0) in read_reg pmp9cfg_ref >>= fun w__9 : Pmpcfg_ent => @@ -7725,9 +7365,9 @@ Definition pmpCheckPerms (ent : Pmpcfg_ent) (acc : AccessType) (priv : Privilege Definition pmpAddrMatch_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : pmpAddrMatch := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then PMP_NoMatch - else if sumbool_of_bool ((Z.eqb p0_ 1)) then PMP_PartialMatch + let l__14 := arg_ in + if sumbool_of_bool ((Z.eqb l__14 0)) then PMP_NoMatch + else if sumbool_of_bool ((Z.eqb l__14 1)) then PMP_PartialMatch else PMP_Match. Definition num_of_pmpAddrMatch (arg_ : pmpAddrMatch) @@ -7750,9 +7390,9 @@ Definition pmpMatchAddr (addr : mword 64) (width : mword 64) (rng : option ((mwo Definition pmpMatch_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} : pmpMatch := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then PMP_Success - else if sumbool_of_bool ((Z.eqb p0_ 1)) then PMP_Continue + let l__12 := arg_ in + if sumbool_of_bool ((Z.eqb l__12 0)) then PMP_Success + else if sumbool_of_bool ((Z.eqb l__12 1)) then PMP_Continue else PMP_Fail. Definition num_of_pmpMatch (arg_ : pmpMatch) @@ -10727,11 +10367,12 @@ Definition write_NExt_CSR (csr : mword 12) (value : mword 64) let '_ := (if ((get_config_print_reg tt)) then print_endline - (concat_str "CSR " - (concat_str (csr_name csr) - (concat_str " <- " - (concat_str (string_of_bits v) - (concat_str " (input: " (concat_str (string_of_bits value) ")")))))) + (String.append "CSR " + (String.append (csr_name csr) + (String.append " <- " + (String.append (string_of_bits v) + (String.append " (input: " + (String.append (string_of_bits value) ")")))))) else tt) : unit in true @@ -11341,12 +10982,12 @@ Definition trap_handler let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "handling " - (concat_str (if sumbool_of_bool (intr) then "int#" else "exc#") - (concat_str (string_of_bits c) - (concat_str " at priv " - (concat_str (privLevel_to_str del_priv) - (concat_str " with tval " (string_of_bits (tval info)))))))) + (String.append "handling " + (String.append (if sumbool_of_bool (intr) then "int#" else "exc#") + (String.append (string_of_bits c) + (String.append " at priv " + (String.append (privLevel_to_str del_priv) + (String.append " with tval " (string_of_bits (tval info)))))))) else tt) : unit in let '_ := (cancel_reservation tt) : unit in @@ -11366,7 +11007,7 @@ Definition trap_handler (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__2 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__2)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__2)))) : unit) else returnm (tt : unit)) >> read_reg mcause_ref >>= fun w__3 : Mcause => @@ -11394,7 +11035,7 @@ Definition trap_handler (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__10 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__10)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__10)))) : unit) else returnm (tt : unit)) >> read_reg scause_ref >>= fun w__11 : Mcause => @@ -11415,7 +11056,7 @@ Definition trap_handler (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__15 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__15)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__15)))) : unit) else returnm (tt : unit)) >> read_reg ucause_ref >>= fun w__16 : Mcause => @@ -11433,11 +11074,12 @@ Definition exception_handler (cur_priv : Privilege) (ctl : ctl_result) (pc : mwo let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "trapping from " - (concat_str (privLevel_to_str cur_priv) - (concat_str " to " - (concat_str (privLevel_to_str del_priv) - (concat_str " to handle " (exceptionType_to_str e.(sync_exception_trap))))))) + (String.append "trapping from " + (String.append (privLevel_to_str cur_priv) + (String.append " to " + (String.append (privLevel_to_str del_priv) + (String.append " to handle " + (exceptionType_to_str e.(sync_exception_trap))))))) else tt) : unit in (trap_handler del_priv false ((exceptionType_to_bits e.(sync_exception_trap)) : mword 8) pc @@ -11457,15 +11099,15 @@ Definition exception_handler (cur_priv : Privilege) (ctl : ctl_result) (pc : mwo (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__5 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__5)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__5)))) : unit) else returnm (tt : unit)) >> (if ((get_config_print_platform tt)) then read_reg cur_privilege_ref >>= fun w__6 : Privilege => returnm ((print_endline - (concat_str "ret-ing from " - (concat_str (privLevel_to_str prev_priv) - (concat_str " to " (privLevel_to_str w__6))))) + (String.append "ret-ing from " + (String.append (privLevel_to_str prev_priv) + (String.append " to " (privLevel_to_str w__6))))) : unit) else returnm (tt : unit)) >> let '_ := (cancel_reservation tt) : unit in @@ -11485,15 +11127,15 @@ Definition exception_handler (cur_priv : Privilege) (ctl : ctl_result) (pc : mwo (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__11 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__11)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__11)))) : unit) else returnm (tt : unit)) >> (if ((get_config_print_platform tt)) then read_reg cur_privilege_ref >>= fun w__12 : Privilege => returnm ((print_endline - (concat_str "ret-ing from " - (concat_str (privLevel_to_str prev_priv) - (concat_str " to " (privLevel_to_str w__12))))) + (String.append "ret-ing from " + (String.append (privLevel_to_str prev_priv) + (String.append " to " (privLevel_to_str w__12))))) : unit) else returnm (tt : unit)) >> let '_ := (cancel_reservation tt) : unit in @@ -11510,15 +11152,15 @@ Definition exception_handler (cur_priv : Privilege) (ctl : ctl_result) (pc : mwo (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__16 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__16)))) + (String.append "CSR mstatus <- " (string_of_bits (_get_Mstatus_bits w__16)))) : unit) else returnm (tt : unit)) >> (if ((get_config_print_platform tt)) then read_reg cur_privilege_ref >>= fun w__17 : Privilege => returnm ((print_endline - (concat_str "ret-ing from " - (concat_str (privLevel_to_str prev_priv) - (concat_str " to " (privLevel_to_str w__17))))) + (String.append "ret-ing from " + (String.append (privLevel_to_str prev_priv) + (String.append " to " (privLevel_to_str w__17))))) : unit) else returnm (tt : unit)) >> let '_ := (cancel_reservation tt) : unit in @@ -11587,10 +11229,10 @@ Definition init_sys '(tt : unit) (if ((get_config_print_reg tt)) then read_reg mstatus_ref >>= fun w__4 : Mstatus => returnm ((print_endline - (concat_str "CSR mstatus <- " - (concat_str (string_of_bits (_get_Mstatus_bits w__4)) - (concat_str " (input: " - (concat_str + (String.append "CSR mstatus <- " + (String.append (string_of_bits (_get_Mstatus_bits w__4)) + (String.append " (input: " + (String.append (string_of_bits ((EXTZ 64 (vec_of_bits [B0] : mword 1)) : xlenbits)) ")"))))) : unit) @@ -11647,19 +11289,20 @@ Definition within_phys_mem (addr : mword 64) (width : Z) `{ArithFact (width <= 1 else let '_ := (print_endline - (concat_str "within_phys_mem: " (concat_str (string_of_bits addr) " not within phys-mem:"))) + (String.append "within_phys_mem: " + (String.append (string_of_bits addr) " not within phys-mem:"))) : unit in let '_ := - (print_endline (concat_str " plat_rom_base: " (string_of_bits (plat_rom_base tt)))) + (print_endline (String.append " plat_rom_base: " (string_of_bits (plat_rom_base tt)))) : unit in let '_ := - (print_endline (concat_str " plat_rom_size: " (string_of_bits (plat_rom_size tt)))) + (print_endline (String.append " plat_rom_size: " (string_of_bits (plat_rom_size tt)))) : unit in let '_ := - (print_endline (concat_str " plat_ram_base: " (string_of_bits (plat_ram_base tt)))) + (print_endline (String.append " plat_ram_base: " (string_of_bits (plat_ram_base tt)))) : unit in let '_ := - (print_endline (concat_str " plat_ram_size: " (string_of_bits (plat_ram_size tt)))) + (print_endline (String.append " plat_ram_size: " (string_of_bits (plat_ram_size tt)))) : unit in false. @@ -11713,9 +11356,9 @@ Definition clint_load (addr : mword 64) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then read_reg mip_ref >>= fun w__0 : Minterrupts => returnm ((print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits (_get_Minterrupts_MSI w__0)))))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits (_get_Minterrupts_MSI w__0)))))) : unit) else returnm (tt : unit)) >> read_reg mip_ref >>= fun w__1 : Minterrupts => @@ -11727,9 +11370,9 @@ Definition clint_load (addr : mword 64) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__2 : mword 64 => returnm ((print_endline - (concat_str "clint<4>[" - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits (subrange_vec_dec w__2 31 0)))))) + (String.append "clint<4>[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits (subrange_vec_dec w__2 31 0)))))) : unit) else returnm (tt : unit)) >> ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__3 : mword 64 => @@ -11741,8 +11384,9 @@ Definition clint_load (addr : mword 64) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__4 : mword 64 => returnm ((print_endline - (concat_str "clint<8>[" - (concat_str (string_of_bits addr) (concat_str "] -> " (string_of_bits w__4))))) + (String.append "clint<8>[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits w__4))))) : unit) else returnm (tt : unit)) >> ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__5 : mword 64 => @@ -11754,9 +11398,9 @@ Definition clint_load (addr : mword 64) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__6 : mword 64 => returnm ((print_endline - (concat_str "clint-hi<4>[" - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits (subrange_vec_dec w__6 63 32)))))) + (String.append "clint-hi<4>[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits (subrange_vec_dec w__6 63 32)))))) : unit) else returnm (tt : unit)) >> ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__7 : mword 64 => @@ -11767,8 +11411,9 @@ Definition clint_load (addr : mword 64) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtime_ref) : M (mword 64)) >>= fun w__8 : mword 64 => returnm ((print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) (concat_str "] -> " (string_of_bits w__8))))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits w__8))))) : unit) else returnm (tt : unit)) >> ((read_reg mtime_ref) : M (mword 64)) >>= fun w__9 : mword 64 => @@ -11779,9 +11424,9 @@ Definition clint_load (addr : mword 64) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtime_ref) : M (mword 64)) >>= fun w__10 : mword 64 => returnm ((print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits w__10))))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits w__10))))) : unit) else returnm (tt : unit)) >> ((read_reg mtime_ref) : M (mword 64)) >>= fun w__11 : mword 64 => @@ -11793,9 +11438,9 @@ Definition clint_load (addr : mword 64) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg mtime_ref) : M (mword 64)) >>= fun w__12 : mword 64 => returnm ((print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits w__12))))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits w__12))))) : unit) else returnm (tt : unit)) >> ((read_reg mtime_ref) : M (mword 64)) >>= fun w__13 : mword 64 => @@ -11806,7 +11451,7 @@ Definition clint_load (addr : mword 64) (width : Z) `{ArithFact (width > 0)} let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "clint[" (concat_str (string_of_bits addr) "] -> <not-mapped>")) + (String.append "clint[" (String.append (string_of_bits addr) "] -> <not-mapped>")) else tt) : unit in returnm ((MemException @@ -11819,7 +11464,7 @@ Definition clint_dispatch '(tt : unit) (if ((get_config_print_platform tt)) then ((read_reg mtime_ref) : M (mword 64)) >>= fun w__0 : mword 64 => - returnm ((print_endline (concat_str "clint::tick mtime <- " (string_of_bits w__0))) + returnm ((print_endline (String.append "clint::tick mtime <- " (string_of_bits w__0))) : unit) else returnm (tt : unit)) >> (_set_Minterrupts_MTI mip_ref ((bool_to_bits false) : mword 1)) >> @@ -11828,7 +11473,8 @@ Definition clint_dispatch '(tt : unit) (if ((zopz0zIzJ_u w__1 w__2)) then (if ((get_config_print_platform tt)) then ((read_reg mtime_ref) : M (mword 64)) >>= fun w__3 : mword 64 => - returnm ((print_endline (concat_str " clint timer pending at mtime " (string_of_bits w__3))) + returnm ((print_endline + (String.append " clint timer pending at mtime " (string_of_bits w__3))) : unit) else returnm (tt : unit)) >> (_set_Minterrupts_MTI mip_ref ((bool_to_bits true) : mword 1)) @@ -11847,11 +11493,12 @@ Definition clint_store (addr : mword 64) (width : Z) (data : mword (8 * width)) (if ((get_config_print_platform tt)) then (cast_unit_vec (access_vec_dec data 0)) >>= fun w__0 : mword 1 => returnm ((print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) - (concat_str "] <- " - (concat_str (string_of_bits data) - (concat_str " (mip.MSI <- " (concat_str (string_of_bits w__0) ")"))))))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] <- " + (String.append (string_of_bits data) + (String.append " (mip.MSI <- " + (String.append (string_of_bits w__0) ")"))))))) : unit) else returnm (tt : unit)) >> (cast_unit_vec (access_vec_dec data 0)) >>= fun w__1 : mword 1 => @@ -11864,9 +11511,9 @@ Definition clint_store (addr : mword 64) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "clint<8>[" - (concat_str (string_of_bits addr) - (concat_str "] <- " (concat_str (string_of_bits data) " (mtimecmp)")))) + (String.append "clint<8>[" + (String.append (string_of_bits addr) + (String.append "] <- " (String.append (string_of_bits data) " (mtimecmp)")))) else tt) : unit in write_reg mtimecmp_ref (zero_extend data 64) >> @@ -11876,9 +11523,9 @@ Definition clint_store (addr : mword 64) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "clint<4>[" - (concat_str (string_of_bits addr) - (concat_str "] <- " (concat_str (string_of_bits data) " (mtimecmp)")))) + (String.append "clint<4>[" + (String.append (string_of_bits addr) + (String.append "] <- " (String.append (string_of_bits data) " (mtimecmp)")))) else tt) : unit in ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__2 : mword 64 => @@ -11889,9 +11536,9 @@ Definition clint_store (addr : mword 64) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "clint<4>[" - (concat_str (string_of_bits addr) - (concat_str "] <- " (concat_str (string_of_bits data) " (mtimecmp)")))) + (String.append "clint<4>[" + (String.append (string_of_bits addr) + (String.append "] <- " (String.append (string_of_bits data) " (mtimecmp)")))) else tt) : unit in ((read_reg mtimecmp_ref) : M (mword 64)) >>= fun w__3 : mword 64 => @@ -11901,9 +11548,9 @@ Definition clint_store (addr : mword 64) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "clint[" - (concat_str (string_of_bits addr) - (concat_str "] <- " (concat_str (string_of_bits data) " (<unmapped>)")))) + (String.append "clint[" + (String.append (string_of_bits addr) + (String.append "] <- " (String.append (string_of_bits data) " (<unmapped>)")))) else tt) : unit in returnm ((MemException @@ -12033,8 +11680,9 @@ Definition htif_load (addr : mword 64) (width : Z) `{ArithFact (width > 0)} (if ((get_config_print_platform tt)) then ((read_reg htif_tohost_ref) : M (mword 64)) >>= fun w__0 : mword 64 => returnm ((print_endline - (concat_str "htif[" - (concat_str (string_of_bits addr) (concat_str "] -> " (string_of_bits w__0))))) + (String.append "htif[" + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits w__0))))) : unit) else returnm (tt : unit)) >> (if sumbool_of_bool ((andb (Z.eqb width 8) (eq_vec addr (plat_htif_tohost tt)))) then @@ -12063,8 +11711,8 @@ Definition htif_store (addr : mword 64) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "htif[" - (concat_str (string_of_bits addr) (concat_str "] <- " (string_of_bits data)))) + (String.append "htif[" + (String.append (string_of_bits addr) (String.append "] <- " (string_of_bits data)))) else tt) : unit in (if sumbool_of_bool ((Z.eqb width 8)) then write_reg htif_tohost_ref (EXTZ 64 data) : M (unit) @@ -12085,7 +11733,7 @@ Definition htif_store (addr : mword 64) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "htif-syscall-proxy cmd: " (string_of_bits (_get_htif_cmd_payload cmd))) + (String.append "htif-syscall-proxy cmd: " (string_of_bits (_get_htif_cmd_payload cmd))) else tt) : unit in (cast_unit_vec (access_vec_dec (_get_htif_cmd_payload cmd) 0)) >>= fun w__3 : mword 1 => @@ -12100,15 +11748,16 @@ Definition htif_store (addr : mword 64) (width : Z) (data : mword (8 * width)) let '_ := (if ((get_config_print_platform tt)) then print_endline - (concat_str "htif-term cmd: " (string_of_bits (_get_htif_cmd_payload cmd))) + (String.append "htif-term cmd: " + (string_of_bits (_get_htif_cmd_payload cmd))) else tt) : unit in let b__2 := _get_htif_cmd_cmd cmd in if ((eq_vec b__2 (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0] : mword 8))) then tt else if ((eq_vec b__2 (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B1] : mword 8))) then plat_term_write (subrange_vec_dec (_get_htif_cmd_payload cmd) 7 0) - else print_endline (concat_str "Unknown term cmd: " (string_of_bits b__2)) - else print_endline (concat_str "htif-???? cmd: " (string_of_bits data))) + else print_endline (String.append "Unknown term cmd: " (string_of_bits b__2)) + else print_endline (String.append "htif-???? cmd: " (string_of_bits data))) : unit)) >> returnm ((MemValue (true)) @@ -12119,7 +11768,7 @@ Definition htif_tick '(tt : unit) (if ((get_config_print_platform tt)) then ((read_reg htif_tohost_ref) : M (mword 64)) >>= fun w__0 : mword 64 => - returnm ((print_endline (concat_str "htif::tick " (string_of_bits w__0))) + returnm ((print_endline (String.append "htif::tick " (string_of_bits w__0))) : unit) else returnm (tt : unit)) >> write_reg htif_tohost_ref (EXTZ 64 (vec_of_bits [B0] : mword 1)) @@ -12261,11 +11910,11 @@ Definition phys_mem_read let '_ := (if ((get_config_print_mem tt)) then print_endline - (concat_str "mem[" - (concat_str (accessType_to_str t) - (concat_str "," - (concat_str (string_of_bits addr) - (concat_str "] -> " (string_of_bits v)))))) + (String.append "mem[" + (String.append (accessType_to_str t) + (String.append "," + (String.append (string_of_bits addr) + (String.append "] -> " (string_of_bits v)))))) else tt) : unit in MemValue @@ -12394,8 +12043,8 @@ Definition phys_mem_write let '_ := (if ((get_config_print_mem tt)) then print_endline - (concat_str "mem[" - (concat_str (string_of_bits addr) (concat_str "] <- " (string_of_bits data)))) + (String.append "mem[" + (String.append (string_of_bits addr) (String.append "] <- " (string_of_bits data)))) else tt) : unit in returnm (result @@ -12776,11 +12425,11 @@ Definition update_PTE_Bits (p : PTE_Bits) (a : AccessType) Definition PTW_Error_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 4)} : PTW_Error := - let p0_ := arg_ in - if sumbool_of_bool ((Z.eqb p0_ 0)) then PTW_Access - else if sumbool_of_bool ((Z.eqb p0_ 1)) then PTW_Invalid_PTE - else if sumbool_of_bool ((Z.eqb p0_ 2)) then PTW_No_Permission - else if sumbool_of_bool ((Z.eqb p0_ 3)) then PTW_Misaligned + let l__8 := arg_ in + if sumbool_of_bool ((Z.eqb l__8 0)) then PTW_Access + else if sumbool_of_bool ((Z.eqb l__8 1)) then PTW_Invalid_PTE + else if sumbool_of_bool ((Z.eqb l__8 2)) then PTW_No_Permission + else if sumbool_of_bool ((Z.eqb l__8 3)) then PTW_Misaligned else PTW_PTE_Update. Definition num_of_PTW_Error (arg_ : PTW_Error) @@ -16324,49 +15973,17 @@ Definition encdec_amoop_backwards (arg_ : mword 5) : M (amoop) := let b__0 := arg_ in - (if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))))) then - returnm (AMOSWAP - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))))) then - returnm (AMOADD - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))))) then - returnm (AMOXOR - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))))) then - returnm (AMOAND - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))))) then - returnm (AMOOR - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))))) then - returnm (AMOMIN - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))))) then - returnm (AMOMAX - : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))))) then + (if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))) then returnm (AMOSWAP : amoop) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))) then returnm (AMOADD : amoop) + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))) then returnm (AMOXOR : amoop) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))) then returnm (AMOAND : amoop) + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))) then returnm (AMOOR : amoop) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))) then returnm (AMOMIN : amoop) + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))) then returnm (AMOMAX : amoop) + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))) then returnm (AMOMINU : amoop) - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))))) then + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))) then returnm (AMOMAXU : amoop) else assert_exp' false "Pattern match failure at unknown location" >>= fun _ => exit tt) @@ -16391,42 +16008,15 @@ Definition encdec_amoop_backwards_matches (arg_ : mword 5) : bool := let b__0 := arg_ in - if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))))) then - true - else if sumbool_of_bool ((Z.eqb (projT1 (regidx_to_regno b__0)) - (projT1 - (regidx_to_regno (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))))) then - true + if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B1] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B0;B1;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B0;B1;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B0;B0;B0] : mword 5))) then true + else if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B0;B0] : mword 5))) then true else false. Definition amo_mnemonic_forwards (arg_ : amoop) @@ -16956,7 +16546,7 @@ Definition readCSR (csr : mword 12) : M (mword 64) := (match (csr, 64) with - | (b__0, g__15) => + | (b__0, g__222) => (if ((eq_vec b__0 (vec_of_bits [B1;B1;B1;B1;B0;B0;B0;B1;B0;B0;B0;B1] : mword 12))) then ((read_reg mvendorid_ref) : M (mword 32)) >>= fun w__0 : mword 32 => returnm ((EXTZ 64 w__0) @@ -17153,7 +16743,8 @@ Definition readCSR (csr : mword 12) let '_ := (if ((get_config_print_reg tt)) then print_endline - (concat_str "CSR " (concat_str (csr_name csr) (concat_str " -> " (string_of_bits res)))) + (String.append "CSR " + (String.append (csr_name csr) (String.append " -> " (string_of_bits res)))) else tt) : unit in returnm (res @@ -17163,7 +16754,7 @@ Definition writeCSR (csr : mword 12) (value : mword 64) : M (unit) := (match (csr, 64) with - | (b__0, g__14) => + | (b__0, g__221) => (if ((eq_vec b__0 (vec_of_bits [B0;B0;B1;B1;B0;B0;B0;B0;B0;B0;B0;B0] : mword 12))) then read_reg mstatus_ref >>= fun w__0 : Mstatus => (legalize_mstatus w__0 value) >>= fun w__1 : Mstatus => @@ -17484,11 +17075,12 @@ Definition writeCSR (csr : mword 12) (value : mword 64) | Some (v) => returnm ((if ((get_config_print_reg tt)) then print_endline - (concat_str "CSR " - (concat_str (csr_name csr) - (concat_str " <- " - (concat_str (string_of_bits v) - (concat_str " (input: " (concat_str (string_of_bits value) ")")))))) + (String.append "CSR " + (String.append (csr_name csr) + (String.append " <- " + (String.append (string_of_bits v) + (String.append " (input: " + (String.append (string_of_bits value) ")")))))) else tt) : unit) | None => @@ -18988,26 +18580,18 @@ Definition encdec_backwards (arg_ : mword 32) : M (bool))) : M (bool)) (returnm ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__7 31 27))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B1;B0] : mword 5)))) - ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__7 24 20))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B0;B0] : mword 5)))) - (andb - (eq_vec (subrange_vec_dec v__7 14 14) - (vec_of_bits [B0] : mword (14 - 14 + 1))) - (eq_vec (subrange_vec_dec v__7 6 0) - (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] - : mword (6 - 0 + 1))))) - : bool)) + (eq_vec (subrange_vec_dec v__7 31 27) + (vec_of_bits [B0;B0;B0;B1;B0] : mword (31 - 27 + 1))) + (andb + (eq_vec (subrange_vec_dec v__7 24 20) + (vec_of_bits [B0;B0;B0;B0;B0] + : mword (24 - 20 + 1))) + (andb + (eq_vec (subrange_vec_dec v__7 14 14) + (vec_of_bits [B0] : mword (14 - 14 + 1))) + (eq_vec (subrange_vec_dec v__7 6 0) + (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] + : mword (6 - 0 + 1)))))) : bool))) >>= fun w__31 : bool => (if sumbool_of_bool (w__31) then let rs1 : mword 5 := subrange_vec_dec v__7 19 15 in @@ -19077,12 +18661,9 @@ Definition encdec_backwards (arg_ : mword 32) : M (bool))) : M (bool)) (returnm ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__7 31 27))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B1;B1] : mword 5)))) + (eq_vec (subrange_vec_dec v__7 31 27) + (vec_of_bits [B0;B0;B0;B1;B1] + : mword (31 - 27 + 1))) (andb (eq_vec (subrange_vec_dec v__7 14 14) (vec_of_bits [B0] : mword (14 - 14 + 1))) @@ -20331,26 +19912,18 @@ Definition encdec_backwards_matches (arg_ : mword 32) : M (bool))) : M (bool)) (returnm ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__225 31 27))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B1;B0] : mword 5)))) - ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__225 24 20))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B0;B0] : mword 5)))) - (andb - (eq_vec (subrange_vec_dec v__225 14 14) - (vec_of_bits [B0] : mword (14 - 14 + 1))) - (eq_vec (subrange_vec_dec v__225 6 0) - (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] - : mword (6 - 0 + 1))))) - : bool)) + (eq_vec (subrange_vec_dec v__225 31 27) + (vec_of_bits [B0;B0;B0;B1;B0] : mword (31 - 27 + 1))) + (andb + (eq_vec (subrange_vec_dec v__225 24 20) + (vec_of_bits [B0;B0;B0;B0;B0] + : mword (24 - 20 + 1))) + (andb + (eq_vec (subrange_vec_dec v__225 14 14) + (vec_of_bits [B0] : mword (14 - 14 + 1))) + (eq_vec (subrange_vec_dec v__225 6 0) + (vec_of_bits [B0;B1;B0;B1;B1;B1;B1] + : mword (6 - 0 + 1)))))) : bool))) >>= fun w__31 : bool => (if sumbool_of_bool (w__31) then let _mappingpatterns_8_ : mword 2 := subrange_vec_dec v__225 13 12 in @@ -20417,12 +19990,9 @@ Definition encdec_backwards_matches (arg_ : mword 32) : M (bool))) : M (bool)) (returnm ((andb - (Z.eqb - (projT1 - (regidx_to_regno (subrange_vec_dec v__225 31 27))) - (projT1 - (regidx_to_regno - (vec_of_bits [B0;B0;B0;B1;B1] : mword 5)))) + (eq_vec (subrange_vec_dec v__225 31 27) + (vec_of_bits [B0;B0;B0;B1;B1] + : mword (31 - 27 + 1))) (andb (eq_vec (subrange_vec_dec v__225 14 14) (vec_of_bits [B0] : mword (14 - 14 + 1))) @@ -21503,13 +21073,11 @@ Definition encdec_compressed_backwards (arg_ : mword 16) (andb (eq_vec (subrange_vec_dec v__460 15 13) (vec_of_bits [B0;B1;B1] : mword (15 - 13 + 1))) - ((andb - (Z.eqb (projT1 (regidx_to_regno (subrange_vec_dec v__460 11 7))) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : mword 5)))) - (eq_vec (subrange_vec_dec v__460 1 0) - (vec_of_bits [B0;B1] : mword (1 - 0 + 1)))) - : bool)))) then + (andb + (eq_vec (subrange_vec_dec v__460 11 7) + (vec_of_bits [B0;B0;B0;B1;B0] : mword (11 - 7 + 1))) + (eq_vec (subrange_vec_dec v__460 1 0) + (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))))) then let nzi9 : bits 1 := subrange_vec_dec v__460 12 12 in let nzi87 : bits 2 := subrange_vec_dec v__460 4 3 in let nzi6 : bits 1 := subrange_vec_dec v__460 5 5 in @@ -22130,13 +21698,11 @@ Definition encdec_compressed_backwards_matches (arg_ : mword 16) (andb (eq_vec (subrange_vec_dec v__618 15 13) (vec_of_bits [B0;B1;B1] : mword (15 - 13 + 1))) - ((andb - (Z.eqb (projT1 (regidx_to_regno (subrange_vec_dec v__618 11 7))) - (projT1 - (regidx_to_regno (vec_of_bits [B0;B0;B0;B1;B0] : mword 5)))) - (eq_vec (subrange_vec_dec v__618 1 0) - (vec_of_bits [B0;B1] : mword (1 - 0 + 1)))) - : bool)))) then + (andb + (eq_vec (subrange_vec_dec v__618 11 7) + (vec_of_bits [B0;B0;B0;B1;B0] : mword (11 - 7 + 1))) + (eq_vec (subrange_vec_dec v__618 1 0) + (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))))) then true else if sumbool_of_bool ((andb (let rd : regidx := subrange_vec_dec v__618 11 7 in @@ -22482,9 +22048,9 @@ Definition execute_STORECON (handle_mem_exception vaddr e) >> returnm (RETIRE_FAIL : Retired) | TR_Address (addr) => (match (width, 64) with - | (WORD, g__10) => (mem_write_ea addr 4 aq rl true) : M (MemoryOpResult unit) - | (DOUBLE, p0_) => - (if sumbool_of_bool ((Z.eqb p0_ 64)) then + | (WORD, g__217) => (mem_write_ea addr 4 aq rl true) : M (MemoryOpResult unit) + | (DOUBLE, l__4) => + (if sumbool_of_bool ((Z.eqb l__4 64)) then (mem_write_ea addr 8 aq rl true) : M (MemoryOpResult unit) else @@ -22501,11 +22067,11 @@ Definition execute_STORECON | MemValue (_) => (rX (projT1 (regidx_to_regno rs2))) >>= fun rs2_val => (match (width, 64) with - | (WORD, g__9) => + | (WORD, g__216) => (mem_write_value addr 4 (subrange_vec_dec rs2_val 31 0) aq rl true) : M (MemoryOpResult bool) - | (DOUBLE, p0_) => - (if sumbool_of_bool ((Z.eqb p0_ 64)) then + | (DOUBLE, l__3) => + (if sumbool_of_bool ((Z.eqb l__3 64)) then (mem_write_value addr 8 rs2_val aq rl true) : M (MemoryOpResult bool) else @@ -22576,17 +22142,17 @@ Definition execute_STORE | MemValue (_) => (rX (projT1 (regidx_to_regno rs2))) >>= fun rs2_val => (match (width, 64) with - | (BYTE, g__3) => + | (BYTE, g__210) => (mem_write_value addr 1 (subrange_vec_dec rs2_val 7 0) aq rl false) : M (MemoryOpResult bool) - | (HALF, g__4) => + | (HALF, g__211) => (mem_write_value addr 2 (subrange_vec_dec rs2_val 15 0) aq rl false) : M (MemoryOpResult bool) - | (WORD, g__5) => + | (WORD, g__212) => (mem_write_value addr 4 (subrange_vec_dec rs2_val 31 0) aq rl false) : M (MemoryOpResult bool) - | (DOUBLE, p0_) => - (if sumbool_of_bool ((Z.eqb p0_ 64)) then + | (DOUBLE, l__1) => + (if sumbool_of_bool ((Z.eqb l__1 64)) then (mem_write_value addr 8 rs2_val aq rl false) : M (MemoryOpResult bool) else @@ -22705,16 +22271,16 @@ Definition execute_SFENCE_VMA (rs1 : mword 5) (rs2 : mword 5) | Supervisor => read_reg mstatus_ref >>= fun w__3 : Mstatus => read_reg mstatus_ref >>= fun w__4 : Mstatus => - let p__7 := (architecture (get_mstatus_SXL w__3), _get_Mstatus_TVM w__4) in - (match p__7 with - | (Some (g__6), v_0) => + let p__214 := (architecture (get_mstatus_SXL w__3), _get_Mstatus_TVM w__4) in + (match p__214 with + | (Some (g__213), v_0) => (if ((eq_vec v_0 ((bool_to_bits true) : mword 1))) then (handle_illegal tt) >> returnm (RETIRE_FAIL : Retired) else if ((eq_vec v_0 ((bool_to_bits false) : mword 1))) then (flush_TLB asid addr) >> returnm (RETIRE_SUCCESS : Retired) else (match (Some - (g__6), v_0) with + (g__213), v_0) with | (_, _) => (internal_error "unimplemented sfence architecture") : M (Retired) end) : M (Retired)) @@ -22939,12 +22505,12 @@ Definition execute_LOADRES | TR_Failure (e) => (handle_mem_exception vaddr e) >> returnm (RETIRE_FAIL : Retired) | TR_Address (addr) => (match (width, 64) with - | (WORD, g__8) => + | (WORD, g__215) => (mem_read Read addr 4 aq rl true) >>= fun w__4 : MemoryOpResult (mword (8 * 4)) => (process_loadres rd vaddr w__4 false) : M (Retired) - | (DOUBLE, p0_) => - (if sumbool_of_bool ((Z.eqb p0_ 64)) then + | (DOUBLE, l__2) => + (if sumbool_of_bool ((Z.eqb l__2 64)) then (mem_read Read addr 8 aq rl true) >>= fun w__6 : MemoryOpResult (mword (8 * 8)) => (process_loadres rd vaddr w__6 false) : M (Retired) @@ -22983,20 +22549,20 @@ Definition execute_LOAD | TR_Failure (e) => (handle_mem_exception vaddr e) >> returnm (RETIRE_FAIL : Retired) | TR_Address (addr) => (match (width, 64) with - | (BYTE, g__0) => + | (BYTE, g__207) => (mem_read Read addr 1 aq rl false) >>= fun w__3 : MemoryOpResult (mword (8 * 1)) => (process_load rd vaddr w__3 is_unsigned) : M (Retired) - | (HALF, g__1) => + | (HALF, g__208) => (mem_read Read addr 2 aq rl false) >>= fun w__5 : MemoryOpResult (mword (8 * 2)) => (process_load rd vaddr w__5 is_unsigned) : M (Retired) - | (WORD, g__2) => + | (WORD, g__209) => (mem_read Read addr 4 aq rl false) >>= fun w__7 : MemoryOpResult (mword (8 * 4)) => (process_load rd vaddr w__7 is_unsigned) : M (Retired) - | (DOUBLE, p0_) => - (if sumbool_of_bool ((Z.eqb p0_ 64)) then + | (DOUBLE, l__0) => + (if sumbool_of_bool ((Z.eqb l__0 64)) then (mem_read Read addr 8 aq rl false) >>= fun w__9 : MemoryOpResult (mword (8 * 8)) => (process_load rd vaddr w__9 is_unsigned) : M (Retired) @@ -23041,7 +22607,7 @@ Definition execute_FENCE_TSO (pred : mword 4) (succ : mword 4) (if ((andb (eq_vec (subrange_vec_dec v__794 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__795 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_tso) + (barrier (Barrier_RISCV_tso (tt))) : M (unit) else returnm ((if ((andb @@ -23069,55 +22635,55 @@ Definition execute_FENCE (pred : mword 4) (succ : mword 4) (if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_rw_rw) + (barrier (Barrier_RISCV_rw_rw (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_r_rw) + (barrier (Barrier_RISCV_r_rw (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_r_r) + (barrier (Barrier_RISCV_r_r (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_rw_w) + (barrier (Barrier_RISCV_rw_w (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_w_w) + (barrier (Barrier_RISCV_w_w (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_w_rw) + (barrier (Barrier_RISCV_w_rw (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_rw_r) + (barrier (Barrier_RISCV_rw_r (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_r_w) + (barrier (Barrier_RISCV_r_w (tt))) : M (unit) else if ((andb (eq_vec (subrange_vec_dec v__754 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))) (eq_vec (subrange_vec_dec v__755 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))))) then - (barrier Barrier_RISCV_w_r) + (barrier (Barrier_RISCV_w_r (tt))) : M (unit) else returnm ((if ((andb @@ -23295,10 +22861,10 @@ Definition execute_AMO | TR_Failure (e) => (handle_mem_exception vaddr e) >> returnm (RETIRE_FAIL : Retired) | TR_Address (addr) => (match (width, 64) with - | (WORD, g__13) => + | (WORD, g__220) => (mem_write_ea addr 4 (andb aq rl) rl true) : M (MemoryOpResult unit) - | (DOUBLE, p0_) => - (if sumbool_of_bool ((Z.eqb p0_ 64)) then + | (DOUBLE, l__7) => + (if sumbool_of_bool ((Z.eqb l__7 64)) then (mem_write_ea addr 8 (andb aq rl) rl true) : M (MemoryOpResult unit) else (internal_error "AMO expected WORD or DOUBLE") : M (MemoryOpResult unit)) @@ -23311,12 +22877,12 @@ Definition execute_AMO (handle_mem_exception addr e) >> returnm (RETIRE_FAIL : Retired) | MemValue (_) => (match (width, 64) with - | (WORD, g__12) => + | (WORD, g__219) => (mem_read ReadWrite addr 4 aq (andb aq rl) true) >>= fun w__8 : MemoryOpResult (mword (8 * 4)) => returnm ((extend_value false w__8) : MemoryOpResult (mword 64)) - | (DOUBLE, p0_) => - (if sumbool_of_bool ((Z.eqb p0_ 64)) then + | (DOUBLE, l__6) => + (if sumbool_of_bool ((Z.eqb l__6 64)) then (mem_read ReadWrite addr 8 aq (andb aq rl) true) >>= fun w__9 : MemoryOpResult (mword (8 * 8)) => returnm ((extend_value false w__9) : MemoryOpResult (mword 64)) @@ -23353,12 +22919,12 @@ Definition execute_AMO (max_nat (projT1 (uint rs2_val)) (projT1 (uint loaded)))) end in (match (width, 64) with - | (WORD, g__11) => + | (WORD, g__218) => (mem_write_value addr 4 (subrange_vec_dec result 31 0) (andb aq rl) rl true) : M (MemoryOpResult bool) - | (DOUBLE, p0_) => - (if sumbool_of_bool ((Z.eqb p0_ 64)) then + | (DOUBLE, l__5) => + (if sumbool_of_bool ((Z.eqb l__5 64)) then (mem_write_value addr 8 result (andb aq rl) rl true) : M (MemoryOpResult bool) else @@ -43254,7 +42820,8 @@ Definition initial_analysis (instr : ast) (eq_vec (subrange_vec_dec v__839 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then returnm ((IK_barrier - (Barrier_RISCV_rw_rw)) + (Barrier_RISCV_rw_rw + (tt))) : instruction_kind ) else if ((andb (eq_vec (subrange_vec_dec v__838 1 0) @@ -43262,7 +42829,8 @@ Definition initial_analysis (instr : ast) (eq_vec (subrange_vec_dec v__839 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then returnm ((IK_barrier - (Barrier_RISCV_r_rw)) + (Barrier_RISCV_r_rw + (tt))) : instruction_kind ) else if ((andb (eq_vec (subrange_vec_dec v__838 1 0) @@ -43270,7 +42838,8 @@ Definition initial_analysis (instr : ast) (eq_vec (subrange_vec_dec v__839 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))))) then returnm ((IK_barrier - (Barrier_RISCV_r_r)) + (Barrier_RISCV_r_r + (tt))) : instruction_kind ) else if ((andb (eq_vec (subrange_vec_dec v__838 1 0) @@ -43278,7 +42847,8 @@ Definition initial_analysis (instr : ast) (eq_vec (subrange_vec_dec v__839 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))) then returnm ((IK_barrier - (Barrier_RISCV_rw_w)) + (Barrier_RISCV_rw_w + (tt))) : instruction_kind ) else if ((andb (eq_vec (subrange_vec_dec v__838 1 0) @@ -43286,7 +42856,8 @@ Definition initial_analysis (instr : ast) (eq_vec (subrange_vec_dec v__839 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))) then returnm ((IK_barrier - (Barrier_RISCV_w_w)) + (Barrier_RISCV_w_w + (tt))) : instruction_kind ) else if ((andb (eq_vec (subrange_vec_dec v__838 1 0) @@ -43294,7 +42865,8 @@ Definition initial_analysis (instr : ast) (eq_vec (subrange_vec_dec v__839 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then returnm ((IK_barrier - (Barrier_RISCV_w_rw)) + (Barrier_RISCV_w_rw + (tt))) : instruction_kind ) else if ((andb (eq_vec (subrange_vec_dec v__838 1 0) @@ -43302,7 +42874,8 @@ Definition initial_analysis (instr : ast) (eq_vec (subrange_vec_dec v__839 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))))) then returnm ((IK_barrier - (Barrier_RISCV_rw_r)) + (Barrier_RISCV_rw_r + (tt))) : instruction_kind ) else if ((andb (eq_vec (subrange_vec_dec v__838 1 0) @@ -43310,7 +42883,8 @@ Definition initial_analysis (instr : ast) (eq_vec (subrange_vec_dec v__839 1 0) (vec_of_bits [B0;B1] : mword (1 - 0 + 1))))) then returnm ((IK_barrier - (Barrier_RISCV_r_w)) + (Barrier_RISCV_r_w + (tt))) : instruction_kind ) else if ((andb (eq_vec (subrange_vec_dec v__838 1 0) @@ -43318,7 +42892,8 @@ Definition initial_analysis (instr : ast) (eq_vec (subrange_vec_dec v__839 1 0) (vec_of_bits [B1;B0] : mword (1 - 0 + 1))))) then returnm ((IK_barrier - (Barrier_RISCV_w_r)) + (Barrier_RISCV_w_r + (tt))) : instruction_kind ) else if ((andb (eq_vec (subrange_vec_dec v__838 1 0) @@ -43343,7 +42918,8 @@ Definition initial_analysis (instr : ast) (eq_vec (subrange_vec_dec v__879 1 0) (vec_of_bits [B1;B1] : mword (1 - 0 + 1))))) then returnm ((IK_barrier - (Barrier_RISCV_tso)) + (Barrier_RISCV_tso + (tt))) : instruction_kind ) else (internal_error "barrier type not implemented in initial_analysis") diff --git a/prover_snapshots/coq/RV64/riscv_extras.v b/prover_snapshots/coq/RV64/riscv_extras.v index 5828f88..84f6761 100644 --- a/prover_snapshots/coq/RV64/riscv_extras.v +++ b/prover_snapshots/coq/RV64/riscv_extras.v @@ -9,17 +9,17 @@ Import List.ListNotations. Axiom real : Type. -Definition MEM_fence_rw_rw {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_rw_rw. -Definition MEM_fence_r_rw {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_r_rw. -Definition MEM_fence_r_r {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_r_r. -Definition MEM_fence_rw_w {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_rw_w. -Definition MEM_fence_w_w {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_w_w. -Definition MEM_fence_w_rw {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_w_rw. -Definition MEM_fence_rw_r {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_rw_r. -Definition MEM_fence_r_w {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_r_w. -Definition MEM_fence_w_r {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_w_r. -Definition MEM_fence_tso {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_tso. -Definition MEM_fence_i {rv e} (_:unit) : monad rv unit e := barrier Barrier_RISCV_i. +Definition MEM_fence_rw_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_rw tt). +Definition MEM_fence_r_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_rw tt). +Definition MEM_fence_r_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_r tt). +Definition MEM_fence_rw_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_w tt). +Definition MEM_fence_w_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_w tt). +Definition MEM_fence_w_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_rw tt). +Definition MEM_fence_rw_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_r tt). +Definition MEM_fence_r_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_w tt). +Definition MEM_fence_w_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_r tt). +Definition MEM_fence_tso {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_tso tt). +Definition MEM_fence_i {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_i tt). (* val MEMea : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e val MEMea_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e diff --git a/prover_snapshots/coq/RV64/riscv_types.v b/prover_snapshots/coq/RV64/riscv_types.v index 7d3c6b4..98f6666 100644 --- a/prover_snapshots/coq/RV64/riscv_types.v +++ b/prover_snapshots/coq/RV64/riscv_types.v @@ -31,6 +31,18 @@ Inductive diafp := | DIAFP_none : unit -> diafp | DIAFP_concrete : bits 64 -> diafp | DIAFP_reg : regfp -> diafp. Arguments diafp : clear implicits. +Inductive a64_barrier_domain := A64_FullShare | A64_InnerShare | A64_OuterShare | A64_NonShare. +Scheme Equality for a64_barrier_domain. +Instance Decidable_eq_a64_barrier_domain : +forall (x y : a64_barrier_domain), Decidable (x = y) := +Decidable_eq_from_dec a64_barrier_domain_eq_dec. + +Inductive a64_barrier_type := A64_barrier_all | A64_barrier_LD | A64_barrier_ST. +Scheme Equality for a64_barrier_type. +Instance Decidable_eq_a64_barrier_type : +forall (x y : a64_barrier_type), Decidable (x = y) := +Decidable_eq_from_dec a64_barrier_type_eq_dec. + Inductive cache_op_kind := Cache_op_D_IVAC | Cache_op_D_ISW @@ -702,9 +714,10 @@ Inductive register_value := | Regval_Sinterrupts : Sinterrupts -> register_value | Regval_TLB_Entry_16_39_56_64 : TLB_Entry 16 39 56 64 -> register_value | Regval_TLB_Entry_16_48_56_64 : TLB_Entry 16 48 56 64 -> register_value - | Regval_bool : bool -> register_value - | Regval_vector_32_dec_bit : mword 32 -> register_value - | Regval_vector_64_dec_bit : mword 64 -> register_value. + | Regval_bit : bitU -> register_value + | Regval_bitvector_32_dec : mword 32 -> register_value + | Regval_bitvector_64_dec : mword 64 -> register_value + | Regval_bool : bool -> register_value. Arguments register_value : clear implicits. Record regstate := @@ -13241,35 +13254,42 @@ Definition regval_of_TLB_Entry_16_48_56_64 (v : TLB_Entry 16 48 56 64) Regval_TLB_Entry_16_48_56_64 (v). -Definition bool_of_regval (merge_var : register_value) -: option bool := +Definition bit_of_regval (merge_var : register_value) +: option bitU := - match merge_var with | Regval_bool (v) => Some (v) | _ => None end. + match merge_var with | Regval_bit (v) => Some (v) | _ => None end. -Definition regval_of_bool (v : bool) : register_value := Regval_bool (v). +Definition regval_of_bit (v : bitU) : register_value := Regval_bit (v). -Definition vector_32_dec_bit_of_regval (merge_var : register_value) +Definition bitvector_32_dec_of_regval (merge_var : register_value) : option (mword 32) := - match merge_var with | Regval_vector_32_dec_bit (v) => Some (v) | _ => None end. + match merge_var with | Regval_bitvector_32_dec (v) => Some (v) | _ => None end. -Definition regval_of_vector_32_dec_bit (v : mword 32) +Definition regval_of_bitvector_32_dec (v : mword 32) : register_value := - Regval_vector_32_dec_bit + Regval_bitvector_32_dec (v). -Definition vector_64_dec_bit_of_regval (merge_var : register_value) +Definition bitvector_64_dec_of_regval (merge_var : register_value) : option (mword 64) := - match merge_var with | Regval_vector_64_dec_bit (v) => Some (v) | _ => None end. + match merge_var with | Regval_bitvector_64_dec (v) => Some (v) | _ => None end. -Definition regval_of_vector_64_dec_bit (v : mword 64) +Definition regval_of_bitvector_64_dec (v : mword 64) : register_value := - Regval_vector_64_dec_bit + Regval_bitvector_64_dec (v). +Definition bool_of_regval (merge_var : register_value) +: option bool := + + match merge_var with | Regval_bool (v) => Some (v) | _ => None end. + +Definition regval_of_bool (v : bool) : register_value := Regval_bool (v). + Definition vector_of_regval {a} n (of_regval : register_value -> option a) (rv : register_value) : option (vec a n) := match rv with @@ -13298,8 +13318,8 @@ Definition satp_ref := {| name := "satp"; read_from := (fun s => s.(satp)); write_to := (fun v s => ({[ s with satp := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition tlb48_ref := {| name := "tlb48"; @@ -13319,8 +13339,8 @@ Definition htif_exit_code_ref := {| name := "htif_exit_code"; read_from := (fun s => s.(htif_exit_code)); write_to := (fun v s => ({[ s with htif_exit_code := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition htif_done_ref := {| name := "htif_done"; @@ -13333,22 +13353,22 @@ Definition htif_tohost_ref := {| name := "htif_tohost"; read_from := (fun s => s.(htif_tohost)); write_to := (fun v s => ({[ s with htif_tohost := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition mtimecmp_ref := {| name := "mtimecmp"; read_from := (fun s => s.(mtimecmp)); write_to := (fun v s => ({[ s with mtimecmp := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition utval_ref := {| name := "utval"; read_from := (fun s => s.(utval)); write_to := (fun v s => ({[ s with utval := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition ucause_ref := {| name := "ucause"; @@ -13361,15 +13381,15 @@ Definition uepc_ref := {| name := "uepc"; read_from := (fun s => s.(uepc)); write_to := (fun v s => ({[ s with uepc := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition uscratch_ref := {| name := "uscratch"; read_from := (fun s => s.(uscratch)); write_to := (fun v s => ({[ s with uscratch := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition utvec_ref := {| name := "utvec"; @@ -13382,113 +13402,113 @@ Definition pmpaddr15_ref := {| name := "pmpaddr15"; read_from := (fun s => s.(pmpaddr15)); write_to := (fun v s => ({[ s with pmpaddr15 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr14_ref := {| name := "pmpaddr14"; read_from := (fun s => s.(pmpaddr14)); write_to := (fun v s => ({[ s with pmpaddr14 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr13_ref := {| name := "pmpaddr13"; read_from := (fun s => s.(pmpaddr13)); write_to := (fun v s => ({[ s with pmpaddr13 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr12_ref := {| name := "pmpaddr12"; read_from := (fun s => s.(pmpaddr12)); write_to := (fun v s => ({[ s with pmpaddr12 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr11_ref := {| name := "pmpaddr11"; read_from := (fun s => s.(pmpaddr11)); write_to := (fun v s => ({[ s with pmpaddr11 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr10_ref := {| name := "pmpaddr10"; read_from := (fun s => s.(pmpaddr10)); write_to := (fun v s => ({[ s with pmpaddr10 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr9_ref := {| name := "pmpaddr9"; read_from := (fun s => s.(pmpaddr9)); write_to := (fun v s => ({[ s with pmpaddr9 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr8_ref := {| name := "pmpaddr8"; read_from := (fun s => s.(pmpaddr8)); write_to := (fun v s => ({[ s with pmpaddr8 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr7_ref := {| name := "pmpaddr7"; read_from := (fun s => s.(pmpaddr7)); write_to := (fun v s => ({[ s with pmpaddr7 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr6_ref := {| name := "pmpaddr6"; read_from := (fun s => s.(pmpaddr6)); write_to := (fun v s => ({[ s with pmpaddr6 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr5_ref := {| name := "pmpaddr5"; read_from := (fun s => s.(pmpaddr5)); write_to := (fun v s => ({[ s with pmpaddr5 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr4_ref := {| name := "pmpaddr4"; read_from := (fun s => s.(pmpaddr4)); write_to := (fun v s => ({[ s with pmpaddr4 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr3_ref := {| name := "pmpaddr3"; read_from := (fun s => s.(pmpaddr3)); write_to := (fun v s => ({[ s with pmpaddr3 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr2_ref := {| name := "pmpaddr2"; read_from := (fun s => s.(pmpaddr2)); write_to := (fun v s => ({[ s with pmpaddr2 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr1_ref := {| name := "pmpaddr1"; read_from := (fun s => s.(pmpaddr1)); write_to := (fun v s => ({[ s with pmpaddr1 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmpaddr0_ref := {| name := "pmpaddr0"; read_from := (fun s => s.(pmpaddr0)); write_to := (fun v s => ({[ s with pmpaddr0 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition pmp15cfg_ref := {| name := "pmp15cfg"; @@ -13606,15 +13626,15 @@ Definition tselect_ref := {| name := "tselect"; read_from := (fun s => s.(tselect)); write_to := (fun v s => ({[ s with tselect := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition stval_ref := {| name := "stval"; read_from := (fun s => s.(stval)); write_to := (fun v s => ({[ s with stval := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition scause_ref := {| name := "scause"; @@ -13627,15 +13647,15 @@ Definition sepc_ref := {| name := "sepc"; read_from := (fun s => s.(sepc)); write_to := (fun v s => ({[ s with sepc := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition sscratch_ref := {| name := "sscratch"; read_from := (fun s => s.(sscratch)); write_to := (fun v s => ({[ s with sscratch := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition stvec_ref := {| name := "stvec"; @@ -13662,29 +13682,29 @@ Definition mhartid_ref := {| name := "mhartid"; read_from := (fun s => s.(mhartid)); write_to := (fun v s => ({[ s with mhartid := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition marchid_ref := {| name := "marchid"; read_from := (fun s => s.(marchid)); write_to := (fun v s => ({[ s with marchid := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition mimpid_ref := {| name := "mimpid"; read_from := (fun s => s.(mimpid)); write_to := (fun v s => ({[ s with mimpid := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition mvendorid_ref := {| name := "mvendorid"; read_from := (fun s => s.(mvendorid)); write_to := (fun v s => ({[ s with mvendorid := v ]})); - of_regval := (fun v => vector_32_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_32_dec_bit v) |}. + of_regval := (fun v => bitvector_32_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_32_dec v) |}. Definition minstret_written_ref := {| name := "minstret_written"; @@ -13697,22 +13717,22 @@ Definition minstret_ref := {| name := "minstret"; read_from := (fun s => s.(minstret)); write_to := (fun v s => ({[ s with minstret := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition mtime_ref := {| name := "mtime"; read_from := (fun s => s.(mtime)); write_to := (fun v s => ({[ s with mtime := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition mcycle_ref := {| name := "mcycle"; read_from := (fun s => s.(mcycle)); write_to := (fun v s => ({[ s with mcycle := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition scounteren_ref := {| name := "scounteren"; @@ -13732,22 +13752,22 @@ Definition mscratch_ref := {| name := "mscratch"; read_from := (fun s => s.(mscratch)); write_to := (fun v s => ({[ s with mscratch := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition mtval_ref := {| name := "mtval"; read_from := (fun s => s.(mtval)); write_to := (fun v s => ({[ s with mtval := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition mepc_ref := {| name := "mepc"; read_from := (fun s => s.(mepc)); write_to := (fun v s => ({[ s with mepc := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition mcause_ref := {| name := "mcause"; @@ -13809,8 +13829,8 @@ Definition cur_inst_ref := {| name := "cur_inst"; read_from := (fun s => s.(cur_inst)); write_to := (fun v s => ({[ s with cur_inst := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition cur_privilege_ref := {| name := "cur_privilege"; @@ -13823,246 +13843,246 @@ Definition x31_ref := {| name := "x31"; read_from := (fun s => s.(x31)); write_to := (fun v s => ({[ s with x31 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x30_ref := {| name := "x30"; read_from := (fun s => s.(x30)); write_to := (fun v s => ({[ s with x30 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x29_ref := {| name := "x29"; read_from := (fun s => s.(x29)); write_to := (fun v s => ({[ s with x29 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x28_ref := {| name := "x28"; read_from := (fun s => s.(x28)); write_to := (fun v s => ({[ s with x28 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x27_ref := {| name := "x27"; read_from := (fun s => s.(x27)); write_to := (fun v s => ({[ s with x27 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x26_ref := {| name := "x26"; read_from := (fun s => s.(x26)); write_to := (fun v s => ({[ s with x26 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x25_ref := {| name := "x25"; read_from := (fun s => s.(x25)); write_to := (fun v s => ({[ s with x25 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x24_ref := {| name := "x24"; read_from := (fun s => s.(x24)); write_to := (fun v s => ({[ s with x24 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x23_ref := {| name := "x23"; read_from := (fun s => s.(x23)); write_to := (fun v s => ({[ s with x23 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x22_ref := {| name := "x22"; read_from := (fun s => s.(x22)); write_to := (fun v s => ({[ s with x22 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x21_ref := {| name := "x21"; read_from := (fun s => s.(x21)); write_to := (fun v s => ({[ s with x21 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x20_ref := {| name := "x20"; read_from := (fun s => s.(x20)); write_to := (fun v s => ({[ s with x20 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x19_ref := {| name := "x19"; read_from := (fun s => s.(x19)); write_to := (fun v s => ({[ s with x19 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x18_ref := {| name := "x18"; read_from := (fun s => s.(x18)); write_to := (fun v s => ({[ s with x18 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x17_ref := {| name := "x17"; read_from := (fun s => s.(x17)); write_to := (fun v s => ({[ s with x17 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x16_ref := {| name := "x16"; read_from := (fun s => s.(x16)); write_to := (fun v s => ({[ s with x16 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x15_ref := {| name := "x15"; read_from := (fun s => s.(x15)); write_to := (fun v s => ({[ s with x15 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x14_ref := {| name := "x14"; read_from := (fun s => s.(x14)); write_to := (fun v s => ({[ s with x14 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x13_ref := {| name := "x13"; read_from := (fun s => s.(x13)); write_to := (fun v s => ({[ s with x13 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x12_ref := {| name := "x12"; read_from := (fun s => s.(x12)); write_to := (fun v s => ({[ s with x12 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x11_ref := {| name := "x11"; read_from := (fun s => s.(x11)); write_to := (fun v s => ({[ s with x11 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x10_ref := {| name := "x10"; read_from := (fun s => s.(x10)); write_to := (fun v s => ({[ s with x10 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x9_ref := {| name := "x9"; read_from := (fun s => s.(x9)); write_to := (fun v s => ({[ s with x9 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x8_ref := {| name := "x8"; read_from := (fun s => s.(x8)); write_to := (fun v s => ({[ s with x8 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x7_ref := {| name := "x7"; read_from := (fun s => s.(x7)); write_to := (fun v s => ({[ s with x7 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x6_ref := {| name := "x6"; read_from := (fun s => s.(x6)); write_to := (fun v s => ({[ s with x6 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x5_ref := {| name := "x5"; read_from := (fun s => s.(x5)); write_to := (fun v s => ({[ s with x5 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x4_ref := {| name := "x4"; read_from := (fun s => s.(x4)); write_to := (fun v s => ({[ s with x4 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x3_ref := {| name := "x3"; read_from := (fun s => s.(x3)); write_to := (fun v s => ({[ s with x3 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x2_ref := {| name := "x2"; read_from := (fun s => s.(x2)); write_to := (fun v s => ({[ s with x2 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition x1_ref := {| name := "x1"; read_from := (fun s => s.(x1)); write_to := (fun v s => ({[ s with x1 := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition Xs_ref := {| name := "Xs"; read_from := (fun s => s.(Xs)); write_to := (fun v s => ({[ s with Xs := v ]})); - of_regval := (fun v => vector_of_regval 32 (fun v => vector_64_dec_bit_of_regval v) v); - regval_of := (fun v => regval_of_vector (fun v => regval_of_vector_64_dec_bit v) 32 false v) |}. + of_regval := (fun v => vector_of_regval 32 (fun v => bitvector_64_dec_of_regval v) v); + regval_of := (fun v => regval_of_vector (fun v => regval_of_bitvector_64_dec v) 32 false v) |}. Definition instbits_ref := {| name := "instbits"; read_from := (fun s => s.(instbits)); write_to := (fun v s => ({[ s with instbits := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition nextPC_ref := {| name := "nextPC"; read_from := (fun s => s.(nextPC)); write_to := (fun v s => ({[ s with nextPC := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Definition PC_ref := {| name := "PC"; read_from := (fun s => s.(PC)); write_to := (fun v s => ({[ s with PC := v ]})); - of_regval := (fun v => vector_64_dec_bit_of_regval v); - regval_of := (fun v => regval_of_vector_64_dec_bit v) |}. + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. Local Open Scope string. Definition get_regval (reg_name : string) (s : regstate) : option register_value := diff --git a/prover_snapshots/coq/build b/prover_snapshots/coq/build index c35c3b3..f8a1c2f 100755 --- a/prover_snapshots/coq/build +++ b/prover_snapshots/coq/build @@ -21,3 +21,7 @@ cd ../RV64 coqc -R ../../bbv/theories bbv -R ../lib/sail Sail riscv_extras.v coqc -R ../../bbv/theories bbv -R ../lib/sail Sail riscv_types.v coqc -R ../../bbv/theories bbv -R ../lib/sail Sail riscv.v +cd ../duopod +coqc -R ../../bbv/theories bbv -R ../lib/sail Sail riscv_extras.v +coqc -R ../../bbv/theories bbv -R ../lib/sail Sail riscv_duopod_types.v +coqc -R ../../bbv/theories bbv -R ../lib/sail Sail riscv_duopod.v diff --git a/prover_snapshots/coq/clean b/prover_snapshots/coq/clean index 75bdac7..6bab8e6 100755 --- a/prover_snapshots/coq/clean +++ b/prover_snapshots/coq/clean @@ -8,5 +8,6 @@ fi set -ex rm -f RV32/*.{vo,glob} RV32/.*.aux rm -f RV64/*.{vo,glob} RV64/.*.aux +rm -f duopod/*.{vo,glob} RV64/.*.aux cd lib/sail make clean diff --git a/prover_snapshots/coq/duopod/riscv_duopod.v b/prover_snapshots/coq/duopod/riscv_duopod.v new file mode 100644 index 0000000..714bfcf --- /dev/null +++ b/prover_snapshots/coq/duopod/riscv_duopod.v @@ -0,0 +1,1792 @@ +(*Generated by Sail from riscv_duopod.*) +Require Import Sail2_instr_kinds. +Require Import Sail2_values. +Require Import Sail2_string. +Require Import Sail2_real. +Require Import Sail2_operators_mwords. +Require Import Sail2_prompt_monad. +Require Import Sail2_prompt. +Require Import Sail2_state. +Require Import riscv_duopod_types. +Require Import riscv_extras. +Import ListNotations. +Open Scope string. +Open Scope bool. +Section Content. + +Definition is_none {a : Type} (opt : option a) +: bool := + + match opt with | Some (_) => false | None => true end. + +Definition is_some {a : Type} (opt : option a) +: bool := + + match opt with | Some (_) => true | None => false end. + +Definition eq_unit (_ : unit) (_ : unit) +: {_bool : bool & ArithFact (_bool = true)} := + + build_ex(true). + +Definition neq_int (x : Z) (y : Z) +: {_bool : bool & ArithFact (iff (_bool = true) (x <> y))} := + + build_ex(negb (Z.eqb x y)). + +Definition neq_bool (x : bool) (y : bool) : bool := negb (Bool.eqb x y). + +Definition __id (x : Z) : {_retval : Z & ArithFact (_retval = x)} := build_ex(x). + +Definition concat_str_bits {n : Z} (str : string) (x : mword n) +: string := + + String.append str (string_of_bits x). + +Definition concat_str_dec (str : string) (x : Z) : string := String.append str (dec_str x). + + + +Definition sail_mask {v0 : Z} (len : Z) (v : mword v0) `{ArithFact (len >= 0 /\ v0 >= 0)} +: mword len := + + if sumbool_of_bool ((Z.leb len (length_mword v))) then vector_truncate v len + else zero_extend v len. + +Definition sail_ones (n : Z) `{ArithFact (n >= 0)} : mword n := not_vec (zeros n). + +Definition slice_mask (n : Z) (i : Z) (l : Z) `{ArithFact (n >= 0)} +: mword n := + + if sumbool_of_bool ((Z.geb l n)) then shiftl (sail_ones n) i + else + let one : bits n := sail_mask n ((vec_of_bits [B1] : mword 1) : bits 1) in + shiftl (sub_vec (shiftl one l) one) i. + +Definition read_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 11)} +: read_kind := + + let l__34 := arg_ in + if sumbool_of_bool ((Z.eqb l__34 0)) then Read_plain + else if sumbool_of_bool ((Z.eqb l__34 1)) then Read_reserve + else if sumbool_of_bool ((Z.eqb l__34 2)) then Read_acquire + else if sumbool_of_bool ((Z.eqb l__34 3)) then Read_exclusive + else if sumbool_of_bool ((Z.eqb l__34 4)) then Read_exclusive_acquire + else if sumbool_of_bool ((Z.eqb l__34 5)) then Read_stream + else if sumbool_of_bool ((Z.eqb l__34 6)) then Read_RISCV_acquire + else if sumbool_of_bool ((Z.eqb l__34 7)) then Read_RISCV_strong_acquire + else if sumbool_of_bool ((Z.eqb l__34 8)) then Read_RISCV_reserved + else if sumbool_of_bool ((Z.eqb l__34 9)) then Read_RISCV_reserved_acquire + else if sumbool_of_bool ((Z.eqb l__34 10)) then Read_RISCV_reserved_strong_acquire + else Read_X86_locked. + +Definition num_of_read_kind (arg_ : read_kind) +: {e : Z & ArithFact (0 <= e /\ e <= 11)} := + + build_ex(match arg_ with + | Read_plain => 0 + | Read_reserve => 1 + | Read_acquire => 2 + | Read_exclusive => 3 + | Read_exclusive_acquire => 4 + | Read_stream => 5 + | Read_RISCV_acquire => 6 + | Read_RISCV_strong_acquire => 7 + | Read_RISCV_reserved => 8 + | Read_RISCV_reserved_acquire => 9 + | Read_RISCV_reserved_strong_acquire => 10 + | Read_X86_locked => 11 + end). + +Definition write_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 10)} +: write_kind := + + let l__24 := arg_ in + if sumbool_of_bool ((Z.eqb l__24 0)) then Write_plain + else if sumbool_of_bool ((Z.eqb l__24 1)) then Write_conditional + else if sumbool_of_bool ((Z.eqb l__24 2)) then Write_release + else if sumbool_of_bool ((Z.eqb l__24 3)) then Write_exclusive + else if sumbool_of_bool ((Z.eqb l__24 4)) then Write_exclusive_release + else if sumbool_of_bool ((Z.eqb l__24 5)) then Write_RISCV_release + else if sumbool_of_bool ((Z.eqb l__24 6)) then Write_RISCV_strong_release + else if sumbool_of_bool ((Z.eqb l__24 7)) then Write_RISCV_conditional + else if sumbool_of_bool ((Z.eqb l__24 8)) then Write_RISCV_conditional_release + else if sumbool_of_bool ((Z.eqb l__24 9)) then Write_RISCV_conditional_strong_release + else Write_X86_locked. + +Definition num_of_write_kind (arg_ : write_kind) +: {e : Z & ArithFact (0 <= e /\ e <= 10)} := + + build_ex(match arg_ with + | Write_plain => 0 + | Write_conditional => 1 + | Write_release => 2 + | Write_exclusive => 3 + | Write_exclusive_release => 4 + | Write_RISCV_release => 5 + | Write_RISCV_strong_release => 6 + | Write_RISCV_conditional => 7 + | Write_RISCV_conditional_release => 8 + | Write_RISCV_conditional_strong_release => 9 + | Write_X86_locked => 10 + end). + +Definition a64_barrier_domain_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 3)} +: a64_barrier_domain := + + let l__21 := arg_ in + if sumbool_of_bool ((Z.eqb l__21 0)) then A64_FullShare + else if sumbool_of_bool ((Z.eqb l__21 1)) then A64_InnerShare + else if sumbool_of_bool ((Z.eqb l__21 2)) then A64_OuterShare + else A64_NonShare. + +Definition num_of_a64_barrier_domain (arg_ : a64_barrier_domain) +: {e : Z & ArithFact (0 <= e /\ e <= 3)} := + + build_ex(match arg_ with + | A64_FullShare => 0 + | A64_InnerShare => 1 + | A64_OuterShare => 2 + | A64_NonShare => 3 + end). + +Definition a64_barrier_type_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} +: a64_barrier_type := + + let l__19 := arg_ in + if sumbool_of_bool ((Z.eqb l__19 0)) then A64_barrier_all + else if sumbool_of_bool ((Z.eqb l__19 1)) then A64_barrier_LD + else A64_barrier_ST. + +Definition num_of_a64_barrier_type (arg_ : a64_barrier_type) +: {e : Z & ArithFact (0 <= e /\ e <= 2)} := + + build_ex(match arg_ with | A64_barrier_all => 0 | A64_barrier_LD => 1 | A64_barrier_ST => 2 end). + +Definition trans_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 2)} +: trans_kind := + + let l__17 := arg_ in + if sumbool_of_bool ((Z.eqb l__17 0)) then Transaction_start + else if sumbool_of_bool ((Z.eqb l__17 1)) then Transaction_commit + else Transaction_abort. + +Definition num_of_trans_kind (arg_ : trans_kind) +: {e : Z & ArithFact (0 <= e /\ e <= 2)} := + + build_ex(match arg_ with + | Transaction_start => 0 + | Transaction_commit => 1 + | Transaction_abort => 2 + end). + +Definition cache_op_kind_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 10)} +: cache_op_kind := + + let l__7 := arg_ in + if sumbool_of_bool ((Z.eqb l__7 0)) then Cache_op_D_IVAC + else if sumbool_of_bool ((Z.eqb l__7 1)) then Cache_op_D_ISW + else if sumbool_of_bool ((Z.eqb l__7 2)) then Cache_op_D_CSW + else if sumbool_of_bool ((Z.eqb l__7 3)) then Cache_op_D_CISW + else if sumbool_of_bool ((Z.eqb l__7 4)) then Cache_op_D_ZVA + else if sumbool_of_bool ((Z.eqb l__7 5)) then Cache_op_D_CVAC + else if sumbool_of_bool ((Z.eqb l__7 6)) then Cache_op_D_CVAU + else if sumbool_of_bool ((Z.eqb l__7 7)) then Cache_op_D_CIVAC + else if sumbool_of_bool ((Z.eqb l__7 8)) then Cache_op_I_IALLUIS + else if sumbool_of_bool ((Z.eqb l__7 9)) then Cache_op_I_IALLU + else Cache_op_I_IVAU. + +Definition num_of_cache_op_kind (arg_ : cache_op_kind) +: {e : Z & ArithFact (0 <= e /\ e <= 10)} := + + build_ex(match arg_ with + | Cache_op_D_IVAC => 0 + | Cache_op_D_ISW => 1 + | Cache_op_D_CSW => 2 + | Cache_op_D_CISW => 3 + | Cache_op_D_ZVA => 4 + | Cache_op_D_CVAC => 5 + | Cache_op_D_CVAU => 6 + | Cache_op_D_CIVAC => 7 + | Cache_op_I_IALLUIS => 8 + | Cache_op_I_IALLU => 9 + | Cache_op_I_IVAU => 10 + end). + +Definition neq_vec {n : Z} (x : mword n) (y : mword n) : bool := negb (eq_vec x y). + + + +Definition cast_unit_vec (b : bitU) +: M (mword 1) := + + (match b with + | B0 => returnm ((vec_of_bits [B0] : mword 1) : mword 1) + | B1 => returnm ((vec_of_bits [B1] : mword 1) : mword 1) + | _ => exit tt : M (mword 1) + end) + : M (mword 1). + +Definition get_config_print_instr '(tt : unit) : bool := false. + +Definition get_config_print_reg '(tt : unit) : bool := false. + +Definition get_config_print_mem '(tt : unit) : bool := false. + +Definition get_config_print_platform '(tt : unit) : bool := false. + +Definition EXTS {n : Z} (m : Z) (v : mword n) `{ArithFact (m >= n)} : mword m := sign_extend v m. + +Definition EXTZ {n : Z} (m : Z) (v : mword n) `{ArithFact (m >= n)} : mword m := zero_extend v m. + +Definition zeros_implicit (n : Z) `{ArithFact (n >= 0)} : mword n := zeros n. + +Definition zeros (n : Z) `{ArithFact (n >= 0)} +: mword n := + + autocast (replicate_bits (vec_of_bits [B0] : mword 1) n). + +Definition ones (n : Z) `{ArithFact (n >= 0)} : mword n := sail_ones n. + +Definition bool_to_bits (x : bool) +: mword 1 := + + if sumbool_of_bool (x) then (vec_of_bits [B1] : mword 1) + else (vec_of_bits [B0] : mword 1). + +Definition bit_to_bool (b : bitU) +: M (bool) := + + (match b with + | B1 => returnm (projT1 (build_ex true : {_bool : bool & ArithFact (_bool = true)})) + | B0 => returnm (projT1 (build_ex false : {_bool : bool & ArithFact (not (_bool = true))})) + | _ => exit tt : M (bool) + end) + : M (bool). + +Definition to_bits (l : Z) (n : Z) `{ArithFact (l >= 0)} : mword l := get_slice_int l n 0. + +Definition zopz0zI_s {n : Z} (x : mword n) (y : mword n) `{ArithFact (n > 0)} +: bool := + + Z.ltb (projT1 (sint x)) (projT1 (sint y)). + +Definition zopz0zKzJ_s {n : Z} (x : mword n) (y : mword n) `{ArithFact (n > 0)} +: bool := + + Z.geb (projT1 (sint x)) (projT1 (sint y)). + +Definition zopz0zI_u {n : Z} (x : mword n) (y : mword n) +: bool := + + Z.ltb (projT1 (uint x)) (projT1 (uint y)). + +Definition zopz0zKzJ_u {n : Z} (x : mword n) (y : mword n) +: bool := + + Z.geb (projT1 (uint x)) (projT1 (uint y)). + +Definition zopz0zIzJ_u {n : Z} (x : mword n) (y : mword n) +: bool := + + Z.leb (projT1 (uint x)) (projT1 (uint y)). + +Definition shift_right_arith64 (v : mword 64) (shift : mword 6) +: mword 64 := + + let v128 : bits 128 := EXTS 128 v in + subrange_vec_dec (shift_bits_right v128 shift) 63 0. + +Definition shift_right_arith32 (v : mword 32) (shift : mword 5) +: mword 32 := + + let v64 : bits 64 := EXTS 64 v in + subrange_vec_dec (shift_bits_right v64 shift) 31 0. + +Fixpoint _rec_n_leading_spaces (s : string) (_reclimit : Z) (_acc : Acc (Zwf 0) _reclimit) +{struct _acc} : M ({n : Z & ArithFact (n >= 0)}) := + + assert_exp' (Z.geb _reclimit 0) "recursion limit reached" >>= fun _ => + let p0_ := s in + (if ((generic_eq p0_ "")) then returnm (build_ex (0 : Z)) + else + let p0_ := string_take s 1 in + (if ((generic_eq p0_ " ")) then + (_rec_n_leading_spaces (string_drop s 1) (Z.sub _reclimit 1) (_limit_reduces _acc)) >>= fun '(existT _ w__0 _ : {n : Z & ArithFact (n >= + 0)}) => + returnm (build_ex + (projT1 + (build_ex + (Z.add 1 w__0) + : {_atom : Z & ArithFact (exists ex4231_ , _atom = (1 + ex4231_) /\ 0 <= ex4231_)}))) + else returnm (build_ex (0 : Z))) + : M ({n : Z & ArithFact (n >= 0)})) + : M ({n : Z & ArithFact (n >= 0)}). + +Definition n_leading_spaces (s : string) +: M ({n : Z & ArithFact (n >= 0)}) := + + (_rec_n_leading_spaces s ((projT1 (string_length s)) : Z) (Zwf_guarded _)) + : M ({n : Z & ArithFact (n >= 0)}). + +Definition spc_forwards '(tt : unit) : string := " ". + +Definition spc_backwards (s : string) : unit := tt. + +Definition spc_matches_prefix (s : string) +: M (option ((unit * {n : Z & ArithFact (n >= 0)}))) := + + (n_leading_spaces s) >>= fun '(existT _ n _) => + let l__6 := n in + returnm ((if sumbool_of_bool ((Z.eqb l__6 0)) then None + else Some ((tt, build_ex n))) + : option ((unit * {n : Z & ArithFact (n >= 0)}))). + +Definition opt_spc_forwards '(tt : unit) : string := "". + +Definition opt_spc_backwards (s : string) : unit := tt. + +Definition opt_spc_matches_prefix (s : string) +: M (option ((unit * {n : Z & ArithFact (n >= 0)}))) := + + (n_leading_spaces s) >>= fun '(existT _ w__0 _ : {n : Z & ArithFact (n >= 0)}) => + returnm ((Some + ((tt, build_ex + w__0))) + : option ((unit * {n : Z & ArithFact (n >= 0)}))). + +Definition def_spc_forwards '(tt : unit) : string := " ". + +Definition def_spc_backwards (s : string) : unit := tt. + +Definition def_spc_matches_prefix (s : string) +: M (option ((unit * {n : Z & ArithFact (n >= 0)}))) := + + (opt_spc_matches_prefix s) + : M (option ((unit * {n : Z & ArithFact (n >= 0)}))). + +Definition hex_bits_1_forwards_matches (bv : mword 1) : bool := true. + +Definition hex_bits_1_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_1_matches_prefix s) with + | Some ((g__79, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_1_backwards (s : string) +: M (mword 1) := + + (match (hex_bits_1_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 1) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 49:2 - 51:3" >>= fun _ => + exit tt) + : M (mword 1) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 49:2 - 51:3" >>= fun _ => + exit tt + end) + : M (mword 1). + +Definition hex_bits_2_forwards_matches (bv : mword 2) : bool := true. + +Definition hex_bits_2_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_2_matches_prefix s) with + | Some ((g__78, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_2_backwards (s : string) +: M (mword 2) := + + (match (hex_bits_2_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 2) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 68:2 - 70:3" >>= fun _ => + exit tt) + : M (mword 2) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 68:2 - 70:3" >>= fun _ => + exit tt + end) + : M (mword 2). + +Definition hex_bits_3_forwards_matches (bv : mword 3) : bool := true. + +Definition hex_bits_3_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_3_matches_prefix s) with + | Some ((g__77, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_3_backwards (s : string) +: M (mword 3) := + + (match (hex_bits_3_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 3) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 87:2 - 89:3" >>= fun _ => + exit tt) + : M (mword 3) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 87:2 - 89:3" >>= fun _ => + exit tt + end) + : M (mword 3). + +Definition hex_bits_4_forwards_matches (bv : mword 4) : bool := true. + +Definition hex_bits_4_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_4_matches_prefix s) with + | Some ((g__76, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_4_backwards (s : string) +: M (mword 4) := + + (match (hex_bits_4_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 4) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 106:2 - 108:3" >>= fun _ => + exit tt) + : M (mword 4) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 106:2 - 108:3" >>= fun _ => + exit tt + end) + : M (mword 4). + +Definition hex_bits_5_forwards_matches (bv : mword 5) : bool := true. + +Definition hex_bits_5_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_5_matches_prefix s) with + | Some ((g__75, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_5_backwards (s : string) +: M (mword 5) := + + (match (hex_bits_5_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 5) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 125:2 - 127:3" >>= fun _ => + exit tt) + : M (mword 5) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 125:2 - 127:3" >>= fun _ => + exit tt + end) + : M (mword 5). + +Definition hex_bits_6_forwards_matches (bv : mword 6) : bool := true. + +Definition hex_bits_6_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_6_matches_prefix s) with + | Some ((g__74, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_6_backwards (s : string) +: M (mword 6) := + + (match (hex_bits_6_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 6) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 144:2 - 146:3" >>= fun _ => + exit tt) + : M (mword 6) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 144:2 - 146:3" >>= fun _ => + exit tt + end) + : M (mword 6). + +Definition hex_bits_7_forwards_matches (bv : mword 7) : bool := true. + +Definition hex_bits_7_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_7_matches_prefix s) with + | Some ((g__73, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_7_backwards (s : string) +: M (mword 7) := + + (match (hex_bits_7_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 7) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 163:2 - 165:3" >>= fun _ => + exit tt) + : M (mword 7) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 163:2 - 165:3" >>= fun _ => + exit tt + end) + : M (mword 7). + +Definition hex_bits_8_forwards_matches (bv : mword 8) : bool := true. + +Definition hex_bits_8_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_8_matches_prefix s) with + | Some ((g__72, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_8_backwards (s : string) +: M (mword 8) := + + (match (hex_bits_8_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 8) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 182:2 - 184:3" >>= fun _ => + exit tt) + : M (mword 8) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 182:2 - 184:3" >>= fun _ => + exit tt + end) + : M (mword 8). + +Definition hex_bits_9_forwards_matches (bv : mword 9) : bool := true. + +Definition hex_bits_9_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_9_matches_prefix s) with + | Some ((g__71, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_9_backwards (s : string) +: M (mword 9) := + + (match (hex_bits_9_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 9) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 201:2 - 203:3" >>= fun _ => + exit tt) + : M (mword 9) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 201:2 - 203:3" >>= fun _ => + exit tt + end) + : M (mword 9). + +Definition hex_bits_10_forwards_matches (bv : mword 10) : bool := true. + +Definition hex_bits_10_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_10_matches_prefix s) with + | Some ((g__70, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_10_backwards (s : string) +: M (mword 10) := + + (match (hex_bits_10_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 10) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 220:2 - 222:3" >>= fun _ => + exit tt) + : M (mword 10) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 220:2 - 222:3" >>= fun _ => + exit tt + end) + : M (mword 10). + +Definition hex_bits_11_forwards_matches (bv : mword 11) : bool := true. + +Definition hex_bits_11_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_11_matches_prefix s) with + | Some ((g__69, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_11_backwards (s : string) +: M (mword 11) := + + (match (hex_bits_11_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 11) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 239:2 - 241:3" >>= fun _ => + exit tt) + : M (mword 11) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 239:2 - 241:3" >>= fun _ => + exit tt + end) + : M (mword 11). + +Definition hex_bits_12_forwards_matches (bv : mword 12) : bool := true. + +Definition hex_bits_12_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_12_matches_prefix s) with + | Some ((g__68, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_12_backwards (s : string) +: M (mword 12) := + + (match (hex_bits_12_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 12) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 258:2 - 260:3" >>= fun _ => + exit tt) + : M (mword 12) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 258:2 - 260:3" >>= fun _ => + exit tt + end) + : M (mword 12). + +Definition hex_bits_13_forwards_matches (bv : mword 13) : bool := true. + +Definition hex_bits_13_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_13_matches_prefix s) with + | Some ((g__67, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_13_backwards (s : string) +: M (mword 13) := + + (match (hex_bits_13_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 13) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 277:2 - 279:3" >>= fun _ => + exit tt) + : M (mword 13) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 277:2 - 279:3" >>= fun _ => + exit tt + end) + : M (mword 13). + +Definition hex_bits_14_forwards_matches (bv : mword 14) : bool := true. + +Definition hex_bits_14_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_14_matches_prefix s) with + | Some ((g__66, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_14_backwards (s : string) +: M (mword 14) := + + (match (hex_bits_14_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 14) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 296:2 - 298:3" >>= fun _ => + exit tt) + : M (mword 14) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 296:2 - 298:3" >>= fun _ => + exit tt + end) + : M (mword 14). + +Definition hex_bits_15_forwards_matches (bv : mword 15) : bool := true. + +Definition hex_bits_15_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_15_matches_prefix s) with + | Some ((g__65, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_15_backwards (s : string) +: M (mword 15) := + + (match (hex_bits_15_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 15) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 315:2 - 317:3" >>= fun _ => + exit tt) + : M (mword 15) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 315:2 - 317:3" >>= fun _ => + exit tt + end) + : M (mword 15). + +Definition hex_bits_16_forwards_matches (bv : mword 16) : bool := true. + +Definition hex_bits_16_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_16_matches_prefix s) with + | Some ((g__64, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_16_backwards (s : string) +: M (mword 16) := + + (match (hex_bits_16_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 16) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 334:2 - 336:3" >>= fun _ => + exit tt) + : M (mword 16) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 334:2 - 336:3" >>= fun _ => + exit tt + end) + : M (mword 16). + +Definition hex_bits_17_forwards_matches (bv : mword 17) : bool := true. + +Definition hex_bits_17_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_17_matches_prefix s) with + | Some ((g__63, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_17_backwards (s : string) +: M (mword 17) := + + (match (hex_bits_17_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 17) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 353:2 - 355:3" >>= fun _ => + exit tt) + : M (mword 17) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 353:2 - 355:3" >>= fun _ => + exit tt + end) + : M (mword 17). + +Definition hex_bits_18_forwards_matches (bv : mword 18) : bool := true. + +Definition hex_bits_18_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_18_matches_prefix s) with + | Some ((g__62, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_18_backwards (s : string) +: M (mword 18) := + + (match (hex_bits_18_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 18) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 372:2 - 374:3" >>= fun _ => + exit tt) + : M (mword 18) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 372:2 - 374:3" >>= fun _ => + exit tt + end) + : M (mword 18). + +Definition hex_bits_19_forwards_matches (bv : mword 19) : bool := true. + +Definition hex_bits_19_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_19_matches_prefix s) with + | Some ((g__61, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_19_backwards (s : string) +: M (mword 19) := + + (match (hex_bits_19_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 19) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 391:2 - 393:3" >>= fun _ => + exit tt) + : M (mword 19) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 391:2 - 393:3" >>= fun _ => + exit tt + end) + : M (mword 19). + +Definition hex_bits_20_forwards_matches (bv : mword 20) : bool := true. + +Definition hex_bits_20_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_20_matches_prefix s) with + | Some ((g__60, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_20_backwards (s : string) +: M (mword 20) := + + (match (hex_bits_20_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 20) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 410:2 - 412:3" >>= fun _ => + exit tt) + : M (mword 20) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 410:2 - 412:3" >>= fun _ => + exit tt + end) + : M (mword 20). + +Definition hex_bits_21_forwards_matches (bv : mword 21) : bool := true. + +Definition hex_bits_21_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_21_matches_prefix s) with + | Some ((g__59, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_21_backwards (s : string) +: M (mword 21) := + + (match (hex_bits_21_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 21) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 429:2 - 431:3" >>= fun _ => + exit tt) + : M (mword 21) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 429:2 - 431:3" >>= fun _ => + exit tt + end) + : M (mword 21). + +Definition hex_bits_22_forwards_matches (bv : mword 22) : bool := true. + +Definition hex_bits_22_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_22_matches_prefix s) with + | Some ((g__58, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_22_backwards (s : string) +: M (mword 22) := + + (match (hex_bits_22_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 22) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 448:2 - 450:3" >>= fun _ => + exit tt) + : M (mword 22) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 448:2 - 450:3" >>= fun _ => + exit tt + end) + : M (mword 22). + +Definition hex_bits_23_forwards_matches (bv : mword 23) : bool := true. + +Definition hex_bits_23_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_23_matches_prefix s) with + | Some ((g__57, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_23_backwards (s : string) +: M (mword 23) := + + (match (hex_bits_23_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 23) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 467:2 - 469:3" >>= fun _ => + exit tt) + : M (mword 23) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 467:2 - 469:3" >>= fun _ => + exit tt + end) + : M (mword 23). + +Definition hex_bits_24_forwards_matches (bv : mword 24) : bool := true. + +Definition hex_bits_24_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_24_matches_prefix s) with + | Some ((g__56, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_24_backwards (s : string) +: M (mword 24) := + + (match (hex_bits_24_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 24) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 486:2 - 488:3" >>= fun _ => + exit tt) + : M (mword 24) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 486:2 - 488:3" >>= fun _ => + exit tt + end) + : M (mword 24). + +Definition hex_bits_25_forwards_matches (bv : mword 25) : bool := true. + +Definition hex_bits_25_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_25_matches_prefix s) with + | Some ((g__55, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_25_backwards (s : string) +: M (mword 25) := + + (match (hex_bits_25_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 25) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 505:2 - 507:3" >>= fun _ => + exit tt) + : M (mword 25) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 505:2 - 507:3" >>= fun _ => + exit tt + end) + : M (mword 25). + +Definition hex_bits_26_forwards_matches (bv : mword 26) : bool := true. + +Definition hex_bits_26_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_26_matches_prefix s) with + | Some ((g__54, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_26_backwards (s : string) +: M (mword 26) := + + (match (hex_bits_26_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 26) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 524:2 - 526:3" >>= fun _ => + exit tt) + : M (mword 26) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 524:2 - 526:3" >>= fun _ => + exit tt + end) + : M (mword 26). + +Definition hex_bits_27_forwards_matches (bv : mword 27) : bool := true. + +Definition hex_bits_27_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_27_matches_prefix s) with + | Some ((g__53, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_27_backwards (s : string) +: M (mword 27) := + + (match (hex_bits_27_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 27) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 543:2 - 545:3" >>= fun _ => + exit tt) + : M (mword 27) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 543:2 - 545:3" >>= fun _ => + exit tt + end) + : M (mword 27). + +Definition hex_bits_28_forwards_matches (bv : mword 28) : bool := true. + +Definition hex_bits_28_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_28_matches_prefix s) with + | Some ((g__52, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_28_backwards (s : string) +: M (mword 28) := + + (match (hex_bits_28_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 28) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 562:2 - 564:3" >>= fun _ => + exit tt) + : M (mword 28) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 562:2 - 564:3" >>= fun _ => + exit tt + end) + : M (mword 28). + +Definition hex_bits_29_forwards_matches (bv : mword 29) : bool := true. + +Definition hex_bits_29_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_29_matches_prefix s) with + | Some ((g__51, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_29_backwards (s : string) +: M (mword 29) := + + (match (hex_bits_29_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 29) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 581:2 - 583:3" >>= fun _ => + exit tt) + : M (mword 29) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 581:2 - 583:3" >>= fun _ => + exit tt + end) + : M (mword 29). + +Definition hex_bits_30_forwards_matches (bv : mword 30) : bool := true. + +Definition hex_bits_30_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_30_matches_prefix s) with + | Some ((g__50, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_30_backwards (s : string) +: M (mword 30) := + + (match (hex_bits_30_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 30) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 600:2 - 602:3" >>= fun _ => + exit tt) + : M (mword 30) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 600:2 - 602:3" >>= fun _ => + exit tt + end) + : M (mword 30). + +Definition hex_bits_31_forwards_matches (bv : mword 31) : bool := true. + +Definition hex_bits_31_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_31_matches_prefix s) with + | Some ((g__49, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_31_backwards (s : string) +: M (mword 31) := + + (match (hex_bits_31_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 31) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 619:2 - 621:3" >>= fun _ => + exit tt) + : M (mword 31) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 619:2 - 621:3" >>= fun _ => + exit tt + end) + : M (mword 31). + +Definition hex_bits_32_forwards_matches (bv : mword 32) : bool := true. + +Definition hex_bits_32_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_32_matches_prefix s) with + | Some ((g__48, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_32_backwards (s : string) +: M (mword 32) := + + (match (hex_bits_32_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 32) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 638:2 - 640:3" >>= fun _ => + exit tt) + : M (mword 32) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 638:2 - 640:3" >>= fun _ => + exit tt + end) + : M (mword 32). + +Definition hex_bits_33_forwards_matches (bv : mword 33) : bool := true. + +Definition hex_bits_33_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_33_matches_prefix s) with + | Some ((g__47, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_33_backwards (s : string) +: M (mword 33) := + + (match (hex_bits_33_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 33) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 657:2 - 659:3" >>= fun _ => + exit tt) + : M (mword 33) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 657:2 - 659:3" >>= fun _ => + exit tt + end) + : M (mword 33). + +Definition hex_bits_48_forwards_matches (bv : mword 48) : bool := true. + +Definition hex_bits_48_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_48_matches_prefix s) with + | Some ((g__46, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_48_backwards (s : string) +: M (mword 48) := + + (match (hex_bits_48_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 48) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 676:2 - 678:3" >>= fun _ => + exit tt) + : M (mword 48) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 676:2 - 678:3" >>= fun _ => + exit tt + end) + : M (mword 48). + +Definition hex_bits_64_forwards_matches (bv : mword 64) : bool := true. + +Definition hex_bits_64_backwards_matches (s : string) +: bool := + + match s with + | s => + if ((match (hex_bits_64_matches_prefix s) with + | Some ((g__45, existT _ n _)) => + if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then true else false + | _ => false + end)) then + true + else false + end. + +Definition hex_bits_64_backwards (s : string) +: M (mword 64) := + + (match (hex_bits_64_matches_prefix s) with + | Some ((bv, existT _ n _)) => + (if sumbool_of_bool ((Z.eqb n (projT1 (string_length s)))) then returnm (bv : mword 64) + else + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 695:2 - 697:3" >>= fun _ => + exit tt) + : M (mword 64) + | _ => + assert_exp' false "Pattern match failure at model/prelude_mapping.sail 695:2 - 697:3" >>= fun _ => + exit tt + end) + : M (mword 64). + +Definition default_meta : mem_meta := tt. +Hint Unfold default_meta : sail. +Definition __WriteRAM_Meta (addr : mword 64) (width : Z) (meta : unit) +: M (unit) := + + returnm (tt + : unit). + +Definition __ReadRAM_Meta (addr : mword 64) (width : Z) : M (unit) := returnm (tt : unit). + +Definition write_ram +(wk : write_kind) (addr : mword 64) (width : Z) (data : mword (8 * width)) (meta : unit) +`{ArithFact (0 < width /\ width <= 16)} +: M (bool) := + + (write_mem wk 64 addr width data) >>= fun ret : bool => + (if sumbool_of_bool (ret) then (__WriteRAM_Meta addr width meta) : M (unit) + else returnm (tt : unit)) >> + returnm (ret + : bool). + +Definition write_ram_ea (wk : write_kind) (addr : mword 64) (width : Z) +`{ArithFact (0 < width /\ width <= 16)} +: M (unit) := + + (write_mem_ea wk 64 addr width) + : M (unit). + +Definition read_ram (rk : read_kind) (addr : mword 64) (width : Z) +`{ArithFact (0 < width /\ width <= 16)} +: M (mword (8 * width)) := + + (read_mem rk 64 addr width) + : M (mword (8 * width)). + +Axiom __TraceMemoryWrite : forall {m : Z} (n : Z) (_ : mword m) (_ : mword (8 * n)) , unit. + +Axiom __TraceMemoryRead : forall {m : Z} (n : Z) (_ : mword m) (_ : mword (8 * n)) , unit. + +Definition regbits_to_regno (b : mword 5) +: {n : Z & ArithFact (0 <= n /\ n < 32)} := + + build_ex(let 'r := projT1 (uint b) in + r). + +Definition rX (l__5 : Z) `{ArithFact (0 <= l__5 /\ l__5 < 32)} +: M (mword 64) := + + (if sumbool_of_bool ((Z.eqb l__5 0)) then + returnm ((EXTZ 64 (vec_of_bits [B0;B0;B0;B0] : mword 4)) + : mword 64) + else if sumbool_of_bool ((Z.gtb l__5 0)) then + read_reg Xs_ref >>= fun w__0 : vec (mword 64) 32 => + returnm ((vec_access_dec w__0 l__5) + : mword 64) + else + assert_exp' false "Pattern match failure at model/riscv_duopod.sail 22:0 - 23:27" >>= fun _ => + exit tt) + : M (mword 64). + +Definition wX (r : Z) (v : mword 64) `{ArithFact (0 <= r /\ r < 32)} +: M (unit) := + + (if sumbool_of_bool ((projT1 (neq_int r 0))) then + read_reg Xs_ref >>= fun w__0 : vec (mword 64) 32 => + write_reg Xs_ref (vec_update_dec w__0 r v) + : M (unit) + else returnm (tt : unit)) + : M (unit). + +Definition read_mem (addr : mword 64) (width : Z) `{ArithFact (width >= 0)} +: M (mword (8 * width)) := + + (MEMr 64 width (EXTZ 64 (vec_of_bits [B0;B0;B0;B0] : mword 4)) addr) + : M (mword (8 * width)). + +Definition iop_of_num (arg_ : Z) `{ArithFact (0 <= arg_ /\ arg_ <= 5)} +: iop := + + let l__0 := arg_ in + if sumbool_of_bool ((Z.eqb l__0 0)) then RISCV_ADDI + else if sumbool_of_bool ((Z.eqb l__0 1)) then RISCV_SLTI + else if sumbool_of_bool ((Z.eqb l__0 2)) then RISCV_SLTIU + else if sumbool_of_bool ((Z.eqb l__0 3)) then RISCV_XORI + else if sumbool_of_bool ((Z.eqb l__0 4)) then RISCV_ORI + else RISCV_ANDI. + +Definition num_of_iop (arg_ : iop) +: {e : Z & ArithFact (0 <= e /\ e <= 5)} := + + build_ex(match arg_ with + | RISCV_ADDI => 0 + | RISCV_SLTI => 1 + | RISCV_SLTIU => 2 + | RISCV_XORI => 3 + | RISCV_ORI => 4 + | RISCV_ANDI => 5 + end). + +Definition execute_LOAD (imm : mword 12) (rs1 : mword 5) (rd : mword 5) +: M (unit) := + + (rX (projT1 (regbits_to_regno rs1))) >>= fun w__0 : mword 64 => + let addr : xlenbits := add_vec w__0 (EXTS 64 imm) in + (read_mem addr 8) >>= fun result : xlenbits => + (wX (projT1 (regbits_to_regno rd)) result) + : M (unit). + +Definition execute_ITYPE (arg0 : mword 12) (arg1 : mword 5) (arg2 : mword 5) (arg3 : iop) +: M (unit) := + + let merge_var := (arg0, arg1, arg2, arg3) in + (match merge_var with + | (imm, rs1, rd, RISCV_ADDI) => + (rX (projT1 (regbits_to_regno rs1))) >>= fun rs1_val => + let imm_ext : xlenbits := EXTS 64 imm in + let result := add_vec rs1_val imm_ext in + (wX (projT1 (regbits_to_regno rd)) result) + : M (unit) + | _ => exit tt : M (unit) + end) + : M (unit). + +Definition execute (merge_var : ast) +: M (unit) := + + (match merge_var with + | ITYPE ((imm, rs1, rd, arg3)) => (execute_ITYPE imm rs1 rd arg3) : M (unit) + | LOAD ((imm, rs1, rd)) => (execute_LOAD imm rs1 rd) : M (unit) + end) + : M (unit). + +Definition decode (v__0 : mword 32) +: option ast := + + if ((andb (eq_vec (subrange_vec_dec v__0 14 12) (vec_of_bits [B0;B0;B0] : mword (14 - 12 + 1))) + (eq_vec (subrange_vec_dec v__0 6 0) + (vec_of_bits [B0;B0;B1;B0;B0;B1;B1] : mword (6 - 0 + 1))))) then + let imm : bits 12 := subrange_vec_dec v__0 31 20 in + let rs1 : regbits := subrange_vec_dec v__0 19 15 in + let rd : regbits := subrange_vec_dec v__0 11 7 in + let imm : bits 12 := subrange_vec_dec v__0 31 20 in + Some + (ITYPE + ((imm, rs1, rd, RISCV_ADDI))) + else if ((andb + (eq_vec (subrange_vec_dec v__0 14 12) (vec_of_bits [B0;B1;B1] : mword (14 - 12 + 1))) + (eq_vec (subrange_vec_dec v__0 6 0) + (vec_of_bits [B0;B0;B0;B0;B0;B1;B1] : mword (6 - 0 + 1))))) then + let imm : bits 12 := subrange_vec_dec v__0 31 20 in + let rs1 : regbits := subrange_vec_dec v__0 19 15 in + let rd : regbits := subrange_vec_dec v__0 11 7 in + let imm : bits 12 := subrange_vec_dec v__0 31 20 in + Some + (LOAD + ((imm, rs1, rd))) + else None. + +Definition initial_regstate : regstate := +{| Xs := + (vec_of_list_len [(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64); + (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64);(vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64)]); + nextPC := + (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64); + PC := + (vec_of_bits [B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0;B0; + B0] + : mword 64) |}. +Hint Unfold initial_regstate : sail. + +End Content. diff --git a/prover_snapshots/coq/duopod/riscv_duopod_types.v b/prover_snapshots/coq/duopod/riscv_duopod_types.v new file mode 100644 index 0000000..b408f5c --- /dev/null +++ b/prover_snapshots/coq/duopod/riscv_duopod_types.v @@ -0,0 +1,186 @@ +(*Generated by Sail from riscv_duopod.*) +Require Import Sail2_instr_kinds. +Require Import Sail2_values. +Require Import Sail2_string. +Require Import Sail2_real. +Require Import Sail2_operators_mwords. +Require Import Sail2_prompt_monad. +Require Import Sail2_prompt. +Require Import Sail2_state. +Import ListNotations. +Definition bits (n : Z) : Type := mword n. + +Inductive regfp := + | RFull : string -> regfp + | RSlice : (string * {n : Z & ArithFact (n >= 0)} * {n : Z & ArithFact (n >= 0)}) -> regfp + | RSliceBit : (string * {n : Z & ArithFact (n >= 0)}) -> regfp + | RField : (string * string) -> regfp. +Arguments regfp : clear implicits. + +Definition regfps : Type := list regfp. + +Inductive niafp := + | NIAFP_successor : unit -> niafp + | NIAFP_concrete_address : bits 64 -> niafp + | NIAFP_indirect_address : unit -> niafp. +Arguments niafp : clear implicits. + +Definition niafps : Type := list niafp. + +Inductive diafp := + | DIAFP_none : unit -> diafp | DIAFP_concrete : bits 64 -> diafp | DIAFP_reg : regfp -> diafp. +Arguments diafp : clear implicits. + +Inductive a64_barrier_domain := A64_FullShare | A64_InnerShare | A64_OuterShare | A64_NonShare. +Scheme Equality for a64_barrier_domain. +Instance Decidable_eq_a64_barrier_domain : +forall (x y : a64_barrier_domain), Decidable (x = y) := +Decidable_eq_from_dec a64_barrier_domain_eq_dec. + +Inductive a64_barrier_type := A64_barrier_all | A64_barrier_LD | A64_barrier_ST. +Scheme Equality for a64_barrier_type. +Instance Decidable_eq_a64_barrier_type : +forall (x y : a64_barrier_type), Decidable (x = y) := +Decidable_eq_from_dec a64_barrier_type_eq_dec. + +Inductive cache_op_kind := + Cache_op_D_IVAC + | Cache_op_D_ISW + | Cache_op_D_CSW + | Cache_op_D_CISW + | Cache_op_D_ZVA + | Cache_op_D_CVAC + | Cache_op_D_CVAU + | Cache_op_D_CIVAC + | Cache_op_I_IALLUIS + | Cache_op_I_IALLU + | Cache_op_I_IVAU. +Scheme Equality for cache_op_kind. +Instance Decidable_eq_cache_op_kind : +forall (x y : cache_op_kind), Decidable (x = y) := +Decidable_eq_from_dec cache_op_kind_eq_dec. + +Definition xlen : Z := 64. +Hint Unfold xlen : sail. + +Definition xlen_bytes : Z := 8. +Hint Unfold xlen_bytes : sail. + +Definition xlenbits : Type := bits 64. + +Definition mem_meta : Type := unit. + +Definition max_mem_access : Z := 16. +Hint Unfold max_mem_access : sail. + +Definition regno (n : Z)`{ArithFact (0 <= n /\ n < 32)} : Type := Z. + +Definition regbits : Type := bits 5. + +Inductive iop := RISCV_ADDI | RISCV_SLTI | RISCV_SLTIU | RISCV_XORI | RISCV_ORI | RISCV_ANDI. +Scheme Equality for iop. +Instance Decidable_eq_iop : +forall (x y : iop), Decidable (x = y) := +Decidable_eq_from_dec iop_eq_dec. + +Inductive ast := + | ITYPE : (bits 12 * regbits * regbits * iop) -> ast | LOAD : (bits 12 * regbits * regbits) -> ast. +Arguments ast : clear implicits. + +Inductive register_value := + | Regval_vector : (Z * bool * list register_value) -> register_value + | Regval_list : list register_value -> register_value + | Regval_option : option register_value -> register_value + | Regval_bit : bitU -> register_value + | Regval_bitvector_64_dec : mword 64 -> register_value. +Arguments register_value : clear implicits. + +Record regstate := { Xs : vec (mword 64) 32; nextPC : mword 64; PC : mword 64; }. +Arguments regstate : clear implicits. +Notation "{[ r 'with' 'Xs' := e ]}" := {| Xs := e; nextPC := nextPC r; PC := PC r |}. +Notation "{[ r 'with' 'nextPC' := e ]}" := {| nextPC := e; Xs := Xs r; PC := PC r |}. +Notation "{[ r 'with' 'PC' := e ]}" := {| PC := e; Xs := Xs r; nextPC := nextPC r |}. + + + +Definition bit_of_regval (merge_var : register_value) +: option bitU := + + match merge_var with | Regval_bit (v) => Some (v) | _ => None end. + +Definition regval_of_bit (v : bitU) : register_value := Regval_bit (v). + +Definition bitvector_64_dec_of_regval (merge_var : register_value) +: option (mword 64) := + + match merge_var with | Regval_bitvector_64_dec (v) => Some (v) | _ => None end. + +Definition regval_of_bitvector_64_dec (v : mword 64) +: register_value := + + Regval_bitvector_64_dec + (v). + + + +Definition vector_of_regval {a} n (of_regval : register_value -> option a) (rv : register_value) : option (vec a n) := match rv with + | Regval_vector (n', _, v) => if n =? n' then map_bind (vec_of_list n) (just_list (List.map of_regval v)) else None + | _ => None +end. + +Definition regval_of_vector {a} (regval_of : a -> register_value) (size : Z) (is_inc : bool) (xs : vec a size) : register_value := Regval_vector (size, is_inc, List.map regval_of (list_of_vec xs)). + +Definition list_of_regval {a} (of_regval : register_value -> option a) (rv : register_value) : option (list a) := match rv with + | Regval_list v => just_list (List.map of_regval v) + | _ => None +end. + +Definition regval_of_list {a} (regval_of : a -> register_value) (xs : list a) : register_value := Regval_list (List.map regval_of xs). + +Definition option_of_regval {a} (of_regval : register_value -> option a) (rv : register_value) : option (option a) := match rv with + | Regval_option v => option_map of_regval v + | _ => None +end. + +Definition regval_of_option {a} (regval_of : a -> register_value) (v : option a) := Regval_option (option_map regval_of v). + + +Definition Xs_ref := {| + name := "Xs"; + read_from := (fun s => s.(Xs)); + write_to := (fun v s => ({[ s with Xs := v ]})); + of_regval := (fun v => vector_of_regval 32 (fun v => bitvector_64_dec_of_regval v) v); + regval_of := (fun v => regval_of_vector (fun v => regval_of_bitvector_64_dec v) 32 false v) |}. + +Definition nextPC_ref := {| + name := "nextPC"; + read_from := (fun s => s.(nextPC)); + write_to := (fun v s => ({[ s with nextPC := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Definition PC_ref := {| + name := "PC"; + read_from := (fun s => s.(PC)); + write_to := (fun v s => ({[ s with PC := v ]})); + of_regval := (fun v => bitvector_64_dec_of_regval v); + regval_of := (fun v => regval_of_bitvector_64_dec v) |}. + +Local Open Scope string. +Definition get_regval (reg_name : string) (s : regstate) : option register_value := + if string_dec reg_name "Xs" then Some (Xs_ref.(regval_of) (Xs_ref.(read_from) s)) else + if string_dec reg_name "nextPC" then Some (nextPC_ref.(regval_of) (nextPC_ref.(read_from) s)) else + if string_dec reg_name "PC" then Some (PC_ref.(regval_of) (PC_ref.(read_from) s)) else + None. + +Definition set_regval (reg_name : string) (v : register_value) (s : regstate) : option regstate := + if string_dec reg_name "Xs" then option_map (fun v => Xs_ref.(write_to) v s) (Xs_ref.(of_regval) v) else + if string_dec reg_name "nextPC" then option_map (fun v => nextPC_ref.(write_to) v s) (nextPC_ref.(of_regval) v) else + if string_dec reg_name "PC" then option_map (fun v => PC_ref.(write_to) v s) (PC_ref.(of_regval) v) else + None. + +Definition register_accessors := (get_regval, set_regval). + + +Definition MR a r := monadR register_value a r unit. +Definition M a := monad register_value a unit. diff --git a/prover_snapshots/coq/duopod/riscv_extras.v b/prover_snapshots/coq/duopod/riscv_extras.v new file mode 100644 index 0000000..84f6761 --- /dev/null +++ b/prover_snapshots/coq/duopod/riscv_extras.v @@ -0,0 +1,155 @@ +Require Import Sail2_instr_kinds. +Require Import Sail2_values. +Require Import Sail2_operators_mwords. +Require Import Sail2_prompt_monad. +Require Import Sail2_prompt. +Require Import String. +Require Import List. +Import List.ListNotations. + +Axiom real : Type. + +Definition MEM_fence_rw_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_rw tt). +Definition MEM_fence_r_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_rw tt). +Definition MEM_fence_r_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_r tt). +Definition MEM_fence_rw_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_w tt). +Definition MEM_fence_w_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_w tt). +Definition MEM_fence_w_rw {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_rw tt). +Definition MEM_fence_rw_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_rw_r tt). +Definition MEM_fence_r_w {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_r_w tt). +Definition MEM_fence_w_r {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_w_r tt). +Definition MEM_fence_tso {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_tso tt). +Definition MEM_fence_i {rv e} (_:unit) : monad rv unit e := barrier (Barrier_RISCV_i tt). +(* +val MEMea : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +val MEMea_conditional_strong_release : forall 'rv 'a 'e. Size 'a => bitvector 'a -> integer -> monad 'rv unit 'e +*) +Definition MEMea {rv a e} addrsize (addr : mword a) size : monad rv unit e := write_mem_ea Write_plain addrsize addr size. +Definition MEMea_release {rv a e} addrsize (addr : mword a) size : monad rv unit e := write_mem_ea Write_RISCV_release addrsize addr size. +Definition MEMea_strong_release {rv a e} addrsize (addr : mword a) size : monad rv unit e := write_mem_ea Write_RISCV_strong_release addrsize addr size. +Definition MEMea_conditional {rv a e} addrsize (addr : mword a) size : monad rv unit e := write_mem_ea Write_RISCV_conditional addrsize addr size. +Definition MEMea_conditional_release {rv a e} addrsize (addr : mword a) size : monad rv unit e := write_mem_ea Write_RISCV_conditional_release addrsize addr size. +Definition MEMea_conditional_strong_release {rv a e} addrsize (addr : mword a) size : monad rv unit e + := write_mem_ea Write_RISCV_conditional_strong_release addrsize addr size. + +(* +val MEMr : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +*) + +Definition MEMr {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_plain addrsize addr size. +Definition MEMr_acquire {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_acquire addrsize addr size. +Definition MEMr_strong_acquire {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_strong_acquire addrsize addr size. +Definition MEMr_reserved {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved addrsize addr size. +Definition MEMr_reserved_acquire {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved_acquire addrsize addr size. +Definition MEMr_reserved_strong_acquire {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved_strong_acquire addrsize addr size. + +(* +val MEMw : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_strong_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +val MEMw_conditional_strong_release : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e +*) + +Definition MEMw {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_plain addrsize addr size v. +Definition MEMw_release {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_RISCV_release addrsize addr size v. +Definition MEMw_strong_release {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_RISCV_strong_release addrsize addr size v. +Definition MEMw_conditional {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_RISCV_conditional addrsize addr size v. +Definition MEMw_conditional_release {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_RISCV_conditional_release addrsize addr size v. +Definition MEMw_conditional_strong_release {rv e} addrsize size (hexRAM addr : mword addrsize) (v : mword (8 * size)) : monad rv bool e := write_mem Write_RISCV_conditional_strong_release addrsize addr size v. + +Definition shift_bits_left {a b} (v : mword a) (n : mword b) : mword a := + shiftl v (int_of_mword false n). + +Definition shift_bits_right {a b} (v : mword a) (n : mword b) : mword a := + shiftr v (int_of_mword false n). + +Definition shift_bits_right_arith {a b} (v : mword a) (n : mword b) : mword a := + arith_shiftr v (int_of_mword false n). + +(* Use constants for undefined values for now *) +Definition internal_pick {rv a e} (vs : list a) : monad rv a e := +match vs with +| (h::_) => returnm h +| _ => Fail "empty list in internal_pick" +end. +Definition undefined_string {rv e} (_:unit) : monad rv string e := returnm ""%string. +Definition undefined_unit {rv e} (_:unit) : monad rv unit e := returnm tt. +Definition undefined_int {rv e} (_:unit) : monad rv Z e := returnm (0:ii). +(*val undefined_vector : forall 'rv 'a 'e. integer -> 'a -> monad 'rv (list 'a) 'e*) +Definition undefined_vector {rv a e} len (u : a) `{ArithFact (len >= 0)} : monad rv (vec a len) e := returnm (vec_init u len). +(*val undefined_bitvector : forall 'rv 'a 'e. Bitvector 'a => integer -> monad 'rv 'a 'e*) +Definition undefined_bitvector {rv e} len `{ArithFact (len >= 0)} : monad rv (mword len) e := returnm (mword_of_int 0). +(*val undefined_bits : forall 'rv 'a 'e. Bitvector 'a => integer -> monad 'rv 'a 'e*) +Definition undefined_bits {rv e} := @undefined_bitvector rv e. +Definition undefined_bit {rv e} (_:unit) : monad rv bitU e := returnm BU. +(*Definition undefined_real {rv e} (_:unit) : monad rv real e := returnm (realFromFrac 0 1).*) +Definition undefined_range {rv e} i j `{ArithFact (i <= j)} : monad rv {z : Z & ArithFact (i <= z /\ z <= j)} e := returnm (build_ex i). +Definition undefined_atom {rv e} i : monad rv Z e := returnm i. +Definition undefined_nat {rv e} (_:unit) : monad rv Z e := returnm (0:ii). + +Definition skip {rv e} (_:unit) : monad rv unit e := returnm tt. + +(*val elf_entry : unit -> integer*) +Definition elf_entry (_:unit) : Z := 0. +(*declare ocaml target_rep function elf_entry := `Elf_loader.elf_entry`*) + +Definition print_bits {n} msg (bs : mword n) := prerr_endline (msg ++ (string_of_bits bs)). + +(*val get_time_ns : unit -> integer*) +Definition get_time_ns (_:unit) : Z := 0. +(*declare ocaml target_rep function get_time_ns := `(fun () -> Big_int.of_int (int_of_float (1e9 *. Unix.gettimeofday ())))`*) + +Definition eq_bit (x : bitU) (y : bitU) : bool := + match x, y with + | B0, B0 => true + | B1, B1 => true + | BU, BU => true + | _,_ => false + end. + +Require Import Zeuclid. +Definition euclid_modulo (m n : Z) `{ArithFact (n > 0)} : {z : Z & ArithFact (0 <= z <= n-1)}. +apply existT with (x := ZEuclid.modulo m n). +constructor. +destruct H. +assert (Z.abs n = n). { rewrite Z.abs_eq; auto with zarith. } +rewrite <- H at 3. +lapply (ZEuclid.mod_always_pos m n); omega. +Qed. + +(* Override the more general version *) + +Definition mults_vec {n} (l : mword n) (r : mword n) : mword (2 * n) := mults_vec l r. +Definition mult_vec {n} (l : mword n) (r : mword n) : mword (2 * n) := mult_vec l r. + + +Definition print_endline (_:string) : unit := tt. +Definition prerr_endline (_:string) : unit := tt. +Definition prerr_string (_:string) : unit := tt. +Definition putchar {T} (_:T) : unit := tt. +Require DecimalString. +Definition string_of_int z := DecimalString.NilZero.string_of_int (Z.to_int z). + +Axiom sys_enable_writable_misa : unit -> bool. +Axiom sys_enable_rvc : unit -> bool. + +(* The constraint solver can do this itself, but a Coq bug puts + anonymous_subproof into the term instead of an actual subproof. *) +Lemma n_leading_spaces_fact {w__0} : + w__0 >= 0 -> exists ex17629_ : Z, 1 + w__0 = 1 + ex17629_ /\ 0 <= ex17629_. +intro. +exists w__0. +omega. +Qed. +Hint Resolve n_leading_spaces_fact : sail. diff --git a/prover_snapshots/coq/lib/sail/Hoare.v b/prover_snapshots/coq/lib/sail/Hoare.v new file mode 100644 index 0000000..d23ff32 --- /dev/null +++ b/prover_snapshots/coq/lib/sail/Hoare.v @@ -0,0 +1,810 @@ +Require Import String ZArith. +Require Import Sail2_state_monad Sail2_prompt Sail2_state Sail2_state_monad_lemmas. +Require Import Sail2_state_lemmas. + +(*adhoc_overloading + Monad_Syntax.bind State_monad.bindS*) + +(*section \<open>Hoare logic for the state, exception and nondeterminism monad\<close> + +subsection \<open>Hoare triples\<close> +*) +Definition predS regs := sequential_state regs -> Prop. + +Definition PrePost {Regs A E} (P : predS Regs) (f : monadS Regs A E) (Q : result A E -> predS Regs) : Prop := + (*"\<lbrace>_\<rbrace> _ \<lbrace>_\<rbrace>"*) + forall s, P s -> (forall r s', List.In (r, s') (f s) -> Q r s'). + +Notation "{{ P }} m {{ Q }}" := (PrePost P m Q). + +(* +lemma PrePostI: + assumes "\<And>s r s'. P s \<Longrightarrow> (r, s') \<in> f s \<Longrightarrow> Q r s'" + shows "PrePost P f Q" + using assms unfolding PrePost_def by auto + +lemma PrePost_elim: + assumes "PrePost P f Q" and "P s" and "(r, s') \<in> f s" + obtains "Q r s'" + using assms by (fastforce simp: PrePost_def) +*) +Lemma PrePost_consequence Regs X E (A P : predS Regs) (f : monadS Regs X E) (B Q : result X E -> predS Regs) : + PrePost A f B -> + (forall s, P s -> A s) -> + (forall v s, B v s -> Q v s) -> + PrePost P f Q. +intros Triple PA BQ. +intros s Pre r s' IN. +specialize (Triple s). +auto. +Qed. + +Lemma PrePost_strengthen_pre Regs X E (A B : predS Regs) (f : monadS Regs X E) (C : result X E -> predS Regs) : + PrePost A f C -> + (forall s, B s -> A s) -> + PrePost B f C. +eauto using PrePost_consequence. +Qed. + +Lemma PrePost_weaken_post Regs X E (A : predS Regs) (f : monadS Regs X E) (B C : result X E -> predS Regs) : + PrePost A f B -> + (forall v s, B v s -> C v s) -> + PrePost A f C. +eauto using PrePost_consequence. +Qed. + +Lemma PrePost_True_post (*[PrePost_atomI, intro, simp]:*) Regs A E (P : predS Regs) (m : monadS Regs A E) : + PrePost P m (fun _ _ => True). +unfold PrePost. auto. +Qed. + +Lemma PrePost_any Regs A E (m : monadS Regs A E) (Q : result A E -> predS Regs) : + PrePost (fun s => forall r s', List.In (r, s') (m s) -> Q r s') m Q. +unfold PrePost. auto. +Qed. + +Lemma PrePost_returnS (*[intro, PrePost_atomI]:*) Regs A E (P : result A E -> predS Regs) (x : A) : + PrePost (P (Value x)) (returnS x) P. +unfold PrePost, returnS. +intros s p r s' IN. +simpl in IN. +destruct IN as [[=] | []]. +subst; auto. +Qed. + +Lemma PrePost_bindS (*[intro, PrePost_compositeI]:*) Regs A B E (m : monadS Regs A E) (f : A -> monadS Regs B E) (P : predS Regs) (Q : result B E -> predS Regs) (R : A -> predS Regs) : + (forall s a s', List.In (Value a, s') (m s) -> PrePost (R a) (f a) Q) -> + (PrePost P m (fun r => match r with Value a => R a | Ex e => Q (Ex e) end)) -> + PrePost P (bindS m f) Q. +intros F M s Pre r s' IN. +destruct (bindS_cases IN) as [(a & a' & s'' & [= ->] & IN' & IN'') | [(e & [= ->] & IN') | (e & a & s'' & [= ->] & IN' & IN'')]]. +* eapply F. apply IN'. specialize (M s Pre (Value a') s'' IN'). apply M. assumption. +* specialize (M _ Pre _ _ IN'). apply M. +* specialize (M _ Pre _ _ IN'). simpl in M. eapply F; eauto. +Qed. + +Lemma PrePost_bindS_ignore Regs A B E (m : monadS Regs A E) (f : monadS Regs B E) (P : predS Regs) (Q : result B E -> predS Regs) (R : predS Regs) : + PrePost R f Q -> + PrePost P m (fun r => match r with Value a => R | Ex e => Q (Ex e) end) -> + PrePost P (bindS m (fun _ => f)) Q. +intros F M. +eapply PrePost_bindS; eauto. +* intros. apply F. +* apply M. +Qed. + +Lemma PrePost_bindS_unit Regs B E (m : monadS Regs unit E) (f : unit -> monadS Regs B E) P Q R : + PrePost R (f tt) Q -> + PrePost P m (fun r => match r with Value a => R | Ex e => Q (Ex e) end) -> + PrePost P (bindS m f) Q. +intros F M. +eapply PrePost_bindS with (R := fun _ => R). +* intros. destruct a. apply F. +* apply M. +Qed. + +Lemma PrePost_readS (*[intro, PrePost_atomI]:*) Regs A E (P : result A E -> predS Regs) f : + PrePost (fun s => P (Value (f s)) s) (readS f) P. +unfold PrePost, readS, returnS. +intros s Pre r s' [H | []]. +inversion H; subst. +assumption. +Qed. + +Lemma PrePost_updateS (*[intro, PrePost_atomI]:*) Regs E (P : result unit E -> predS Regs) f : + PrePost (fun s => P (Value tt) (f s)) (updateS f) P. +unfold PrePost, readS, returnS. +intros s Pre r s' [H | []]. +inversion H; subst. +assumption. +Qed. + +Lemma PrePost_if Regs A E b (f g : monadS Regs A E) P Q : + (b = true -> PrePost P f Q) -> + (b = false -> PrePost P g Q) -> + PrePost P (if b then f else g) Q. +intros T F. +destruct b; auto. +Qed. + +Lemma PrePost_if_branch (*[PrePost_compositeI]:*) Regs A E b (f g : monadS Regs A E) Pf Pg Q : + (b = true -> PrePost Pf f Q) -> + (b = false -> PrePost Pg g Q) -> + PrePost (if b then Pf else Pg) (if b then f else g) Q. +destruct b; auto. +Qed. + +Lemma PrePost_if_then Regs A E b (f g : monadS Regs A E) P Q : + b = true -> + PrePost P f Q -> + PrePost P (if b then f else g) Q. +intros; subst; auto. +Qed. + +Lemma PrePost_if_else Regs A E b (f g : monadS Regs A E) P Q : + b = false -> + PrePost P g Q -> + PrePost P (if b then f else g) Q. +intros; subst; auto. +Qed. + +Lemma PrePost_prod_cases (*[PrePost_compositeI]:*) Regs A B E (f : A -> B -> monadS Regs A E) P Q x : + PrePost P (f (fst x) (snd x)) Q -> + PrePost P (match x with (a, b) => f a b end) Q. +destruct x; auto. +Qed. + +Lemma PrePost_option_cases (*[PrePost_compositeI]:*) Regs A B E x (s : A -> monadS Regs B E) n PS PN Q : + (forall a, PrePost (PS a) (s a) Q) -> + PrePost PN n Q -> + PrePost (match x with Some a => PS a | None => PN end) (match x with Some a => s a | None => n end) Q. +destruct x; auto. +Qed. + +Lemma PrePost_let (*[intro, PrePost_compositeI]:*) Regs A B E y (m : A -> monadS Regs B E) P Q : + PrePost P (m y) Q -> + PrePost P (let x := y in m x) Q. +auto. +Qed. + +Lemma PrePost_and_boolS (*[PrePost_compositeI]:*) Regs E (l r : monadS Regs bool E) P Q R : + PrePost R r Q -> + PrePost P l (fun r => match r with Value true => R | _ => Q r end) -> + PrePost P (and_boolS l r) Q. +intros Hr Hl. +unfold and_boolS. +eapply PrePost_bindS. +2: { instantiate (1 := fun a => if a then R else Q (Value false)). + eapply PrePost_weaken_post. + apply Hl. + intros [[|] | ] s H; auto. } +* intros. destruct a; eauto. + apply PrePost_returnS. +Qed. + +Lemma PrePost_or_boolS (*[PrePost_compositeI]:*) Regs E (l r : monadS Regs bool E) P Q R : + PrePost R r Q -> + PrePost P l (fun r => match r with Value false => R | _ => Q r end) -> + PrePost P (or_boolS l r) Q. +intros Hr Hl. +unfold or_boolS. +eapply PrePost_bindS. +* intros. + instantiate (1 := fun a => if a then Q (Value true) else R). + destruct a; eauto. + apply PrePost_returnS. +* eapply PrePost_weaken_post. + apply Hl. + intros [[|] | ] s H; auto. +Qed. + +Lemma PrePost_failS (*[intro, PrePost_atomI]:*) Regs A E msg (Q : result A E -> predS Regs) : + PrePost (Q (Ex (Failure msg))) (failS msg) Q. +intros s Pre r s' [[= <- <-] | []]. +assumption. +Qed. + +Lemma PrePost_assert_expS (*[intro, PrePost_atomI]:*) Regs E (c : bool) m (P : result unit E -> predS Regs) : + PrePost (if c then P (Value tt) else P (Ex (Failure m))) (assert_expS c m) P. +destruct c; simpl. +* apply PrePost_returnS. +* apply PrePost_failS. +Qed. + +Lemma PrePost_chooseS (*[intro, PrePost_atomI]:*) Regs A E xs (Q : result A E -> predS Regs) : + PrePost (fun s => forall x, List.In x xs -> Q (Value x) s) (chooseS xs) Q. +unfold PrePost, chooseS. +intros s IN r s' IN'. +apply List.in_map_iff in IN'. +destruct IN' as (x & [= <- <-] & IN'). +auto. +Qed. + +Lemma case_result_combine (*[simp]:*) A E X r (Q : result A E -> X) : + (match r with Value a => Q (Value a) | Ex e => Q (Ex e) end) = Q r. +destruct r; auto. +Qed. + +Lemma PrePost_foreachS_Nil (*[intro, simp, PrePost_atomI]:*) Regs A Vars E vars body (Q : result Vars E -> predS Regs) : + PrePost (Q (Value vars)) (foreachS (A := A) nil vars body) Q. +simpl. apply PrePost_returnS. +Qed. + +Lemma PrePost_foreachS_Cons Regs A Vars E (x : A) xs vars body (Q : result Vars E -> predS Regs) : + (forall s vars' s', List.In (Value vars', s') (body x vars s) -> PrePost (Q (Value vars')) (foreachS xs vars' body) Q) -> + PrePost (Q (Value vars)) (body x vars) Q -> + PrePost (Q (Value vars)) (foreachS (x :: xs) vars body) Q. +intros XS X. +simpl. +eapply PrePost_bindS. +* apply XS. +* apply PrePost_weaken_post with (B := Q). + assumption. + intros; rewrite case_result_combine. + assumption. +Qed. + +Lemma PrePost_foreachS_invariant Regs A Vars E (xs : list A) vars body (Q : result Vars E -> predS Regs) : + (forall x vars, List.In x xs -> PrePost (Q (Value vars)) (body x vars) Q) -> + PrePost (Q (Value vars)) (foreachS xs vars body) Q. +revert vars. +induction xs. +* intros. apply PrePost_foreachS_Nil. +* intros. apply PrePost_foreachS_Cons. + + auto with datatypes. + + apply H. auto with datatypes. +Qed. + +(*subsection \<open>Hoare quadruples\<close> + +text \<open>It is often convenient to treat the exception case separately. For this purpose, we use +a Hoare logic similar to the one used in [1]. It features not only Hoare triples, but also quadruples +with two postconditions: one for the case where the computation succeeds, and one for the case where +there is an exception. + +[1] D. Cock, G. Klein, and T. Sewell, ‘Secure Microkernels, State Monads and Scalable Refinement’, +in Theorem Proving in Higher Order Logics, 2008, pp. 167–182.\<close> +*) +Definition PrePostE {Regs A Ety} (P : predS Regs) (f : monadS Regs A Ety) (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : Prop := +(* ("\<lbrace>_\<rbrace> _ \<lbrace>_ \<bar> _\<rbrace>")*) + PrePost P f (fun v => match v with Value a => Q a | Ex e => E e end). + +Notation "{{ P }} m {{ Q | X }}" := (PrePostE P m Q X). + +(*lemmas PrePost_defs = PrePost_def PrePostE_def*) + +Lemma PrePostE_I (*[case_names Val Err]:*) Regs A Ety (P : predS Regs) f (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : + (forall s a s', P s -> List.In (Value a, s') (f s) -> Q a s') -> + (forall s e s', P s -> List.In (Ex e, s') (f s) -> E e s') -> + PrePostE P f Q E. +intros. unfold PrePostE. +unfold PrePost. +intros s Pre [a | e] s' IN; eauto. +Qed. + +Lemma PrePostE_PrePost Regs A Ety P m (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : + PrePost P m (fun v => match v with Value a => Q a | Ex e => E e end) -> + PrePostE P m Q E. +auto. +Qed. + +Lemma PrePostE_elim Regs A Ety P f r s s' (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE P f Q E -> + P s -> + List.In (r, s') (f s) -> + (exists v, r = Value v /\ Q v s') \/ + (exists e, r = Ex e /\ E e s'). +intros PP Pre IN. +specialize (PP _ Pre _ _ IN). +destruct r; eauto. +Qed. + +Lemma PrePostE_consequence Regs Aty Ety (P : predS Regs) f A B C (Q : Aty -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE A f B C -> + (forall s, P s -> A s) -> + (forall v s, B v s -> Q v s) -> + (forall e s, C e s -> E e s) -> + PrePostE P f Q E. +intros PP PA BQ CE. +intros s Pre [a | e] s' IN. +* apply BQ. specialize (PP _ (PA _ Pre) _ _ IN). + apply PP. +* apply CE. specialize (PP _ (PA _ Pre) _ _ IN). + apply PP. +Qed. + +Lemma PrePostE_strengthen_pre Regs Aty Ety (P : predS Regs) f R (Q : Aty -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE R f Q E -> + (forall s, P s -> R s) -> + PrePostE P f Q E. +intros PP PR. +eapply PrePostE_consequence; eauto. +Qed. + +Lemma PrePostE_weaken_post Regs Aty Ety (A : predS Regs) f (B C : Aty -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE A f B E -> + (forall v s, B v s -> C v s) -> + PrePostE A f C E. +intros PP BC. +eauto using PrePostE_consequence. +Qed. + +Lemma PrePostE_weaken_Epost Regs Aty Ety (A : predS Regs) f (B : Aty -> predS Regs) (E F : ex Ety -> predS Regs) : + PrePostE A f B E -> + (forall v s, E v s -> F v s) -> + PrePostE A f B F. +intros PP EF. +eauto using PrePostE_consequence. +Qed. +(*named_theorems PrePostE_compositeI +named_theorems PrePostE_atomI*) + +Lemma PrePostE_conj_conds Regs Aty Ety (P1 P2 : predS Regs) m (Q1 Q2 : Aty -> predS Regs) (E1 E2 : ex Ety -> predS Regs) : + PrePostE P1 m Q1 E1 -> + PrePostE P2 m Q2 E2 -> + PrePostE (fun s => P1 s /\ P2 s) m (fun r s => Q1 r s /\ Q2 r s) (fun e s => E1 e s /\ E2 e s). +intros H1 H2. +apply PrePostE_I. +* intros s a s' [p1 p2] IN. + specialize (H1 _ p1 _ _ IN). + specialize (H2 _ p2 _ _ IN). + simpl in *. + auto. +* intros s a s' [p1 p2] IN. + specialize (H1 _ p1 _ _ IN). + specialize (H2 _ p2 _ _ IN). + simpl in *. + auto. +Qed. + +(*lemmas PrePostE_conj_conds_consequence = PrePostE_conj_conds[THEN PrePostE_consequence]*) + +Lemma PrePostE_post_mp Regs Aty Ety (P : predS Regs) m (Q Q' : Aty -> predS Regs) (E: ex Ety -> predS Regs) : + PrePostE P m Q' E -> + PrePostE P m (fun r s => Q' r s -> Q r s) E -> + PrePostE P m Q E. +intros H1 H2. +eapply PrePostE_conj_conds in H1. 2: apply H2. +eapply PrePostE_consequence. apply H1. all: simpl; intuition. +Qed. + +Lemma PrePostE_cong Regs Aty Ety (P1 P2 : predS Regs) m1 m2 (Q1 Q2 : Aty -> predS Regs) (E1 E2 : ex Ety -> predS Regs) : + (forall s, P1 s <-> P2 s) -> + (forall s, P1 s -> m1 s = m2 s) -> + (forall r s, Q1 r s <-> Q2 r s) -> + (forall e s, E1 e s <-> E2 e s) -> + PrePostE P1 m1 Q1 E1 <-> PrePostE P2 m2 Q2 E2. +intros P12 m12 Q12 E12. +unfold PrePostE, PrePost. +split. +* intros. apply P12 in H0. rewrite <- m12 in H1; auto. specialize (H _ H0 _ _ H1). + destruct r; [ apply Q12 | apply E12]; auto. +* intros. rewrite m12 in H1; auto. apply P12 in H0. specialize (H _ H0 _ _ H1). + destruct r; [ apply Q12 | apply E12]; auto. +Qed. + +Lemma PrePostE_True_post (*[PrePostE_atomI, intro, simp]:*) Regs A E P (m : monadS Regs A E) : + PrePostE P m (fun _ _ => True) (fun _ _ => True). +intros s Pre [a | e]; auto. +Qed. + +Lemma PrePostE_any Regs A Ety m (Q : result A Ety -> predS Regs) E : + PrePostE (Ety := Ety) (fun s => forall r s', List.In (r, s') (m s) -> match r with Value a => Q a s' | Ex e => E e s' end) m Q E. +apply PrePostE_I. +intros. apply (H (Value a)); auto. +intros. apply (H (Ex e)); auto. +Qed. + +Lemma PrePostE_returnS (*[PrePostE_atomI, intro, simp]:*) Regs A E P (x : A) (Q : ex E -> predS Regs) : + PrePostE (P x) (returnS x) P Q. +unfold PrePostE, PrePost. +intros s Pre r s' [[= <- <-] | []]. +assumption. +Qed. + +Lemma PrePostE_bindS (*[intro, PrePostE_compositeI]:*) Regs A B Ety P m (f : A -> monadS Regs B Ety) Q R E : + (forall s a s', List.In (Value a, s') (m s) -> PrePostE (R a) (f a) Q E) -> + PrePostE P m R E -> + PrePostE P (bindS m f) Q E. +intros. +unfold PrePostE in *. +eauto using PrePost_bindS. +Qed. + +Lemma PrePostE_bindS_ignore Regs A B Ety (P : predS Regs) (m : monadS Regs A Ety) (f : monadS Regs B Ety) R Q E : + PrePostE R f Q E -> + PrePostE P m (fun _ => R) E -> + PrePostE P (bindS m (fun _ => f)) Q E. +apply PrePost_bindS_ignore. +Qed. + +Lemma PrePostE_bindS_unit Regs A Ety (P : predS Regs) (m : monadS Regs unit Ety) (f : unit -> monadS Regs A Ety) Q R E : + PrePostE R (f tt) Q E -> + PrePostE P m (fun _ => R) E -> + PrePostE P (bindS m f) Q E. +apply PrePost_bindS_unit. +Qed. + +Lemma PrePostE_readS (*[PrePostE_atomI, intro]:*) Regs A Ety (P : predS Regs) f (Q : result A Ety -> predS Regs) E : + PrePostE (Ety := Ety) (fun s => Q (f s) s) (readS f) Q E. +unfold PrePostE, PrePost, readS. +intros s Pre [a | e] s' [[= <- <-] | []]. +assumption. +Qed. + +Lemma PrePostE_updateS (*[PrePostE_atomI, intro]:*) Regs Ety f (Q : unit -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE (fun s => Q tt (f s)) (updateS f) Q E. +intros s Pre [a | e] s' [[= <- <-] | []]. +assumption. +Qed. + +Lemma PrePostE_if_branch (*[PrePostE_compositeI]:*) Regs A Ety (b : bool) (f g : monadS Regs A Ety) Pf Pg Q E : + (b = true -> PrePostE Pf f Q E) -> + (b = false -> PrePostE Pg g Q E) -> + PrePostE (if b then Pf else Pg) (if b then f else g) Q E. +destruct b; auto. +Qed. + +Lemma PrePostE_if Regs A Ety (b : bool) (f g : monadS Regs A Ety) P Q E : + (b = true -> PrePostE P f Q E) -> + (b = false -> PrePostE P g Q E) -> + PrePostE P (if b then f else g) Q E. +destruct b; auto. +Qed. + +Lemma PrePostE_if_then Regs A Ety (b : bool) (f g : monadS Regs A Ety) P Q E : + b = true -> + PrePostE P f Q E -> + PrePostE P (if b then f else g) Q E. +intros; subst; auto. +Qed. + +Lemma PrePostE_if_else Regs A Ety (b : bool) (f g : monadS Regs A Ety) P Q E : + b = false -> + PrePostE P g Q E -> + PrePostE P (if b then f else g) Q E. +intros; subst; auto. +Qed. + +Lemma PrePostE_prod_cases (*[PrePostE_compositeI]:*) Regs A B C Ety x (f : A -> B -> monadS Regs C Ety) P Q E : + PrePostE P (f (fst x) (snd x)) Q E -> + PrePostE P (match x with (a, b) => f a b end) Q E. +destruct x; auto. +Qed. + +Lemma PrePostE_option_cases (*[PrePostE_compositeI]:*) Regs A B Ety x (s : option A -> monadS Regs B Ety) n PS PN Q E : + (forall a, PrePostE (PS a) (s a) Q E) -> + PrePostE PN n Q E -> + PrePostE (match x with Some a => PS a | None => PN end) (match x with Some a => s a | None => n end) Q E. +apply PrePost_option_cases. +Qed. + +Lemma PrePostE_sum_cases (*[PrePostE_compositeI]:*) Regs A B C Ety x (l : A -> monadS Regs C Ety) (r : B -> monadS Regs C Ety) Pl Pr Q E : + (forall a, PrePostE (Pl a) (l a) Q E) -> + (forall b, PrePostE (Pr b) (r b) Q E) -> + PrePostE (match x with inl a => Pl a | inr b => Pr b end) (match x with inl a => l a | inr b => r b end) Q E. +intros; destruct x; auto. +Qed. + +Lemma PrePostE_let (*[PrePostE_compositeI]:*) Regs A B Ety y (m : A -> monadS Regs B Ety) P Q E : + PrePostE P (m y) Q E -> + PrePostE P (let x := y in m x) Q E. +auto. +Qed. + +Lemma PrePostE_and_boolS (*[PrePostE_compositeI]:*) Regs Ety (l r : monadS Regs bool Ety) P Q R E : + PrePostE R r Q E -> + PrePostE P l (fun r => if r then R else Q false) E -> + PrePostE P (and_boolS l r) Q E. +intros Hr Hl. +unfold and_boolS. +eapply PrePostE_bindS. +* intros. + instantiate (1 := fun a => if a then R else Q false). + destruct a; eauto. + apply PrePostE_returnS. +* assumption. +Qed. + +Lemma PrePostE_or_boolS (*[PrePostE_compositeI]:*) Regs Ety (l r : monadS Regs bool Ety) P Q R E : + PrePostE R r Q E -> + PrePostE P l (fun r => if r then Q true else R) E -> + PrePostE P (or_boolS l r) Q E. +intros Hr Hl. +unfold or_boolS. +eapply PrePostE_bindS. +* intros. + instantiate (1 := fun a => if a then Q true else R). + destruct a; eauto. + apply PrePostE_returnS. +* assumption. +Qed. + +Lemma PrePostE_failS (*[PrePostE_atomI, intro]:*) Regs A Ety msg (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE (E (Failure msg)) (failS msg) Q E. +unfold PrePostE, PrePost, failS. +intros s Pre r s' [[= <- <-] | []]. +assumption. +Qed. + +Lemma PrePostE_assert_expS (*[PrePostE_atomI, intro]:*) Regs Ety (c : bool) m P (Q : ex Ety -> predS Regs) : + PrePostE (if c then P tt else Q (Failure m)) (assert_expS c m) P Q. +unfold assert_expS. +destruct c; auto using PrePostE_returnS, PrePostE_failS. +Qed. + +Lemma PrePostE_maybe_failS (*[PrePostE_atomI]:*) Regs A Ety msg v (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE (fun s => match v with Some v => Q v s | None => E (Failure msg) s end) (maybe_failS msg v) Q E. +unfold maybe_failS. +destruct v; auto using PrePostE_returnS, PrePostE_failS. +Qed. + +Lemma PrePostE_exitS (*[PrePostE_atomI, intro]:*) Regs A Ety msg (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE (E (Failure "exit")) (exitS msg) Q E. +unfold exitS. +apply PrePostE_failS. +Qed. + +Lemma PrePostE_chooseS (*[intro, PrePostE_atomI]:*) Regs A Ety (xs : list A) (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE (fun s => forall x, List.In x xs -> Q x s) (chooseS xs) Q E. +unfold chooseS. +intros s IN r s' IN'. +apply List.in_map_iff in IN'. +destruct IN' as (x & [= <- <-] & IN'). +auto. +Qed. + +Lemma PrePostE_throwS (*[PrePostE_atomI]:*) Regs A Ety e (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE (E (Throw e)) (throwS e) Q E. +unfold throwS. +intros s Pre r s' [[= <- <-] | []]. +assumption. +Qed. + +Lemma PrePostE_try_catchS (*[PrePostE_compositeI]:*) Regs A E1 E2 m h P (Ph : E1 -> predS Regs) (Q : A -> predS Regs) (E : ex E2 -> predS Regs) : + (forall s e s', List.In (Ex (Throw e), s') (m s) -> PrePostE (Ph e) (h e) Q E) -> + PrePostE P m Q (fun ex => match ex with Throw e => Ph e | Failure msg => E (Failure msg) end) -> + PrePostE P (try_catchS m h) Q E. +intros. +intros s Pre r s' IN. +destruct (try_catchS_cases IN) as [(a' & [= ->] & IN') | [(msg & [= ->] & IN') | (e & s'' & IN1 & IN2)]]. +* specialize (H0 _ Pre _ _ IN'). apply H0. +* specialize (H0 _ Pre _ _ IN'). apply H0. +* specialize (H _ _ _ IN1). specialize (H0 _ Pre _ _ IN1). simpl in *. + specialize (H _ H0 _ _ IN2). apply H. +Qed. + +Lemma PrePostE_catch_early_returnS (*[PrePostE_compositeI]:*) Regs A Ety m P (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE P m Q (fun ex => match ex with Throw (inl a) => Q a | Throw (inr e) => E (Throw e) | Failure msg => E (Failure msg) end) -> + PrePostE P (catch_early_returnS m) Q E. +unfold catch_early_returnS. +intro H. +apply PrePostE_try_catchS with (Ph := fun e => match e with inl a => Q a | inr e => E (Throw e) end). +* intros. destruct e. + + apply PrePostE_returnS. + + apply PrePostE_throwS. +* apply H. +Qed. + +Lemma PrePostE_early_returnS (*[PrePostE_atomI]:*) Regs A E1 E2 r (Q : A -> predS Regs) (E : ex (E1 + E2) -> predS Regs) : + PrePostE (E (Throw (inl r))) (early_returnS r) Q E. +unfold early_returnS. +apply PrePostE_throwS. +Qed. + +Lemma PrePostE_liftRS (*[PrePostE_compositeI]:*) Regs A E1 E2 m P (Q : A -> predS Regs) (E : ex (E1 + E2) -> predS Regs) : + PrePostE P m Q (fun ex => match ex with Throw e => E (Throw (inr e)) | Failure msg => E (Failure msg) end) -> + PrePostE P (liftRS m) Q E. +unfold liftRS. +apply PrePostE_try_catchS. +auto using PrePostE_throwS. +Qed. + +Lemma PrePostE_foreachS_Cons Regs A Vars Ety (x : A) xs vars body (Q : Vars -> predS Regs) (E : ex Ety -> predS Regs) : + (forall s vars' s', List.In (Value vars', s') (body x vars s) -> PrePostE (Q vars') (foreachS xs vars' body) Q E) -> + PrePostE (Q vars) (body x vars) Q E -> + PrePostE (Q vars) (foreachS (x :: xs) vars body) Q E. +intros. +simpl. +apply PrePostE_bindS with (R := Q); auto. +Qed. + +Lemma PrePostE_foreachS_invariant Regs A Vars Ety (xs : list A) vars body (Q : Vars -> predS Regs) (E : ex Ety -> predS Regs) : + (forall x vars, List.In x xs -> PrePostE (Q vars) (body x vars) Q E) -> + PrePostE (Q vars) (foreachS xs vars body) Q E. +unfold PrePostE. +intros H. +apply PrePost_foreachS_invariant with (Q := fun v => match v with Value a => Q a | Ex e => E e end). +auto. +Qed. + + +Lemma PrePostE_use_pre Regs A Ety m (P : predS Regs) (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : + (forall s, P s -> PrePostE P m Q E) -> + PrePostE P m Q E. +unfold PrePostE, PrePost. +intros H s p r s' IN. +eapply H; eauto. +Qed. + +Local Open Scope Z. +Local Opaque _limit_reduces. +Ltac gen_reduces := + match goal with |- context[@_limit_reduces ?a ?b ?c] => generalize (@_limit_reduces a b c) end. + + +Lemma PrePostE_untilST Regs Vars Ety vars measure cond (body : Vars -> monadS Regs Vars Ety) Inv Inv' (Q : Vars -> predS Regs) E : + (forall vars, PrePostE (Inv' Q vars) (cond vars) (fun c s' => Inv Q vars s' /\ (c = true -> Q vars s')) E) -> + (forall vars, PrePostE (Inv Q vars) (body vars) (fun vars' s' => Inv' Q vars' s' /\ measure vars' < measure vars) E) -> + (forall vars s, Inv Q vars s -> measure vars >= 0) -> + PrePostE (Inv Q vars) (untilST vars measure cond body) Q E. + +intros Hcond Hbody Hmeasure. +unfold untilST. +apply PrePostE_use_pre. intros s0 Pre0. +assert (measure vars >= 0) as Hlimit_0 by eauto. clear s0 Pre0. +remember (measure vars) as limit eqn: Heqlimit in Hlimit_0 |- *. +assert (measure vars <= limit) as Hlimit by omega. clear Heqlimit. +generalize (Sail2_prompt.Zwf_guarded limit). +revert vars Hlimit. +apply Wf_Z.natlike_ind with (x := limit). +* intros vars Hmeasure_limit [acc]. simpl. + eapply PrePostE_bindS; [ | apply Hbody ]. + intros s vars' s' IN. + eapply PrePostE_bindS with (R := (fun c s' => (Inv Q vars' s' /\ (c = true -> Q vars' s')) /\ measure vars' < measure vars)). + 2: { + apply PrePostE_weaken_Epost with (E := (fun e s' => E e s' /\ measure vars' < measure vars)). 2: tauto. + eapply PrePostE_conj_conds. + apply Hcond. + apply PrePostE_I; tauto. + } + intros. + destruct a. + - eapply PrePostE_strengthen_pre; try apply PrePostE_returnS. + intros ? [[? ?] ?]; auto. + - apply PrePostE_I; + intros ? ? ? [[Pre ?] ?] ?; exfalso; + specialize (Hmeasure _ _ Pre); omega. +* intros limit' Hlimit' IH vars Hmeasure_limit [acc]. + simpl. + destruct (Z_ge_dec _ _); try omega. + eapply PrePostE_bindS; [ | apply Hbody]. + intros s vars' s' IN. + eapply PrePostE_bindS with (R := (fun c s' => (Inv Q vars' s' /\ (c = true -> Q vars' s')) /\ measure vars' < measure vars)). + 2: { + apply PrePostE_weaken_Epost with (E := (fun e s' => E e s' /\ measure vars' < measure vars)). 2: tauto. + eapply PrePostE_conj_conds. + apply Hcond. + apply PrePostE_I; tauto. + } + intros. + destruct a. + - eapply PrePostE_strengthen_pre; try apply PrePostE_returnS. + intros ? [[? ?] ?]; auto. + - gen_reduces. + replace (Z.succ limit' - 1) with limit'; [ | omega]. + intro acc'. + apply PrePostE_use_pre. intros sx [[Pre _] Hreduces]. + apply Hmeasure in Pre. + eapply PrePostE_strengthen_pre; [apply IH | ]. + + omega. + + tauto. +* omega. +Qed. + + +Lemma PrePostE_untilST_pure_cond Regs Vars Ety vars measure cond (body : Vars -> monadS Regs Vars Ety) Inv (Q : Vars -> predS Regs) E : + (forall vars, PrePostE (Inv Q vars) (body vars) (fun vars' s' => Inv Q vars' s' /\ measure vars' < measure vars /\ (cond vars' = true -> Q vars' s')) E) -> + (forall vars s, Inv Q vars s -> measure vars >= 0) -> + (PrePostE (Inv Q vars) (untilST vars measure (fun vars => returnS (cond vars)) body) Q E). +intros Hbody Hmeasure. +apply PrePostE_untilST with (Inv' := fun Q vars s => Inv Q vars s /\ (cond vars = true -> Q vars s)). +* intro. + apply PrePostE_returnS with (P := fun c s' => Inv Q vars0 s' /\ (c = true -> Q vars0 s')). +* intro. + eapply PrePost_weaken_post; [ apply Hbody | ]. + simpl. intros [a |e]; eauto. tauto. +* apply Hmeasure. +Qed. + +Local Close Scope Z. + +(* +lemma PrePostE_liftState_untilM: + assumes dom: (forall s, Inv Q vars s -> untilM_dom (vars, cond, body)) + and cond: (forall vars, PrePostE (Inv' Q vars) (liftState r (cond vars)) (fun c s' => Inv Q vars s' /\ (c \<longrightarrow> Q vars s')) E) + and body: (forall vars, PrePostE (Inv Q vars) (liftState r (body vars)) (Inv' Q) E) + shows "PrePostE (Inv Q vars) (liftState r (untilM vars cond body)) Q E" +proof - + have domS: "untilS_dom (vars, liftState r \<circ> cond, liftState r \<circ> body, s)" if "Inv Q vars s" for s + using dom that by (intro untilM_dom_untilS_dom) + then have "PrePostE (Inv Q vars) (untilS vars (liftState r \<circ> cond) (liftState r \<circ> body)) Q E" + using cond body by (auto intro: PrePostE_untilS simp: comp_def) + moreover have "liftState r (untilM vars cond body) s = untilS vars (liftState r \<circ> cond) (liftState r \<circ> body) s" + if "Inv Q vars s" for s + unfolding liftState_untilM[OF domS[OF that] dom[OF that]] .. + ultimately show ?thesis by (auto cong: PrePostE_cong) +qed + +lemma PrePostE_liftState_untilM_pure_cond: + assumes dom: (forall s, Inv Q vars s -> untilM_dom (vars, return \<circ> cond, body)" + and body: (forall vars, PrePostE (Inv Q vars) (liftState r (body vars)) (fun vars' s' => Inv Q vars' s' /\ (cond vars' \<longrightarrow> Q vars' s')) E" + shows "PrePostE (Inv Q vars) (liftState r (untilM vars (return \<circ> cond) body)) Q E" + using assms by (intro PrePostE_liftState_untilM) (auto simp: comp_def liftState_simp) +*) +Lemma PrePostE_choose_boolS_any (*[PrePostE_atomI]:*) Regs Ety unit_val (Q : bool -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE (fun s => forall b, Q b s) (choose_boolS unit_val) Q E. +unfold choose_boolS, seqS. +eapply PrePostE_strengthen_pre. +apply PrePostE_chooseS. +simpl. intros. destruct x; auto. +Qed. + +Lemma PrePostE_bool_of_bitU_nondetS_any Regs Ety b (Q : bool -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE (fun s => forall b, Q b s) (bool_of_bitU_nondetS b) Q E. +unfold bool_of_bitU_nondetS, undefined_boolS. +destruct b. +* intros s Pre r s' [[= <- <-] | []]. auto. +* intros s Pre r s' [[= <- <-] | []]. auto. +* apply PrePostE_choose_boolS_any. +Qed. +(* +Lemma PrePostE_bools_of_bits_nondetS_any: + PrePostE (fun s => forall bs, Q bs s) (bools_of_bits_nondetS bs) Q E. + unfolding bools_of_bits_nondetS_def + by (rule PrePostE_weaken_post[where B = "fun _ s => forall bs, Q bs s"], rule PrePostE_strengthen_pre, + (rule PrePostE_foreachS_invariant[OF PrePostE_strengthen_pre] PrePostE_bindS PrePostE_returnS + PrePostE_bool_of_bitU_nondetS_any)+) + auto +*) +Lemma PrePostE_choose_boolsS_any Regs Ety n (Q : list bool -> predS Regs) (E : ex Ety -> predS Regs) : + PrePostE (fun s => forall bs, Q bs s) (choose_boolsS n) Q E. +unfold choose_boolsS, genlistS. +apply PrePostE_weaken_post with (B := fun _ s => forall bs, Q bs s). +* apply PrePostE_foreachS_invariant with (Q := fun _ s => forall bs, Q bs s). + intros. apply PrePostE_bindS with (R := fun _ s => forall bs, Q bs s). + + intros. apply PrePostE_returnS with (P := fun _ s => forall bs, Q bs s). + + eapply PrePostE_strengthen_pre. + apply PrePostE_choose_boolS_any. + intuition. +* intuition. +Qed. + +Lemma nth_error_exists {A} {l : list A} {n} : + n < Datatypes.length l -> exists x, List.In x l /\ List.nth_error l n = Some x. +revert n. induction l. +* simpl. intros. apply PeanoNat.Nat.nlt_0_r in H. destruct H. +* intros. destruct n. + + exists a. auto with datatypes. + + simpl in H. apply Lt.lt_S_n in H. + destruct (IHl n H) as [x H1]. + intuition eauto with datatypes. +Qed. + +Lemma nth_error_modulo {A} {xs : list A} n : + xs <> nil -> + exists x, List.In x xs /\ List.nth_error xs (PeanoNat.Nat.modulo n (Datatypes.length xs)) = Some x. +intro notnil. +assert (Datatypes.length xs <> 0) by (rewrite List.length_zero_iff_nil; auto). +assert (PeanoNat.Nat.modulo n (Datatypes.length xs) < Datatypes.length xs) by auto using PeanoNat.Nat.mod_upper_bound. +destruct (nth_error_exists H0) as [x [H1 H2]]. +exists x. +auto. +Qed. + +Lemma PrePostE_internal_pick Regs A Ety (xs : list A) (Q : A -> predS Regs) (E : ex Ety -> predS Regs) : + xs <> nil -> + PrePostE (fun s => forall x, List.In x xs -> Q x s) (internal_pickS xs) Q E. +unfold internal_pickS. +intro notnil. +eapply PrePostE_bindS with (R := fun _ s => forall x, List.In x xs -> Q x s). +* intros. + destruct (nth_error_modulo (Sail2_values.nat_of_bools a) notnil) as (x & IN & nth). + rewrite nth. + eapply PrePostE_strengthen_pre. + apply PrePostE_returnS. + intuition. +* eapply PrePostE_strengthen_pre. + apply PrePostE_choose_boolsS_any. + intuition. +Qed. diff --git a/prover_snapshots/coq/lib/sail/Makefile b/prover_snapshots/coq/lib/sail/Makefile index 75f24f1..fa453d9 100644 --- a/prover_snapshots/coq/lib/sail/Makefile +++ b/prover_snapshots/coq/lib/sail/Makefile @@ -1,6 +1,8 @@ BBV_DIR?=../../../bbv -SRC=Sail2_instr_kinds.v Sail2_values.v Sail2_prompt_monad.v Sail2_prompt.v Sail2_impl_base.v Sail2_operators.v Sail2_operators_bitlists.v Sail2_operators_mwords.v Sail2_state_monad.v Sail2_state.v Sail2_state_lifting.v Sail2_string.v Sail2_real.v +CORESRC=Sail2_prompt_monad.v Sail2_prompt.v Sail2_impl_base.v Sail2_instr_kinds.v Sail2_operators_bitlists.v Sail2_operators_mwords.v Sail2_operators.v Sail2_values.v Sail2_state_monad.v Sail2_state.v Sail2_state_lifting.v Sail2_string.v Sail2_real.v +PROOFSRC=Sail2_state_monad_lemmas.v Sail2_state_lemmas.v Hoare.v +SRC=$(CORESRC) $(PROOFSRC) COQ_LIBS = -R . Sail -R "$(BBV_DIR)/theories" bbv diff --git a/prover_snapshots/coq/lib/sail/Sail2_instr_kinds.v b/prover_snapshots/coq/lib/sail/Sail2_instr_kinds.v index 338bf10..d03d5e6 100644 --- a/prover_snapshots/coq/lib/sail/Sail2_instr_kinds.v +++ b/prover_snapshots/coq/lib/sail/Sail2_instr_kinds.v @@ -139,29 +139,45 @@ instance (Show write_kind) end end *) + +Inductive a64_barrier_domain := + A64_FullShare + | A64_InnerShare + | A64_OuterShare + | A64_NonShare. + +Inductive a64_barrier_type := + A64_barrier_all + | A64_barrier_LD + | A64_barrier_ST. + Inductive barrier_kind := (* Power barriers *) - Barrier_Sync | Barrier_LwSync | Barrier_Eieio | Barrier_Isync + | Barrier_Sync : unit -> barrier_kind + | Barrier_LwSync : unit -> barrier_kind + | Barrier_Eieio : unit -> barrier_kind + | Barrier_Isync : unit -> barrier_kind (* AArch64 barriers *) - | Barrier_DMB | Barrier_DMB_ST | Barrier_DMB_LD | Barrier_DSB - | Barrier_DSB_ST | Barrier_DSB_LD | Barrier_ISB + | Barrier_DMB : a64_barrier_domain -> a64_barrier_type -> barrier_kind + | Barrier_DSB : a64_barrier_domain -> a64_barrier_type -> barrier_kind + | Barrier_ISB : unit -> barrier_kind (* | Barrier_TM_COMMIT*) (* MIPS barriers *) - | Barrier_MIPS_SYNC + | Barrier_MIPS_SYNC : unit -> barrier_kind (* RISC-V barriers *) - | Barrier_RISCV_rw_rw - | Barrier_RISCV_r_rw - | Barrier_RISCV_r_r - | Barrier_RISCV_rw_w - | Barrier_RISCV_w_w - | Barrier_RISCV_w_rw - | Barrier_RISCV_rw_r - | Barrier_RISCV_r_w - | Barrier_RISCV_w_r - | Barrier_RISCV_tso - | Barrier_RISCV_i + | Barrier_RISCV_rw_rw : unit -> barrier_kind + | Barrier_RISCV_r_rw : unit -> barrier_kind + | Barrier_RISCV_r_r : unit -> barrier_kind + | Barrier_RISCV_rw_w : unit -> barrier_kind + | Barrier_RISCV_w_w : unit -> barrier_kind + | Barrier_RISCV_w_rw : unit -> barrier_kind + | Barrier_RISCV_rw_r : unit -> barrier_kind + | Barrier_RISCV_r_w : unit -> barrier_kind + | Barrier_RISCV_w_r : unit -> barrier_kind + | Barrier_RISCV_tso : unit -> barrier_kind + | Barrier_RISCV_i : unit -> barrier_kind (* X86 *) - | Barrier_x86_MFENCE. + | Barrier_x86_MFENCE : unit -> barrier_kind. Scheme Equality for barrier_kind. (* diff --git a/prover_snapshots/coq/lib/sail/Sail2_operators_mwords.v b/prover_snapshots/coq/lib/sail/Sail2_operators_mwords.v index 739a22d..697bc4a 100644 --- a/prover_snapshots/coq/lib/sail/Sail2_operators_mwords.v +++ b/prover_snapshots/coq/lib/sail/Sail2_operators_mwords.v @@ -527,5 +527,18 @@ destruct (sumbool_of_bool _). f_equal. *) +Import ListNotations. +Definition count_leading_zeros {N : Z} (x : mword N) `{ArithFact (N >= 1)} +: {n : Z & ArithFact (0 <= n /\ n <= N)} := + let r : {n : Z & ArithFact (0 <= n /\ n <= N)} := build_ex N in + foreach_Z_up 0 (N - 1) 1 r + (fun i _ r => + (if ((eq_vec (vec_of_bits [access_vec_dec x i] : mword 1) (vec_of_bits [B1] : mword 1))) + then build_ex + (Z.sub (Z.sub (length_mword x) i) 1) + : {n : Z & ArithFact (0 <= n /\ n <= N)} + else r)) + . + Definition prerr_bits {a} (s : string) (bs : mword a) : unit := tt. Definition print_bits {a} (s : string) (bs : mword a) : unit := tt. diff --git a/prover_snapshots/coq/lib/sail/Sail2_prompt.v b/prover_snapshots/coq/lib/sail/Sail2_prompt.v index 68d097f..79bf87e 100644 --- a/prover_snapshots/coq/lib/sail/Sail2_prompt.v +++ b/prover_snapshots/coq/lib/sail/Sail2_prompt.v @@ -53,6 +53,10 @@ Definition foreach_ZM_down {rv e Vars} from to step vars body `{ArithFact (0 < s (*declare {isabelle} termination_argument foreachM = automatic*) +Definition genlistM {A RV E} (f : nat -> monad RV A E) (n : nat) : monad RV (list A) E := + let indices := List.seq 0 n in + foreachM indices [] (fun n xs => (f n >>= (fun x => returnm (xs ++ [x])))). + (*val and_boolM : forall 'rv 'e. monad 'rv bool 'e -> monad 'rv bool 'e -> monad 'rv bool 'e*) Definition and_boolM {rv E} (l : monad rv bool E) (r : monad rv bool E) : monad rv bool E := l >>= (fun l => if l then r else returnm false). @@ -145,7 +149,8 @@ Fixpoint whileMT' {RV Vars E} limit (vars : Vars) (cond : Vars -> monad RV bool else returnm vars else Fail "Termination limit reached". -Definition whileMT {RV Vars E} limit (vars : Vars) (cond : Vars -> monad RV bool E) (body : Vars -> monad RV Vars E) : monad RV Vars E := +Definition whileMT {RV Vars E} (vars : Vars) (measure : Vars -> Z) (cond : Vars -> monad RV bool E) (body : Vars -> monad RV Vars E) : monad RV Vars E := + let limit := measure vars in whileMT' limit vars cond body (Zwf_guarded limit). (*val untilM : forall 'rv 'vars 'e. 'vars -> ('vars -> monad 'rv bool 'e) -> @@ -157,7 +162,8 @@ Fixpoint untilMT' {RV Vars E} limit (vars : Vars) (cond : Vars -> monad RV bool if cond_val then returnm vars else untilMT' (limit - 1) vars cond body (_limit_reduces acc) else Fail "Termination limit reached". -Definition untilMT {RV Vars E} limit (vars : Vars) (cond : Vars -> monad RV bool E) (body : Vars -> monad RV Vars E) : monad RV Vars E := +Definition untilMT {RV Vars E} (vars : Vars) (measure : Vars -> Z) (cond : Vars -> monad RV bool E) (body : Vars -> monad RV Vars E) : monad RV Vars E := + let limit := measure vars in untilMT' limit vars cond body (Zwf_guarded limit). (*let write_two_regs r1 r2 vec = @@ -181,23 +187,21 @@ Definition untilMT {RV Vars E} limit (vars : Vars) (cond : Vars -> monad RV bool else slice vec (start_vec - size_r1) (start_vec - size_vec) in write_reg r1 r1_v >> write_reg r2 r2_v*) -Fixpoint pick_bit_list {rv e} (n:nat) : monad rv (list bool) e := - match n with - | O => returnm [] - | S m => choose_bool "pick_bit_list" >>= fun b => - pick_bit_list m >>= fun t => - returnm (b::t) - end%list. +Definition choose_bools {RV E} (descr : string) (n : nat) : monad RV (list bool) E := + genlistM (fun _ => choose_bool descr) n. + +Definition choose {RV A E} (descr : string) (xs : list A) : monad RV A E := + (* Use sufficiently many nondeterministically chosen bits and convert into an + index into the list *) + choose_bools descr (List.length xs) >>= fun bs => + let idx := ((nat_of_bools bs) mod List.length xs)%nat in + match List.nth_error xs idx with + | Some x => returnm x + | None => Fail ("choose " ++ descr) + end. Definition internal_pick {rv a e} (xs : list a) : monad rv a e := - let n := length xs in - match xs with - | h::_ => - pick_bit_list (2 + n) >>= fun bs => - let i := (Word.wordToNat (wordFromBitlist bs) mod n)%nat in - returnm (List.nth i xs h) - | [] => Fail "internal_pick called on empty list" - end. + choose "internal_pick" xs. Fixpoint undefined_word_nat {rv e} n : monad rv (Word.word n) e := match n with diff --git a/prover_snapshots/coq/lib/sail/Sail2_state.v b/prover_snapshots/coq/lib/sail/Sail2_state.v index b73d501..dc635cb 100644 --- a/prover_snapshots/coq/lib/sail/Sail2_state.v +++ b/prover_snapshots/coq/lib/sail/Sail2_state.v @@ -32,7 +32,7 @@ end. (*val genlistS : forall 'a 'rv 'e. (nat -> monadS 'rv 'a 'e) -> nat -> monadS 'rv (list 'a) 'e*) Definition genlistS {A RV E} (f : nat -> monadS RV A E) n : monadS RV (list A) E := - let indices := genlist (fun n => n) n in + let indices := List.seq 0 n in foreachS indices [] (fun n xs => (f n >>$= (fun x => returnS (xs ++ [x])))). (*val and_boolS : forall 'rv 'e. monadS 'rv bool 'e -> monadS 'rv bool 'e -> monadS 'rv bool 'e*) @@ -43,6 +43,31 @@ Definition and_boolS {RV E} (l r : monadS RV bool E) : monadS RV bool E := Definition or_boolS {RV E} (l r : monadS RV bool E) : monadS RV bool E := l >>$= (fun l => if l then returnS true else r). +Definition and_boolSP {rv E} {P Q R:bool->Prop} (x : monadS rv {b:bool & ArithFact (P b)} E) (y : monadS rv {b:bool & ArithFact (Q b)} E) + `{H:ArithFact (forall l r, P l -> (l = true -> Q r) -> R (andb l r))} + : monadS rv {b:bool & ArithFact (R b)} E. +refine ( + x >>$= fun '(existT _ x (Build_ArithFact _ p)) => (if x return P x -> _ then + fun p => y >>$= fun '(existT _ y _) => returnS (existT _ y _) + else fun p => returnS (existT _ false _)) p +). +* constructor. destruct H. destruct a0. change y with (andb true y). auto. +* constructor. destruct H. change false with (andb false false). apply fact. + assumption. + congruence. +Defined. +Definition or_boolSP {rv E} {P Q R:bool -> Prop} (l : monadS rv {b : bool & ArithFact (P b)} E) (r : monadS rv {b : bool & ArithFact (Q b)} E) + `{ArithFact (forall l r, P l -> (l = false -> Q r) -> R (orb l r))} + : monadS rv {b : bool & ArithFact (R b)} E. +refine ( + l >>$= fun '(existT _ l (Build_ArithFact _ p)) => + (if l return P l -> _ then fun p => returnS (existT _ true _) + else fun p => r >>$= fun '(existT _ r _) => returnS (existT _ r _)) p +). +* constructor. destruct H. change true with (orb true true). apply fact. assumption. congruence. +* constructor. destruct H. destruct a0. change r with (orb false r). auto. +Defined. + (*val bool_of_bitU_fail : forall 'rv 'e. bitU -> monadS 'rv bool 'e*) Definition bool_of_bitU_fail {RV E} (b : bitU) : monadS RV bool E := match b with @@ -96,21 +121,47 @@ let rec untilS vars cond body s = (cond vars >>$= (fun cond_val s'' -> if cond_val then returnS vars s'' else untilS vars cond body s'')) s')) s *) + +Fixpoint whileST' {RV Vars E} limit (vars : Vars) (cond : Vars -> monadS RV bool E) (body : Vars -> monadS RV Vars E) (acc : Acc (Zwf 0) limit) : monadS RV Vars E := + if Z_ge_dec limit 0 then + cond vars >>$= fun cond_val => + if cond_val then + body vars >>$= fun vars => whileST' (limit - 1) vars cond body (_limit_reduces acc) + else returnS vars + else failS "Termination limit reached". + +Definition whileST {RV Vars E} (vars : Vars) measure (cond : Vars -> monadS RV bool E) (body : Vars -> monadS RV Vars E) : monadS RV Vars E := + let limit := measure vars in + whileST' limit vars cond body (Zwf_guarded limit). + +(*val untilM : forall 'rv 'vars 'e. 'vars -> ('vars -> monad 'rv bool 'e) -> + ('vars -> monad 'rv 'vars 'e) -> monad 'rv 'vars 'e*) +Fixpoint untilST' {RV Vars E} limit (vars : Vars) (cond : Vars -> monadS RV bool E) (body : Vars -> monadS RV Vars E) (acc : Acc (Zwf 0) limit) : monadS RV Vars E := + if Z_ge_dec limit 0 then + body vars >>$= fun vars => + cond vars >>$= fun cond_val => + if cond_val then returnS vars else untilST' (limit - 1) vars cond body (_limit_reduces acc) + else failS "Termination limit reached". + +Definition untilST {RV Vars E} (vars : Vars) measure (cond : Vars -> monadS RV bool E) (body : Vars -> monadS RV Vars E) : monadS RV Vars E := + let limit := measure vars in + untilST' limit vars cond body (Zwf_guarded limit). + + (*val choose_boolsS : forall 'rv 'e. nat -> monadS 'rv (list bool) 'e*) Definition choose_boolsS {RV E} n : monadS RV (list bool) E := genlistS (fun _ => choose_boolS tt) n. (* TODO: Replace by chooseS and prove equivalence to prompt monad version *) -(*val internal_pickS : forall 'rv 'a 'e. list 'a -> monadS 'rv 'a 'e -let internal_pickS xs = +(*val internal_pickS : forall 'rv 'a 'e. list 'a -> monadS 'rv 'a 'e*) +Definition internal_pickS {RV A E} (xs : list A) : monadS RV A E := (* Use sufficiently many nondeterministically chosen bits and convert into an index into the list *) - choose_boolsS (List.length xs) >>$= fun bs -> - let idx = (natFromNatural (nat_of_bools bs)) mod List.length xs in - match index xs idx with - | Just x -> returnS x - | Nothing -> failS "choose internal_pick" - end + choose_boolsS (List.length xs) >>$= fun bs => + let idx := ((nat_of_bools bs) mod List.length xs)%nat in + match List.nth_error xs idx with + | Some x => returnS x + | None => failS "choose internal_pick" + end. -*) diff --git a/prover_snapshots/coq/lib/sail/Sail2_state_lemmas.v b/prover_snapshots/coq/lib/sail/Sail2_state_lemmas.v new file mode 100644 index 0000000..c07016d --- /dev/null +++ b/prover_snapshots/coq/lib/sail/Sail2_state_lemmas.v @@ -0,0 +1,819 @@ +Require Import Sail2_values Sail2_prompt_monad Sail2_prompt Sail2_state_monad Sail2_state Sail2_state Sail2_state_lifting. +Require Import Sail2_state_monad_lemmas. + +Local Open Scope equiv_scope. + +(* Monad lifting *) + +Lemma liftState_bind Regval Regs A B E {r : Sail2_values.register_accessors Regs Regval} {m : monad Regval A E} {f : A -> monad Regval B E} : + liftState r (bind m f) === bindS (liftState r m) (fun x => liftState r (f x)). +induction m; simpl; autorewrite with state; auto using bindS_cong. +Qed. +Hint Rewrite liftState_bind : liftState. + +(* TODO: I want a general tactic for this, but abstracting the hint db out + appears to break. + This does beta reduction when no rules apply to try and allow more rules to apply + (e.g., the application of f to x in the above lemma may introduce a beta redex). *) +Ltac rewrite_liftState := rewrite_strat topdown (choice (progress try hints liftState) progress eval cbn beta). + +Lemma liftState_return Regval Regs A E {r : Sail2_values.register_accessors Regs Regval} {a :A} : + liftState (E:=E) r (returnm a) = returnS a. +reflexivity. +Qed. +Hint Rewrite liftState_return : liftState. + +(* +Lemma Value_liftState_Run: + List.In (Value a, s') (liftState r m s) + exists t, Run m t a. + by (use assms in \<open>induction r m arbitrary: s s' rule: liftState.induct\<close>; + simp add: failS_def throwS_def returnS_def del: read_regvalS.simps; + blast elim: Value_bindS_elim) + +lemmas liftState_if_distrib[liftState_simp] = if_distrib[where f = "liftState ra" for ra] +*) +Lemma liftState_if_distrib Regs Regval A E {r x y} {c : bool} : + @liftState Regs Regval A E r (if c then x else y) = if c then liftState r x else liftState r y. +destruct c; reflexivity. +Qed. +Lemma liftState_if_distrib_sumbool {Regs Regval A E P Q r x y} {c : sumbool P Q} : + @liftState Regs Regval A E r (if c then x else y) = if c then liftState r x else liftState r y. +destruct c; reflexivity. +Qed. + +Lemma Value_bindS_iff {Regs A B E} {f : A -> monadS Regs B E} {b m s s''} : + List.In (Value b, s'') (bindS m f s) <-> (exists a s', List.In (Value a, s') (m s) /\ List.In (Value b, s'') (f a s')). +split. +* intro H. + apply bindS_cases in H. + destruct H as [(? & ? & ? & [= <-] & ? & ?) | [(? & [= <-] & ?) | (? & ? & ? & [= <-] & ? & ?)]]; + eauto. +* intros (? & ? & ? & ?). + eauto with bindS_intros. +Qed. + +Lemma Ex_bindS_iff {Regs A B E} {f : A -> monadS Regs B E} {m e s s''} : + List.In (Ex e, s'') (bindS m f s) <-> List.In (Ex e, s'') (m s) \/ (exists a s', List.In (Value a, s') (m s) /\ List.In (Ex e, s'') (f a s')). +split. +* intro H. + apply bindS_cases in H. + destruct H as [(? & ? & ? & [= <-] & ? & ?) | [(? & [= <-] & ?) | (? & ? & ? & [= <-] & ? & ?)]]; + eauto. +* intros [H | (? & ? & H1 & H2)]; + eauto with bindS_intros. +Qed. + +Lemma liftState_throw Regs Regval A E {r} {e : E} : + @liftState Regval Regs A E r (throw e) = throwS e. +reflexivity. +Qed. +Lemma liftState_assert Regs Regval E {r c msg} : + @liftState Regval Regs _ E r (assert_exp c msg) = assert_expS c msg. +destruct c; reflexivity. +Qed. +Lemma liftState_exit Regs Regval A E r : + @liftState Regval Regs A E r (exit tt) = exitS tt. +reflexivity. +Qed. +Lemma liftState_exclResult Regs Regval E r : + @liftState Regs Regval _ E r (excl_result tt) = excl_resultS tt. +reflexivity. +Qed. +Lemma liftState_barrier Regs Regval E r bk : + @liftState Regs Regval _ E r (barrier bk) = returnS tt. +reflexivity. +Qed. +Lemma liftState_footprint Regs Regval E r : + @liftState Regs Regval _ E r (footprint tt) = returnS tt. +reflexivity. +Qed. +Lemma liftState_choose_bool Regs Regval E r descr : + @liftState Regs Regval _ E r (choose_bool descr) = choose_boolS tt. +reflexivity. +Qed. +(*declare undefined_boolS_def[simp]*) +Lemma liftState_undefined Regs Regval E r : + @liftState Regs Regval _ E r (undefined_bool tt) = undefined_boolS tt. +reflexivity. +Qed. +Lemma liftState_maybe_fail Regs Regval A E r msg x : + @liftState Regs Regval A E r (maybe_fail msg x) = maybe_failS msg x. +destruct x; reflexivity. +Qed. +Lemma liftState_and_boolM Regs Regval E r x y : + @liftState Regs Regval _ E r (and_boolM x y) === and_boolS (liftState r x) (liftState r y). +unfold and_boolM, and_boolS. +rewrite liftState_bind. +apply bindS_cong; auto. +intros. rewrite liftState_if_distrib. +reflexivity. +Qed. +Lemma liftState_and_boolMP Regs Regval E P Q R r x y H : + @liftState Regs Regval _ E r (@and_boolMP _ _ P Q R x y H) === and_boolSP (liftState r x) (liftState r y). +unfold and_boolMP, and_boolSP. +rewrite liftState_bind. +apply bindS_cong; auto. +intros [[|] [A]]. +* rewrite liftState_bind; + simpl; + apply bindS_cong; auto; + intros [a' A']; + rewrite liftState_return; + reflexivity. +* rewrite liftState_return. + reflexivity. +Qed. + +Lemma liftState_or_boolM Regs Regval E r x y : + @liftState Regs Regval _ E r (or_boolM x y) === or_boolS (liftState r x) (liftState r y). +unfold or_boolM, or_boolS. +rewrite liftState_bind. +apply bindS_cong; auto. +intros. rewrite liftState_if_distrib. +reflexivity. +Qed. +Lemma liftState_or_boolMP Regs Regval E P Q R r x y H : + @liftState Regs Regval _ E r (@or_boolMP _ _ P Q R x y H) === or_boolSP (liftState r x) (liftState r y). +unfold or_boolMP, or_boolSP. +rewrite liftState_bind. +simpl. +apply bindS_cong; auto. +intros [[|] [A]]. +* rewrite liftState_return. + reflexivity. +* rewrite liftState_bind; + simpl; + apply bindS_cong; auto; + intros [a' A']; + rewrite liftState_return; + reflexivity. +Qed. +Hint Rewrite liftState_throw liftState_assert liftState_exit liftState_exclResult + liftState_barrier liftState_footprint liftState_choose_bool + liftState_undefined liftState_maybe_fail + liftState_and_boolM liftState_and_boolMP + liftState_or_boolM liftState_or_boolMP + : liftState. + +Lemma liftState_try_catch Regs Regval A E1 E2 r m h : + @liftState Regs Regval A E2 r (try_catch (E1 := E1) m h) === try_catchS (liftState r m) (fun e => liftState r (h e)). +induction m; intros; simpl; autorewrite with state; +solve +[ auto +| erewrite try_catchS_bindS_no_throw; intros; + only 2,3: (autorewrite with ignore_throw; reflexivity); + apply bindS_cong; auto +]. +Qed. +Hint Rewrite liftState_try_catch : liftState. + +Lemma liftState_early_return Regs Regval A R E r x : + liftState (Regs := Regs) r (@early_return Regval A R E x) = early_returnS x. +reflexivity. +Qed. +Hint Rewrite liftState_early_return : liftState. + +Lemma liftState_catch_early_return (*[liftState_simp]:*) Regs Regval A E r m : + liftState (Regs := Regs) r (@catch_early_return Regval A E m) === catch_early_returnS (liftState r m). +unfold catch_early_return, catch_early_returnS. +rewrite_liftState. +apply try_catchS_cong; auto. +intros [a | e] s'; auto. +Qed. +Hint Rewrite liftState_catch_early_return : liftState. + +Lemma liftState_liftR Regs Regval A R E r m : + liftState (Regs := Regs) r (@liftR Regval A R E m) === liftRS (liftState r m). +unfold liftR, liftRS. +rewrite_liftState. +reflexivity. +Qed. +Hint Rewrite liftState_liftR : liftState. + +Lemma liftState_try_catchR Regs Regval A R E1 E2 r m h : + liftState (Regs := Regs) r (@try_catchR Regval A R E1 E2 m h) === try_catchRS (liftState r m) (fun x => liftState r (h x)). +unfold try_catchR, try_catchRS. rewrite_liftState. +apply try_catchS_cong; auto. +intros [r' | e] s'; auto. +Qed. +Hint Rewrite liftState_try_catchR : liftState. +(* +Lemma liftState_bool_of_bitU_nondet Regs Regval : + "liftState r (bool_of_bitU_nondet b) = bool_of_bitU_nondetS b" + by (cases b; auto simp: bool_of_bitU_nondet_def bool_of_bitU_nondetS_def liftState_simp) +Hint Rewrite liftState_bool_of_bitU_nondet : liftState. +*) +Lemma liftState_read_memt Regs Regval A B E H rk a sz r : + liftState (Regs := Regs) r (@read_memt Regval A B E H rk a sz) === read_memtS rk a sz. +unfold read_memt, read_memt_bytes, read_memtS, maybe_failS. simpl. +apply bindS_cong; auto. +intros [byte bit]. +destruct (option_map _); auto. +Qed. +Hint Rewrite liftState_read_memt : liftState. + +Lemma liftState_read_mem Regs Regval A B E H rk asz a sz r : + liftState (Regs := Regs) r (@read_mem Regval A B E H rk asz a sz) === read_memS rk a sz. +unfold read_mem, read_memS, read_memtS. simpl. +unfold read_mem_bytesS, read_memt_bytesS. +repeat rewrite bindS_assoc. +apply bindS_cong; auto. +intros [ bytes | ]; auto. simpl. +apply bindS_cong; auto. +intros [byte bit]. +rewrite bindS_returnS_left. rewrite_liftState. +destruct (option_map _); auto. +Qed. +Hint Rewrite liftState_read_mem : liftState. + +Lemma liftState_write_mem_ea Regs Regval A E rk asz a sz r : + liftState (Regs := Regs) r (@write_mem_ea Regval A E rk asz a sz) = returnS tt. +reflexivity. +Qed. +Hint Rewrite liftState_write_mem_ea : liftState. + +Lemma liftState_write_memt Regs Regval A B E wk addr sz v t r : + liftState (Regs := Regs) r (@write_memt Regval A B E wk addr sz v t) = write_memtS wk addr sz v t. +unfold write_memt, write_memtS. +destruct (Sail2_values.mem_bytes_of_bits v); auto. +Qed. +Hint Rewrite liftState_write_memt : liftState. + +Lemma liftState_write_mem Regs Regval A B E wk addrsize addr sz v r : + liftState (Regs := Regs) r (@write_mem Regval A B E wk addrsize addr sz v) = write_memS wk addr sz v. +unfold write_mem, write_memS, write_memtS. +destruct (Sail2_values.mem_bytes_of_bits v); simpl; auto. +Qed. +Hint Rewrite liftState_write_mem : liftState. + +Lemma bindS_rw_left Regs A B E m1 m2 (f : A -> monadS Regs B E) s : + m1 s = m2 s -> + bindS m1 f s = bindS m2 f s. +intro H. unfold bindS. rewrite H. reflexivity. +Qed. + +Lemma liftState_read_reg_readS Regs Regval A E reg get_regval' set_regval' : + (forall s, map_bind reg.(of_regval) (get_regval' reg.(name) s) = Some (reg.(read_from) s)) -> + liftState (Regs := Regs) (get_regval', set_regval') (@read_reg _ Regval A E reg) === readS (fun x => reg.(read_from) (ss_regstate x)). +intros. +unfold read_reg. simpl. unfold readS. intro s. +erewrite bindS_rw_left. 2: { + apply bindS_returnS_left. +} +specialize (H (ss_regstate s)). +destruct (get_regval' _ _) as [v | ]; only 2: discriminate H. +rewrite bindS_returnS_left. +simpl in *. +rewrite H. +reflexivity. +Qed. + +Lemma liftState_write_reg_updateS Regs Regval A E get_regval' set_regval' reg (v : A) : + (forall s, set_regval' (name reg) (regval_of reg v) s = Some (write_to reg v s)) -> + liftState (Regs := Regs) (Regval := Regval) (E := E) (get_regval', set_regval') (write_reg reg v) === updateS (fun s => {| ss_regstate := (write_to reg v s.(ss_regstate)); ss_memstate := s.(ss_memstate); ss_tagstate := s.(ss_tagstate) |}). +intros. intro s. +unfold write_reg. simpl. unfold readS, seqS. +erewrite bindS_rw_left. 2: { + apply bindS_returnS_left. +} +specialize (H (ss_regstate s)). +destruct (set_regval' _ _) as [v' | ]; only 2: discriminate H. +injection H as H1. +unfold updateS. +rewrite <- H1. +reflexivity. +Qed. +(* +Lemma liftState_iter_aux Regs Regval A E : + liftState r (iter_aux i f xs) = iterS_aux i (fun i x => liftState r (f i x)) xs. + by (induction i "\<lambda>i x. liftState r (f i x)" xs rule: iterS_aux.induct) + (auto simp: liftState_simp cong: bindS_cong) +Hint Rewrite liftState_iter_aux : liftState. + +lemma liftState_iteri[liftState_simp]: + "liftState r (iteri f xs) = iteriS (\<lambda>i x. liftState r (f i x)) xs" + by (auto simp: iteri_def iteriS_def liftState_simp) + +lemma liftState_iter[liftState_simp]: + "liftState r (iter f xs) = iterS (liftState r \<circ> f) xs" + by (auto simp: iter_def iterS_def liftState_simp) +*) +Lemma liftState_foreachM Regs Regval A Vars E (xs : list A) (vars : Vars) (body : A -> Vars -> monad Regval Vars E) r : + liftState (Regs := Regs) r (foreachM xs vars body) === foreachS xs vars (fun x vars => liftState r (body x vars)). +revert vars. +induction xs as [ | h t]. +* reflexivity. +* intros vars. simpl. + rewrite_liftState. + apply bindS_cong; auto. +Qed. +Hint Rewrite liftState_foreachM : liftState. + +Lemma foreachS_cong {A RV Vars E} xs vars f f' : + (forall a vars, f a vars === f' a vars) -> + @foreachS A RV Vars E xs vars f === foreachS xs vars f'. +intro H. +revert vars. +induction xs. +* reflexivity. +* intros. simpl. + rewrite H. + apply bindS_cong; auto. +Qed. + +Add Parametric Morphism {Regs A Vars E : Type} : (@foreachS A Regs Vars E) + with signature eq ==> eq ==> equiv ==> equiv as foreachS_morphism. +apply foreachS_cong. +Qed. + +(*Tactic Notation "sail_rewrite" ident(hintdb) := rewrite_strat topdown (choice (hints hintdb) progress eval cbn beta). +Ltac sail_rewrite hintdb := rewrite_strat topdown (choice (hints hintdb) progress eval cbn beta).*) + +Lemma liftState_genlistM Regs Regval A E r f n : + liftState (Regs := Regs) r (@genlistM A Regval E f n) === genlistS (fun x => liftState r (f x)) n. +unfold genlistM, genlistS. +rewrite_liftState. +reflexivity. +Qed. +Hint Rewrite liftState_genlistM : liftState. + +Add Parametric Morphism {A RV E : Type} : (@genlistS A RV E) + with signature equiv ==> eq ==> equiv as genlistS_morphism. +intros f g EQ n. +unfold genlistS. +apply foreachS_cong. +intros m vars. +rewrite EQ. +reflexivity. +Qed. + +Lemma liftState_choose_bools Regs Regval E descr n r : + liftState (Regs := Regs) r (@choose_bools Regval E descr n) === choose_boolsS n. +unfold choose_bools, choose_boolsS. +rewrite_liftState. +reflexivity. +Qed. +Hint Rewrite liftState_choose_bools : liftState. + +(* +Lemma liftState_bools_of_bits_nondet[liftState_simp]: + "liftState r (bools_of_bits_nondet bs) = bools_of_bits_nondetS bs" + unfolding bools_of_bits_nondet_def bools_of_bits_nondetS_def + by (auto simp: liftState_simp comp_def) +Hint Rewrite liftState_choose_bools : liftState. +*) + +Lemma liftState_internal_pick Regs Regval A E r (xs : list A) : + liftState (Regs := Regs) (Regval := Regval) (E := E) r (internal_pick xs) === internal_pickS xs. +unfold internal_pick, internal_pickS. +unfold choose. +rewrite_liftState. +apply bindS_cong; auto. +intros. +destruct (nth_error _ _); auto. +Qed. +Hint Rewrite liftState_internal_pick : liftState. + +Lemma liftRS_returnS (*[simp]:*) A R Regs E x : + @liftRS A R Regs E (returnS x) = returnS x. +reflexivity. +Qed. + +Lemma concat_singleton A (xs : list A) : + concat (xs::nil) = xs. +simpl. +rewrite app_nil_r. +reflexivity. +Qed. + +Lemma liftRS_bindS Regs A B R E (m : monadS Regs A E) (f : A -> monadS Regs B E) : + @liftRS B R Regs E (bindS m f) === bindS (liftRS m) (fun x => liftRS (f x)). +intro s. +unfold liftRS, try_catchS, bindS, throwS, returnS. +induction (m s) as [ | [[a | [msg | e]] t]]. +* reflexivity. +* simpl. rewrite flat_map_app. rewrite IHl. reflexivity. +* simpl. rewrite IHl. reflexivity. +* simpl. rewrite IHl. reflexivity. +Qed. + +Lemma liftRS_assert_expS_True (*[simp]:*) Regs R E msg : + @liftRS _ R Regs E (assert_expS true msg) = returnS tt. +reflexivity. +Qed. + +(* +lemma untilM_domI: + fixes V :: "'vars \<Rightarrow> nat" + assumes "Inv vars" + and "\<And>vars t vars' t'. \<lbrakk>Inv vars; Run (body vars) t vars'; Run (cond vars') t' False\<rbrakk> \<Longrightarrow> V vars' < V vars \<and> Inv vars'" + shows "untilM_dom (vars, cond, body)" + using assms + by (induction vars rule: measure_induct_rule[where f = V]) + (auto intro: untilM.domintros) + +lemma untilM_dom_untilS_dom: + assumes "untilM_dom (vars, cond, body)" + shows "untilS_dom (vars, liftState r \<circ> cond, liftState r \<circ> body, s)" + using assms + by (induction vars cond body arbitrary: s rule: untilM.pinduct) + (rule untilS.domintros, auto elim!: Value_liftState_Run) + +lemma measure2_induct: + fixes f :: "'a \<Rightarrow> 'b \<Rightarrow> nat" + assumes "\<And>x1 y1. (\<And>x2 y2. f x2 y2 < f x1 y1 \<Longrightarrow> P x2 y2) \<Longrightarrow> P x1 y1" + shows "P x y" +proof - + have "P (fst x) (snd x)" for x + by (induction x rule: measure_induct_rule[where f = "\<lambda>x. f (fst x) (snd x)"]) (auto intro: assms) + then show ?thesis by auto +qed + +lemma untilS_domI: + fixes V :: "'vars \<Rightarrow> 'regs sequential_state \<Rightarrow> nat" + assumes "Inv vars s" + and "\<And>vars s vars' s' s''. + \<lbrakk>Inv vars s; (Value vars', s') \<in> body vars s; (Value False, s'') \<in> cond vars' s'\<rbrakk> + \<Longrightarrow> V vars' s'' < V vars s \<and> Inv vars' s''" + shows "untilS_dom (vars, cond, body, s)" + using assms + by (induction vars s rule: measure2_induct[where f = V]) + (auto intro: untilS.domintros) + +lemma whileS_dom_step: + assumes "whileS_dom (vars, cond, body, s)" + and "(Value True, s') \<in> cond vars s" + and "(Value vars', s'') \<in> body vars s'" + shows "whileS_dom (vars', cond, body, s'')" + by (use assms in \<open>induction vars cond body s arbitrary: vars' s' s'' rule: whileS.pinduct\<close>) + (auto intro: whileS.domintros) + +lemma whileM_dom_step: + assumes "whileM_dom (vars, cond, body)" + and "Run (cond vars) t True" + and "Run (body vars) t' vars'" + shows "whileM_dom (vars', cond, body)" + by (use assms in \<open>induction vars cond body arbitrary: vars' t t' rule: whileM.pinduct\<close>) + (auto intro: whileM.domintros) + +lemma whileM_dom_ex_step: + assumes "whileM_dom (vars, cond, body)" + and "\<exists>t. Run (cond vars) t True" + and "\<exists>t'. Run (body vars) t' vars'" + shows "whileM_dom (vars', cond, body)" + using assms by (blast intro: whileM_dom_step) + +lemmas whileS_pinduct = whileS.pinduct[case_names Step] + +lemma liftState_whileM: + assumes "whileS_dom (vars, liftState r \<circ> cond, liftState r \<circ> body, s)" + and "whileM_dom (vars, cond, body)" + shows "liftState r (whileM vars cond body) s = whileS vars (liftState r \<circ> cond) (liftState r \<circ> body) s" +proof (use assms in \<open>induction vars "liftState r \<circ> cond" "liftState r \<circ> body" s rule: whileS.pinduct\<close>) + case Step: (1 vars s) + note domS = Step(1) and IH = Step(2) and domM = Step(3) + show ?case unfolding whileS.psimps[OF domS] whileM.psimps[OF domM] liftState_bind + proof (intro bindS_ext_cong, goal_cases cond while) + case (while a s') + have "bindS (liftState r (body vars)) (liftState r \<circ> (\<lambda>vars. whileM vars cond body)) s' = + bindS (liftState r (body vars)) (\<lambda>vars. whileS vars (liftState r \<circ> cond) (liftState r \<circ> body)) s'" + if "a" + proof (intro bindS_ext_cong, goal_cases body while') + case (while' vars' s'') + have "whileM_dom (vars', cond, body)" proof (rule whileM_dom_ex_step[OF domM]) + show "\<exists>t. Run (cond vars) t True" using while that by (auto elim: Value_liftState_Run) + show "\<exists>t'. Run (body vars) t' vars'" using while' that by (auto elim: Value_liftState_Run) + qed + then show ?case using while while' that IH by auto + qed auto + then show ?case by (auto simp: liftState_simp) + qed auto +qed +*) + +Local Opaque _limit_reduces. +Ltac gen_reduces := + match goal with |- context[@_limit_reduces ?a ?b ?c] => generalize (@_limit_reduces a b c) end. + +(* TODO: rewrite_liftState is performing really badly here. We could add liftState_if_distrib + to the hint db, but then it starts failing in a way that causes the whole rewriting to fail. *) + +Lemma liftState_whileM RV Vars E r measure vars cond (body : Vars -> monad RV Vars E) : + liftState (Regs := RV) r (whileMT vars measure cond body) === whileST vars measure (fun vars => liftState r (cond vars)) (fun vars => liftState r (body vars)). +unfold whileMT, whileST. +generalize (measure vars) as limit. intro. +revert vars. +destruct (Z.le_decidable 0 limit). +* generalize (Zwf_guarded limit) as acc. + apply Wf_Z.natlike_ind with (x := limit). + + intros [acc] *; simpl. + match goal with |- context [Build_ArithFact _ ?prf] => generalize prf; intros ?Proof end. + rewrite_liftState. + setoid_rewrite liftState_if_distrib. + apply bindS_cong; auto. + destruct a; rewrite_liftState; auto. + apply bindS_cong; auto. + intros. destruct (_limit_reduces _). simpl. + reflexivity. + + clear limit H. + intros limit H IH [acc] vars s. simpl. + destruct (Z_ge_dec _ _); try omega. + autorewrite with liftState. + apply bindS_ext_cong; auto. + intros. rewrite liftState_if_distrib. + destruct a; autorewrite with liftState; auto. + apply bindS_ext_cong; auto. + intros. + gen_reduces. + replace (Z.succ limit - 1) with limit; try omega. intro acc'. + apply IH. + + assumption. +* intros. simpl. + destruct (Z_ge_dec _ _); try omega. + reflexivity. +Qed. + +(* +lemma untilM_dom_step: + assumes "untilM_dom (vars, cond, body)" + and "Run (body vars) t vars'" + and "Run (cond vars') t' False" + shows "untilM_dom (vars', cond, body)" + by (use assms in \<open>induction vars cond body arbitrary: vars' t t' rule: untilM.pinduct\<close>) + (auto intro: untilM.domintros) + +lemma untilM_dom_ex_step: + assumes "untilM_dom (vars, cond, body)" + and "\<exists>t. Run (body vars) t vars'" + and "\<exists>t'. Run (cond vars') t' False" + shows "untilM_dom (vars', cond, body)" + using assms by (blast intro: untilM_dom_step) + +lemma liftState_untilM: + assumes "untilS_dom (vars, liftState r \<circ> cond, liftState r \<circ> body, s)" + and "untilM_dom (vars, cond, body)" + shows "liftState r (untilM vars cond body) s = untilS vars (liftState r \<circ> cond) (liftState r \<circ> body) s" +proof (use assms in \<open>induction vars "liftState r \<circ> cond" "liftState r \<circ> body" s rule: untilS.pinduct\<close>) + case Step: (1 vars s) + note domS = Step(1) and IH = Step(2) and domM = Step(3) + show ?case unfolding untilS.psimps[OF domS] untilM.psimps[OF domM] liftState_bind + proof (intro bindS_ext_cong, goal_cases body k) + case (k vars' s') + show ?case unfolding comp_def liftState_bind + proof (intro bindS_ext_cong, goal_cases cond until) + case (until a s'') + have "untilM_dom (vars', cond, body)" if "\<not>a" + proof (rule untilM_dom_ex_step[OF domM]) + show "\<exists>t. Run (body vars) t vars'" using k by (auto elim: Value_liftState_Run) + show "\<exists>t'. Run (cond vars') t' False" using until that by (auto elim: Value_liftState_Run) + qed + then show ?case using k until IH by (auto simp: comp_def liftState_simp) + qed auto + qed auto +qed*) + +Lemma liftState_untilM RV Vars E r measure vars cond (body : Vars -> monad RV Vars E) : + liftState (Regs := RV) r (untilMT vars measure cond body) === untilST vars measure (fun vars => liftState r (cond vars)) (fun vars => liftState r (body vars)). +unfold untilMT, untilST. +generalize (measure vars) as limit. intro. +revert vars. +destruct (Z.le_decidable 0 limit). +* generalize (Zwf_guarded limit) as acc. + apply Wf_Z.natlike_ind with (x := limit). + + intros [acc] * s; simpl. +(* TODO rewrite_liftState.*) +autorewrite with liftState. + apply bindS_ext_cong; auto. + intros. autorewrite with liftState. + apply bindS_ext_cong; auto. + intros. rewrite liftState_if_distrib. + destruct a0; auto. + destruct (_limit_reduces _). simpl. + reflexivity. + + clear limit H. + intros limit H IH [acc] vars s. simpl. + destruct (Z_ge_dec _ _); try omega. + autorewrite with liftState. + apply bindS_ext_cong; auto. + intros. autorewrite with liftState; auto. + apply bindS_ext_cong; auto. + intros. rewrite liftState_if_distrib. + destruct a0; autorewrite with liftState; auto. + gen_reduces. + replace (Z.succ limit - 1) with limit; try omega. intro acc'. + apply IH. + + assumption. +* intros. simpl. + destruct (Z_ge_dec _ _); try omega. + reflexivity. +Qed. + +(* + +text \<open>Simplification rules for monadic Boolean connectives\<close> + +lemma if_return_return[simp]: "(if a then return True else return False) = return a" by auto + +lemma and_boolM_simps[simp]: + "and_boolM (return b) (return c) = return (b \<and> c)" + "and_boolM x (return True) = x" + "and_boolM x (return False) = x \<bind> (\<lambda>_. return False)" + "\<And>x y z. and_boolM (x \<bind> y) z = (x \<bind> (\<lambda>r. and_boolM (y r) z))" + by (auto simp: and_boolM_def) + +lemma and_boolM_return_if: + "and_boolM (return b) y = (if b then y else return False)" + by (auto simp: and_boolM_def) + +lemma and_boolM_return_return_and[simp]: "and_boolM (return l) (return r) = return (l \<and> r)" + by (auto simp: and_boolM_def) + +lemmas and_boolM_if_distrib[simp] = if_distrib[where f = "\<lambda>x. and_boolM x y" for y] + +lemma or_boolM_simps[simp]: + "or_boolM (return b) (return c) = return (b \<or> c)" + "or_boolM x (return True) = x \<bind> (\<lambda>_. return True)" + "or_boolM x (return False) = x" + "\<And>x y z. or_boolM (x \<bind> y) z = (x \<bind> (\<lambda>r. or_boolM (y r) z))" + by (auto simp: or_boolM_def) + +lemma or_boolM_return_if: + "or_boolM (return b) y = (if b then return True else y)" + by (auto simp: or_boolM_def) + +lemma or_boolM_return_return_or[simp]: "or_boolM (return l) (return r) = return (l \<or> r)" + by (auto simp: or_boolM_def) + +lemmas or_boolM_if_distrib[simp] = if_distrib[where f = "\<lambda>x. or_boolM x y" for y] + +lemma if_returnS_returnS[simp]: "(if a then returnS True else returnS False) = returnS a" by auto + +lemma and_boolS_simps[simp]: + "and_boolS (returnS b) (returnS c) = returnS (b \<and> c)" + "and_boolS x (returnS True) = x" + "and_boolS x (returnS False) = bindS x (\<lambda>_. returnS False)" + "\<And>x y z. and_boolS (bindS x y) z = (bindS x (\<lambda>r. and_boolS (y r) z))" + by (auto simp: and_boolS_def) + +lemma and_boolS_returnS_if: + "and_boolS (returnS b) y = (if b then y else returnS False)" + by (auto simp: and_boolS_def) + +lemmas and_boolS_if_distrib[simp] = if_distrib[where f = "\<lambda>x. and_boolS x y" for y] + +lemma and_boolS_returnS_True[simp]: "and_boolS (returnS True) c = c" + by (auto simp: and_boolS_def) + +lemma or_boolS_simps[simp]: + "or_boolS (returnS b) (returnS c) = returnS (b \<or> c)" + "or_boolS (returnS False) m = m" + "or_boolS x (returnS True) = bindS x (\<lambda>_. returnS True)" + "or_boolS x (returnS False) = x" + "\<And>x y z. or_boolS (bindS x y) z = (bindS x (\<lambda>r. or_boolS (y r) z))" + by (auto simp: or_boolS_def) + +lemma or_boolS_returnS_if: + "or_boolS (returnS b) y = (if b then returnS True else y)" + by (auto simp: or_boolS_def) + +lemmas or_boolS_if_distrib[simp] = if_distrib[where f = "\<lambda>x. or_boolS x y" for y] + +lemma Run_or_boolM_E: + assumes "Run (or_boolM l r) t a" + obtains "Run l t True" and "a" + | tl tr where "Run l tl False" and "Run r tr a" and "t = tl @ tr" + using assms by (auto simp: or_boolM_def elim!: Run_bindE Run_ifE Run_returnE) + +lemma Run_and_boolM_E: + assumes "Run (and_boolM l r) t a" + obtains "Run l t False" and "\<not>a" + | tl tr where "Run l tl True" and "Run r tr a" and "t = tl @ tr" + using assms by (auto simp: and_boolM_def elim!: Run_bindE Run_ifE Run_returnE) + +lemma maybe_failS_Some[simp]: "maybe_failS msg (Some v) = returnS v" + by (auto simp: maybe_failS_def) + +text \<open>Event traces\<close> + +lemma Some_eq_bind_conv: "Some x = Option.bind f g \<longleftrightarrow> (\<exists>y. f = Some y \<and> g y = Some x)" + unfolding bind_eq_Some_conv[symmetric] by auto + +lemma if_then_Some_eq_Some_iff: "((if b then Some x else None) = Some y) \<longleftrightarrow> (b \<and> y = x)" + by auto + +lemma Some_eq_if_then_Some_iff: "(Some y = (if b then Some x else None)) \<longleftrightarrow> (b \<and> y = x)" + by auto + +lemma emitEventS_update_cases: + assumes "emitEventS ra e s = Some s'" + obtains + (Write_mem) wk addr sz v tag r + where "e = E_write_memt wk addr sz v tag r \<or> (e = E_write_mem wk addr sz v r \<and> tag = B0)" + and "s' = put_mem_bytes addr sz v tag s" + | (Write_reg) r v rs' + where "e = E_write_reg r v" and "(snd ra) r v (regstate s) = Some rs'" + and "s' = s\<lparr>regstate := rs'\<rparr>" + | (Read) "s' = s" + using assms + by (elim emitEventS.elims) + (auto simp: Some_eq_bind_conv bind_eq_Some_conv if_then_Some_eq_Some_iff Some_eq_if_then_Some_iff) + +lemma runTraceS_singleton[simp]: "runTraceS ra [e] s = emitEventS ra e s" + by (cases "emitEventS ra e s"; auto) + +lemma runTraceS_ConsE: + assumes "runTraceS ra (e # t) s = Some s'" + obtains s'' where "emitEventS ra e s = Some s''" and "runTraceS ra t s'' = Some s'" + using assms by (auto simp: bind_eq_Some_conv) + +lemma runTraceS_ConsI: + assumes "emitEventS ra e s = Some s'" and "runTraceS ra t s' = Some s''" + shows "runTraceS ra (e # t) s = Some s''" + using assms by auto + +lemma runTraceS_Cons_tl: + assumes "emitEventS ra e s = Some s'" + shows "runTraceS ra (e # t) s = runTraceS ra t s'" + using assms by (elim emitEventS.elims) (auto simp: Some_eq_bind_conv bind_eq_Some_conv) + +lemma runTraceS_appendE: + assumes "runTraceS ra (t @ t') s = Some s'" + obtains s'' where "runTraceS ra t s = Some s''" and "runTraceS ra t' s'' = Some s'" +proof - + have "\<exists>s''. runTraceS ra t s = Some s'' \<and> runTraceS ra t' s'' = Some s'" + proof (use assms in \<open>induction t arbitrary: s\<close>) + case (Cons e t) + from Cons.prems + obtain s_e where "emitEventS ra e s = Some s_e" and "runTraceS ra (t @ t') s_e = Some s'" + by (auto elim: runTraceS_ConsE simp: bind_eq_Some_conv) + with Cons.IH[of s_e] show ?case by (auto intro: runTraceS_ConsI) + qed auto + then show ?thesis using that by blast +qed + +lemma runTraceS_nth_split: + assumes "runTraceS ra t s = Some s'" and n: "n < length t" + obtains s1 s2 where "runTraceS ra (take n t) s = Some s1" + and "emitEventS ra (t ! n) s1 = Some s2" + and "runTraceS ra (drop (Suc n) t) s2 = Some s'" +proof - + have "runTraceS ra (take n t @ t ! n # drop (Suc n) t) s = Some s'" + using assms + by (auto simp: id_take_nth_drop[OF n, symmetric]) + then show thesis by (blast elim: runTraceS_appendE runTraceS_ConsE intro: that) +qed + +text \<open>Memory accesses\<close> + +lemma get_mem_bytes_put_mem_bytes_same_addr: + assumes "length v = sz" + shows "get_mem_bytes addr sz (put_mem_bytes addr sz v tag s) = Some (v, if sz > 0 then tag else B1)" +proof (unfold assms[symmetric], induction v rule: rev_induct) + case Nil + then show ?case by (auto simp: get_mem_bytes_def) +next + case (snoc x xs) + then show ?case + by (cases tag) + (auto simp: get_mem_bytes_def put_mem_bytes_def Let_def and_bit_eq_iff foldl_and_bit_eq_iff + cong: option.case_cong split: if_splits option.splits) +qed + +lemma memstate_put_mem_bytes: + assumes "length v = sz" + shows "memstate (put_mem_bytes addr sz v tag s) addr' = + (if addr' \<in> {addr..<addr+sz} then Some (v ! (addr' - addr)) else memstate s addr')" + unfolding assms[symmetric] + by (induction v rule: rev_induct) (auto simp: put_mem_bytes_def nth_Cons nth_append Let_def) + +lemma tagstate_put_mem_bytes: + assumes "length v = sz" + shows "tagstate (put_mem_bytes addr sz v tag s) addr' = + (if addr' \<in> {addr..<addr+sz} then Some tag else tagstate s addr')" + unfolding assms[symmetric] + by (induction v rule: rev_induct) (auto simp: put_mem_bytes_def nth_Cons nth_append Let_def) + +lemma get_mem_bytes_cong: + assumes "\<forall>addr'. addr \<le> addr' \<and> addr' < addr + sz \<longrightarrow> + (memstate s' addr' = memstate s addr' \<and> tagstate s' addr' = tagstate s addr')" + shows "get_mem_bytes addr sz s' = get_mem_bytes addr sz s" +proof (use assms in \<open>induction sz\<close>) + case 0 + then show ?case by (auto simp: get_mem_bytes_def) +next + case (Suc sz) + then show ?case + by (auto simp: get_mem_bytes_def Let_def + intro!: map_option_cong map_cong foldl_cong + arg_cong[where f = just_list] arg_cong2[where f = and_bit]) +qed + +lemma get_mem_bytes_tagged_tagstate: + assumes "get_mem_bytes addr sz s = Some (v, B1)" + shows "\<forall>addr' \<in> {addr..<addr + sz}. tagstate s addr' = Some B1" + using assms + by (auto simp: get_mem_bytes_def foldl_and_bit_eq_iff Let_def split: option.splits) + +end +*)
\ No newline at end of file diff --git a/prover_snapshots/coq/lib/sail/Sail2_state_lifting.v b/prover_snapshots/coq/lib/sail/Sail2_state_lifting.v index 633c0ef..1544c3c 100644 --- a/prover_snapshots/coq/lib/sail/Sail2_state_lifting.v +++ b/prover_snapshots/coq/lib/sail/Sail2_state_lifting.v @@ -42,12 +42,12 @@ match e with if success then Some (put_mem_bytes addr sz v tag s) else None | E_read_reg r v => let (read_reg, _) := ra in - option_bind (read_reg r s.(regstate)) (fun v' => + option_bind (read_reg r s.(ss_regstate)) (fun v' => if generic_eq v' v then Some s else None) | E_write_reg r v => let (_, write_reg) := ra in - option_bind (write_reg r v s.(regstate)) (fun rs' => - Some {| regstate := rs'; memstate := s.(memstate); tagstate := s.(tagstate) |}) + option_bind (write_reg r v s.(ss_regstate)) (fun rs' => + Some {| ss_regstate := rs'; ss_memstate := s.(ss_memstate); ss_tagstate := s.(ss_tagstate) |}) | _ => Some s end. diff --git a/prover_snapshots/coq/lib/sail/Sail2_state_monad.v b/prover_snapshots/coq/lib/sail/Sail2_state_monad.v index 235e4b9..552fa68 100644 --- a/prover_snapshots/coq/lib/sail/Sail2_state_monad.v +++ b/prover_snapshots/coq/lib/sail/Sail2_state_monad.v @@ -14,17 +14,19 @@ Definition Memstate : Type := NatMap.t memory_byte. Definition Tagstate : Type := NatMap.t bitU. (* type regstate = map string (vector bitU) *) +(* We deviate from the Lem library and prefix the fields with ss_ to avoid + name clashes. *) Record sequential_state {Regs} := - { regstate : Regs; - memstate : Memstate; - tagstate : Tagstate }. + { ss_regstate : Regs; + ss_memstate : Memstate; + ss_tagstate : Tagstate }. Arguments sequential_state : clear implicits. (*val init_state : forall 'regs. 'regs -> sequential_state 'regs*) Definition init_state {Regs} regs : sequential_state Regs := - {| regstate := regs; - memstate := NatMap.empty _; - tagstate := NatMap.empty _ |}. + {| ss_regstate := regs; + ss_memstate := NatMap.empty _; + ss_tagstate := NatMap.empty _ |}. Inductive ex E := | Failure : string -> ex E @@ -50,10 +52,10 @@ Definition returnS {Regs A E} (a:A) : monadS Regs A E := fun s => [(Value a,s)]. (*val bindS : forall 'regs 'a 'b 'e. monadS 'regs 'a 'e -> ('a -> monadS 'regs 'b 'e) -> monadS 'regs 'b 'e*) Definition bindS {Regs A B E} (m : monadS Regs A E) (f : A -> monadS Regs B E) : monadS Regs B E := fun (s : sequential_state Regs) => - List.concat (List.map (fun v => match v with - | (Value a, s') => f a s' - | (Ex e, s') => [(Ex e, s')] - end) (m s)). + List.flat_map (fun v => match v with + | (Value a, s') => f a s' + | (Ex e, s') => [(Ex e, s')] + end) (m s). (*val seqS: forall 'regs 'b 'e. monadS 'regs unit 'e -> monadS 'regs 'b 'e -> monadS 'regs 'b 'e*) Definition seqS {Regs B E} (m : monadS Regs unit E) (n : monadS Regs B E) : monadS Regs B E := @@ -96,11 +98,11 @@ Definition throwS {Regs A E} (e : E) :monadS Regs A E := (*val try_catchS : forall 'regs 'a 'e1 'e2. monadS 'regs 'a 'e1 -> ('e1 -> monadS 'regs 'a 'e2) -> monadS 'regs 'a 'e2*) Definition try_catchS {Regs A E1 E2} (m : monadS Regs A E1) (h : E1 -> monadS Regs A E2) : monadS Regs A E2 := fun s => - List.concat (List.map (fun v => match v with + List.flat_map (fun v => match v with | (Value a, s') => returnS a s' | (Ex (Throw e), s') => h e s' | (Ex (Failure msg), s') => [(Ex (Failure msg), s')] - end) (m s)). + end) (m s). (*val assert_expS : forall 'regs 'e. bool -> string -> monadS 'regs unit 'e*) Definition assert_expS {Regs E} (exp : bool) (msg : string) : monadS Regs unit E := @@ -146,7 +148,7 @@ end. (*val read_tagS : forall 'regs 'a 'e. Bitvector 'a => 'a -> monadS 'regs bitU 'e*) Definition read_tagS {Regs A E} (addr : mword A) : monadS Regs bitU E := let addr := Word.wordToNat (get_word addr) in - readS (fun s => opt_def B0 (NatMap.find addr s.(tagstate))). + readS (fun s => opt_def B0 (NatMap.find addr s.(ss_tagstate))). Fixpoint genlist_acc {A:Type} (f : nat -> A) n acc : list A := match n with @@ -160,8 +162,8 @@ Definition genlist {A} f n := @genlist_acc A f n []. (*val get_mem_bytes : forall 'regs. nat -> nat -> sequential_state 'regs -> maybe (list memory_byte * bitU)*) Definition get_mem_bytes {Regs} addr sz (s : sequential_state Regs) : option (list memory_byte * bitU) := let addrs := genlist (fun n => addr + n)%nat sz in - let read_byte s addr := NatMap.find addr s.(memstate) in - let read_tag s addr := opt_def B0 (NatMap.find addr s.(tagstate)) in + let read_byte s addr := NatMap.find addr s.(ss_memstate) in + let read_tag s addr := opt_def B0 (NatMap.find addr s.(ss_tagstate)) in option_map (fun mem_val => (mem_val, List.fold_left and_bit (List.map (read_tag s) addrs) B1)) (just_list (List.map (read_byte s) addrs)). @@ -203,9 +205,9 @@ Definition put_mem_bytes {Regs} addr sz (v : list memory_byte) (tag : bitU) (s : let a_v := List.combine addrs v in let write_byte mem '(addr, v) := NatMap.add addr v mem in let write_tag mem addr := NatMap.add addr tag mem in - {| regstate := s.(regstate); - memstate := List.fold_left write_byte a_v s.(memstate); - tagstate := List.fold_left write_tag addrs s.(tagstate) |}. + {| ss_regstate := s.(ss_regstate); + ss_memstate := List.fold_left write_byte a_v s.(ss_memstate); + ss_tagstate := List.fold_left write_tag addrs s.(ss_tagstate) |}. (*val write_memt_bytesS : forall 'regs 'e. write_kind -> nat -> nat -> list memory_byte -> bitU -> monadS 'regs bool 'e*) Definition write_memt_bytesS {Regs E} (_ : write_kind) addr sz (v : list memory_byte) (t : bitU) : monadS Regs bool E := @@ -231,7 +233,7 @@ Definition write_memS {Regs E A B} wk (addr : mword A) sz (v : mword B) : monadS (*val read_regS : forall 'regs 'rv 'a 'e. register_ref 'regs 'rv 'a -> monadS 'regs 'a 'e*) Definition read_regS {Regs RV A E} (reg : register_ref Regs RV A) : monadS Regs A E := - readS (fun s => reg.(read_from) s.(regstate)). + readS (fun s => reg.(read_from) s.(ss_regstate)). (* TODO let read_reg_range reg i j state = @@ -251,7 +253,7 @@ let read_reg_bitfield reg regfield = register_accessors 'regs 'rv -> string -> monadS 'regs 'rv 'e*) Definition read_regvalS {Regs RV E} (acc : register_accessors Regs RV) reg : monadS Regs RV E := let '(read, _) := acc in - readS (fun s => read reg s.(regstate)) >>$= (fun v => match v with + readS (fun s => read reg s.(ss_regstate)) >>$= (fun v => match v with | Some v => returnS v | None => failS ("read_regvalS " ++ reg) end). @@ -260,14 +262,14 @@ Definition read_regvalS {Regs RV E} (acc : register_accessors Regs RV) reg : mon register_accessors 'regs 'rv -> string -> 'rv -> monadS 'regs unit 'e*) Definition write_regvalS {Regs RV E} (acc : register_accessors Regs RV) reg (v : RV) : monadS Regs unit E := let '(_, write) := acc in - readS (fun s => write reg v s.(regstate)) >>$= (fun x => match x with - | Some rs' => updateS (fun s => {| regstate := rs'; memstate := s.(memstate); tagstate := s.(tagstate) |}) + readS (fun s => write reg v s.(ss_regstate)) >>$= (fun x => match x with + | Some rs' => updateS (fun s => {| ss_regstate := rs'; ss_memstate := s.(ss_memstate); ss_tagstate := s.(ss_tagstate) |}) | None => failS ("write_regvalS " ++ reg) end). (*val write_regS : forall 'regs 'rv 'a 'e. register_ref 'regs 'rv 'a -> 'a -> monadS 'regs unit 'e*) Definition write_regS {Regs RV A E} (reg : register_ref Regs RV A) (v:A) : monadS Regs unit E := - updateS (fun s => {| regstate := reg.(write_to) v s.(regstate); memstate := s.(memstate); tagstate := s.(tagstate) |}). + updateS (fun s => {| ss_regstate := reg.(write_to) v s.(ss_regstate); ss_memstate := s.(ss_memstate); ss_tagstate := s.(ss_tagstate) |}). (* TODO val update_reg : forall 'regs 'rv 'a 'b 'e. register_ref 'regs 'rv 'a -> ('a -> 'b -> 'a) -> 'b -> monadS 'regs unit 'e diff --git a/prover_snapshots/coq/lib/sail/Sail2_state_monad_lemmas.v b/prover_snapshots/coq/lib/sail/Sail2_state_monad_lemmas.v new file mode 100644 index 0000000..99fef32 --- /dev/null +++ b/prover_snapshots/coq/lib/sail/Sail2_state_monad_lemmas.v @@ -0,0 +1,542 @@ +Require Import Sail2_state_monad. +(*Require Import Sail2_values_lemmas.*) +Require Export Setoid. +Require Export Morphisms Equivalence. + +(* Ensure that pointwise equality on states is the preferred notion of + equivalence for the state monad. *) +Local Open Scope equiv_scope. +Instance monadS_equivalence {Regs A E} : + Equivalence (pointwise_relation (sequential_state Regs) (@eq (list (result A E * sequential_state Regs)))) | 9. +split; apply _. +Qed. + +Global Instance refl_eq_subrelation {A : Type} {R : A -> A -> Prop} `{Reflexive A R} : subrelation eq R. +intros x y EQ. subst. reflexivity. +Qed. + +Hint Extern 4 (_ === _) => reflexivity. +Hint Extern 4 (_ === _) => symmetry. + +Lemma bindS_ext_cong (*[fundef_cong]:*) {Regs A B E} + {m1 m2 : monadS Regs A E} {f1 f2 : A -> monadS Regs B E} s : + m1 s = m2 s -> + (forall a s', List.In (Value a, s') (m2 s) -> f1 a s' = f2 a s') -> + bindS m1 f1 s = bindS m2 f2 s. +intros. +unfold bindS. +rewrite H. +rewrite !List.flat_map_concat_map. +f_equal. +apply List.map_ext_in. +intros [[a|a] s'] H_in; auto. +Qed. + +(* Weaker than the Isabelle version, but avoids talking about individual states *) +Lemma bindS_cong (*[fundef_cong]:*) Regs A B E m1 m2 (f1 f2 : A -> monadS Regs B E) : + m1 === m2 -> + (forall a, f1 a === f2 a) -> + bindS m1 f1 === bindS m2 f2. +intros M F s. +apply bindS_ext_cong; intros; auto. +apply F. +Qed. + +Add Parametric Morphism {Regs A B E : Type} : (@bindS Regs A B E) + with signature equiv ==> equiv ==> equiv as bindS_morphism. +auto using bindS_cong. +Qed. + +Lemma bindS_returnS_left Regs A B E {x : A} {f : A -> monadS Regs B E} : + bindS (returnS x) f === f x. +intro s. +unfold returnS, bindS. +simpl. +auto using List.app_nil_r. +Qed. +Hint Rewrite bindS_returnS_left : state. + +Lemma bindS_returnS_right Regs A E {m : monadS Regs A E} : + bindS m returnS === m. +intro s. +unfold returnS, bindS. +induction (m s) as [|[[a|a] s'] t]; auto; +simpl; +rewrite IHt; +reflexivity. +Qed. +Hint Rewrite bindS_returnS_right : state. + +Lemma bindS_readS {Regs A E} {f} {m : A -> monadS Regs A E} {s} : + bindS (readS f) m s = m (f s) s. +unfold readS, bindS. +simpl. +rewrite List.app_nil_r. +reflexivity. +Qed. + +Lemma bindS_updateS {Regs A E} {f : sequential_state Regs -> sequential_state Regs} {m : unit -> monadS Regs A E} {s} : + bindS (updateS f) m s = m tt (f s). +unfold updateS, bindS. +simpl. +auto using List.app_nil_r. +Qed. + +Lemma bindS_assertS_true Regs A E msg {f : unit -> monadS Regs A E} : + bindS (assert_expS true msg) f === f tt. +intro s. +unfold assert_expS, bindS. +simpl. +auto using List.app_nil_r. +Qed. +Hint Rewrite bindS_assertS_true : state. + +Lemma bindS_chooseS_returnS (*[simp]:*) Regs A B E {xs : list A} {f : A -> B} : + bindS (Regs := Regs) (E := E) (chooseS xs) (fun x => returnS (f x)) === chooseS (List.map f xs). +intro s. +unfold chooseS, bindS, returnS. +induction xs; auto. +simpl. rewrite IHxs. +reflexivity. +Qed. +Hint Rewrite bindS_chooseS_returnS : state. + +Lemma result_cases : forall (A E : Type) (P : result A E -> Prop), + (forall a, P (Value a)) -> + (forall e, P (Ex (Throw e))) -> + (forall msg, P (Ex (Failure msg))) -> + forall r, P r. +intros. +destruct r; auto. +destruct e; auto. +Qed. + +Lemma result_state_cases {A E S} {P : result A E * S -> Prop} : + (forall a s, P (Value a, s)) -> + (forall e s, P (Ex (Throw e), s)) -> + (forall msg s, P (Ex (Failure msg), s)) -> + forall rs, P rs. +intros. +destruct rs as [[a|[e|msg]] s]; auto. +Qed. + +(* TODO: needs sets, not lists +Lemma monadS_ext_eqI {Regs A E} {m m' : monadS Regs A E} s : + (forall a s', List.In (Value a, s') (m s) <-> List.In (Value a, s') (m' s)) -> + (forall e s', List.In (Ex (Throw e), s') (m s) <-> List.In (Ex (Throw e), s') (m' s)) -> + (forall msg s', List.In (Ex (Failure msg), s') (m s) <-> List.In (Ex (Failure msg), s') (m' s)) -> + m s = m' s. +proof (intro set_eqI) + fix x + show "x \<in> m s \<longleftrightarrow> x \<in> m' s" using assms by (cases x rule: result_state_cases) auto +qed + +lemma monadS_eqI: + fixes m m' :: "('regs, 'a, 'e) monadS" + assumes "\<And>s a s'. (Value a, s') \<in> m s \<longleftrightarrow> (Value a, s') \<in> m' s" + and "\<And>s e s'. (Ex (Throw e), s') \<in> m s \<longleftrightarrow> (Ex (Throw e), s') \<in> m' s" + and "\<And>s msg s'. (Ex (Failure msg), s') \<in> m s \<longleftrightarrow> (Ex (Failure msg), s') \<in> m' s" + shows "m = m'" + using assms by (intro ext monadS_ext_eqI) +*) + +Lemma bindS_cases {Regs A B E} {m} {f : A -> monadS Regs B E} {r s s'} : + List.In (r, s') (bindS m f s) -> + (exists a a' s'', r = Value a /\ List.In (Value a', s'') (m s) /\ List.In (Value a, s') (f a' s'')) \/ + (exists e, r = Ex e /\ List.In (Ex e, s') (m s)) \/ + (exists e a s'', r = Ex e /\ List.In (Value a, s'') (m s) /\ List.In (Ex e, s') (f a s'')). +unfold bindS. +intro IN. +apply List.in_flat_map in IN. +destruct IN as [[r' s''] [INr' INr]]. +destruct r' as [a'|e']. +* destruct r as [a|e]. + + left. eauto 10. + + right; right. eauto 10. +* right; left. simpl in INr. destruct INr as [|[]]. inversion H. subst. eauto 10. +Qed. + +Lemma bindS_intro_Value {Regs A B E} {m} {f : A -> monadS Regs B E} {s a s' a' s''} : + List.In (Value a', s'') (m s) -> List.In (Value a, s') (f a' s'') -> List.In (Value a, s') (bindS m f s). +intros; unfold bindS. +apply List.in_flat_map. +eauto. +Qed. +Lemma bindS_intro_Ex_left {Regs A B E} {m} {f : A -> monadS Regs B E} {s e s'} : + List.In (Ex e, s') (m s) -> List.In (Ex e, s') (bindS m f s). +intros; unfold bindS. +apply List.in_flat_map. +exists (Ex e, s'). +auto with datatypes. +Qed. +Lemma bindS_intro_Ex_right {Regs A B E} {m} {f : A -> monadS Regs B E} {s e s' a s''} : + List.In (Ex e, s') (f a s'') -> List.In (Value a, s'') (m s) -> List.In (Ex e, s') (bindS m f s). +intros; unfold bindS. +apply List.in_flat_map. +eauto. +Qed. +Hint Resolve bindS_intro_Value bindS_intro_Ex_left bindS_intro_Ex_right : bindS_intros. + +Lemma bindS_assoc Regs A B C E {m} {f : A -> monadS Regs B E} {g : B -> monadS Regs C E} : + bindS (bindS m f) g === bindS m (fun x => bindS (f x) g). +intro s. +unfold bindS. +induction (m s) as [ | [[a | e] t]]. +* reflexivity. +* simpl. rewrite <- IHl. + rewrite !List.flat_map_concat_map. + rewrite List.map_app. + rewrite List.concat_app. + reflexivity. +* simpl. rewrite IHl. reflexivity. +Qed. +Hint Rewrite bindS_assoc : state. + +Lemma bindS_failS Regs A B E {msg} {f : A -> monadS Regs B E} : + bindS (failS msg) f = failS msg. +reflexivity. +Qed. +Hint Rewrite bindS_failS : state. + +Lemma bindS_throwS Regs A B E {e} {f : A -> monadS Regs B E} : + bindS (throwS e) f = throwS e. +reflexivity. +Qed. +Hint Rewrite bindS_throwS : state. + +(*declare seqS_def[simp]*) +Lemma seqS_def Regs A E m (m' : monadS Regs A E) : + m >>$ m' = m >>$= (fun _ => m'). +reflexivity. +Qed. +Hint Rewrite seqS_def : state. + +Lemma Value_bindS_elim {Regs A B E} {a m} {f : A -> monadS Regs B E} {s s'} : + List.In (Value a, s') (bindS m f s) -> + exists s'' a', List.In (Value a', s'') (m s) /\ List.In (Value a, s') (f a' s''). +intro H. +apply bindS_cases in H. +destruct H as [(a0 & a' & s'' & [= <-] & [*]) | [(e & [= ] & _) | (_ & _ & _ & [= ] & _)]]. +eauto. +Qed. + +Lemma Ex_bindS_elim {Regs A B E} {e m s s'} {f : A -> monadS Regs B E} : + List.In (Ex e, s') (bindS m f s) -> + List.In (Ex e, s') (m s) \/ + exists s'' a', List.In (Value a', s'') (m s) /\ List.In (Ex e, s') (f a' s''). +intro H. +apply bindS_cases in H. +destruct H as [(? & ? & ? & [= ] & _) | [(? & [= <-] & X) | (? & ? & ? & [= <-] & X)]]; +eauto. +Qed. + +Lemma try_catchS_returnS Regs A E1 E2 {a} {h : E1 -> monadS Regs A E2}: + try_catchS (returnS a) h = returnS a. +reflexivity. +Qed. +Hint Rewrite try_catchS_returnS : state. +Lemma try_catchS_failS Regs A E1 E2 {msg} {h : E1 -> monadS Regs A E2}: + try_catchS (failS msg) h = failS msg. +reflexivity. +Qed. +Hint Rewrite try_catchS_failS : state. +Lemma try_catchS_throwS Regs A E1 E2 {e} {h : E1 -> monadS Regs A E2}: + try_catchS (throwS e) h === h e. +intro s. +unfold try_catchS, throwS. +simpl. +auto using List.app_nil_r. +Qed. +Hint Rewrite try_catchS_throwS : state. + +Lemma try_catchS_cong (*[cong]:*) {Regs A E1 E2 m1 m2} {h1 h2 : E1 -> monadS Regs A E2} : + m1 === m2 -> + (forall e, h1 e === h2 e) -> + try_catchS m1 h1 === try_catchS m2 h2. +intros H1 H2 s. +unfold try_catchS. +rewrite H1. +rewrite !List.flat_map_concat_map. +f_equal. +apply List.map_ext_in. +intros [[a|[e|msg]] s'] H_in; auto. apply H2. +Qed. + +Add Parametric Morphism {Regs A E1 E2 : Type} : (@try_catchS Regs A E1 E2) + with signature equiv ==> equiv ==> equiv as try_catchS_morphism. +intros. auto using try_catchS_cong. +Qed. + +Add Parametric Morphism {Regs A E : Type} : (@catch_early_returnS Regs A E) + with signature equiv ==> equiv as catch_early_returnS_morphism. +intros. +unfold catch_early_returnS. +rewrite H. +reflexivity. +Qed. + +Lemma try_catchS_cases {Regs A E1 E2 m} {h : E1 -> monadS Regs A E2} {r s s'} : + List.In (r, s') (try_catchS m h s) -> + (exists a, r = Value a /\ List.In (Value a, s') (m s)) \/ + (exists msg, r = Ex (Failure msg) /\ List.In (Ex (Failure msg), s') (m s)) \/ + (exists e s'', List.In (Ex (Throw e), s'') (m s) /\ List.In (r, s') (h e s'')). +unfold try_catchS. +intro IN. +apply List.in_flat_map in IN. +destruct IN as [[r' s''] [INr' INr]]. +destruct r' as [a'|[e'|msg]]. +* left. simpl in INr. destruct INr as [[= <- <-] | []]. eauto 10. +* simpl in INr. destruct INr as [[= <- <-] | []]. eauto 10. +* eauto 10. +Qed. + +Lemma try_catchS_intros {Regs A E1 E2} {m} {h : E1 -> monadS Regs A E2} : + (forall s a s', List.In (Value a, s') (m s) -> List.In (Value a, s') (try_catchS m h s)) /\ + (forall s msg s', List.In (Ex (Failure msg), s') (m s) -> List.In (Ex (Failure msg), s') (try_catchS m h s)) /\ + (forall s e s'' r s', List.In (Ex (Throw e), s'') (m s) -> List.In (r, s') (h e s'') -> List.In (r, s') (try_catchS m h s)). +repeat split; unfold try_catchS; intros; +apply List.in_flat_map. +* eexists; split; [ apply H | ]. simpl. auto. +* eexists; split; [ apply H | ]. simpl. auto. +* eexists; split; [ apply H | ]. simpl. auto. +Qed. + +Lemma no_Ex_basic_builtins (*[simp]:*) {Regs E} {s s' : sequential_state Regs} {e : ex E} : + (forall A (a:A), ~ List.In (Ex e, s') (returnS a s)) /\ + (forall A (f : _ -> A), ~ List.In (Ex e, s') (readS f s)) /\ + (forall f, ~ List.In (Ex e, s') (updateS f s)) /\ + (forall A (xs : list A), ~ List.In (Ex e, s') (chooseS xs s)). +repeat split; intros; +unfold returnS, readS, updateS, chooseS; simpl; +try intuition congruence. +* intro H. + apply List.in_map_iff in H. + destruct H as [x [X _]]. + congruence. +Qed. + +Import List.ListNotations. +Definition ignore_throw_aux {A E1 E2 S} (rs : result A E1 * S) : list (result A E2 * S) := +match rs with +| (Value a, s') => [(Value a, s')] +| (Ex (Throw e), s') => [] +| (Ex (Failure msg), s') => [(Ex (Failure msg), s')] +end. +Definition ignore_throw {A E1 E2 S} (m : S -> list (result A E1 * S)) s : list (result A E2 * S) := + List.flat_map ignore_throw_aux (m s). + +Lemma ignore_throw_cong {Regs A E1 E2} {m1 m2 : monadS Regs A E1} : + m1 === m2 -> + ignore_throw (E2 := E2) m1 === ignore_throw m2. +intros H s. +unfold ignore_throw. +rewrite H. +reflexivity. +Qed. + +Lemma ignore_throw_aux_member_simps (*[simp]:*) {A E1 E2 S} {s' : S} {ms} : + (forall a:A, List.In (Value a, s') (ignore_throw_aux (E1 := E1) (E2 := E2) ms) <-> ms = (Value a, s')) /\ + (forall e, ~ List.In (Ex (E := E2) (Throw e), s') (ignore_throw_aux ms)) /\ + (forall msg, List.In (Ex (E := E2) (Failure msg), s') (ignore_throw_aux ms) <-> ms = (Ex (Failure msg), s')). +destruct ms as [[a' | [e' | msg']] s]; simpl; +intuition congruence. +Qed. + +Lemma ignore_throw_member_simps (*[simp]:*) {A E1 E2 S} {s s' : S} {m} : + (forall {a:A}, List.In (Value (E := E2) a, s') (ignore_throw m s) <-> List.In (Value (E := E1) a, s') (m s)) /\ + (forall {a:A}, List.In (Value (E := E2) a, s') (ignore_throw m s) <-> List.In (Value a, s') (m s)) /\ + (forall e, ~ List.In (Ex (E := E2) (Throw e), s') (ignore_throw m s)) /\ + (forall {msg}, List.In (Ex (E := E2) (Failure msg), s') (ignore_throw m s) <-> List.In (Ex (Failure msg), s') (m s)). +unfold ignore_throw. +repeat apply conj; intros; try apply conj; +rewrite ?List.in_flat_map; +solve +[ intros [x [H1 H2]]; apply ignore_throw_aux_member_simps in H2; congruence +| intro H; eexists; split; [ apply H | apply ignore_throw_aux_member_simps; reflexivity] ]. +Qed. + +Lemma ignore_throw_cases {A E S} {m : S -> list (result A E * S)} {r s s'} : + ignore_throw m s = m s -> + List.In (r, s') (m s) -> + (exists a, r = Value a) \/ + (exists msg, r = Ex (Failure msg)). +destruct r as [a | [e | msg]]; eauto. +* intros H1 H2. rewrite <- H1 in H2. + apply ignore_throw_member_simps in H2. + destruct H2. +Qed. + +(* *** *) +Lemma flat_map_app {A B} {f : A -> list B} {l1 l2} : + List.flat_map f (l1 ++ l2) = (List.flat_map f l1 ++ List.flat_map f l2)%list. +rewrite !List.flat_map_concat_map. +rewrite List.map_app, List.concat_app. +reflexivity. +Qed. + +Lemma ignore_throw_bindS (*[simp]:*) Regs A B E E2 {m} {f : A -> monadS Regs B E} : + ignore_throw (E2 := E2) (bindS m f) === bindS (ignore_throw m) (fun s => ignore_throw (f s)). +intro s. +unfold bindS, ignore_throw. +induction (m s) as [ | [[a | [e | msg]] t]]. +* reflexivity. +* simpl. rewrite <- IHl. rewrite flat_map_app. reflexivity. +* simpl. rewrite <- IHl. reflexivity. +* simpl. apply IHl. +Qed. +Hint Rewrite ignore_throw_bindS : ignore_throw. + +Lemma try_catchS_bindS_no_throw {Regs A B E1 E2} {m1 : monadS Regs A E1} {m2 : monadS Regs A E2} {f : A -> monadS Regs B _} {h} : + ignore_throw m1 === m1 -> + ignore_throw m1 === m2 -> + try_catchS (bindS m1 f) h === bindS m2 (fun a => try_catchS (f a) h). +intros Ignore1 Ignore2. +transitivity ((ignore_throw m1 >>$= (fun a => try_catchS (f a) h))). +* intro s. + unfold bindS, try_catchS, ignore_throw. + specialize (Ignore1 s). revert Ignore1. unfold ignore_throw. + induction (m1 s) as [ | [[a | [e | msg]] t]]; auto. + + intro Ig. simpl. rewrite flat_map_app. rewrite IHl. auto. injection Ig. auto. + + intro Ig. simpl. rewrite IHl. reflexivity. injection Ig. auto. + + intro Ig. exfalso. clear -Ig. + assert (List.In (Ex (Throw msg), t) (List.flat_map ignore_throw_aux l)). + simpl in Ig. rewrite Ig. simpl. auto. + apply List.in_flat_map in H. + destruct H as [x [H1 H2]]. + apply ignore_throw_aux_member_simps in H2. + assumption. +* apply bindS_cong; auto. +Qed. + +Lemma concat_map_singleton {A B} {f : A -> B} {a : list A} : + List.concat (List.map (fun x => [f x]%list) a) = List.map f a. +induction a; simpl; try rewrite IHa; auto with datatypes. +Qed. + +(*lemma no_throw_basic_builtins[simp]:*) +Lemma no_throw_basic_builtins_1 Regs A E E2 {a : A} : + ignore_throw (E1 := E2) (returnS a) = @returnS Regs A E a. +reflexivity. Qed. +Lemma no_throw_basic_builtins_2 Regs A E E2 {f : sequential_state Regs -> A} : + ignore_throw (E1 := E) (E2 := E2) (readS f) = readS f. +reflexivity. Qed. +Lemma no_throw_basic_builtins_3 Regs E E2 {f : sequential_state Regs -> sequential_state Regs} : + ignore_throw (E1 := E) (E2 := E2) (updateS f) = updateS f. +reflexivity. Qed. +Lemma no_throw_basic_builtins_4 Regs A E1 E2 {xs : list A} : + ignore_throw (E1 := E1) (chooseS xs) === @chooseS Regs A E2 xs. +intro s. +unfold ignore_throw, chooseS. +rewrite List.flat_map_concat_map, List.map_map. simpl. +rewrite concat_map_singleton. +reflexivity. +Qed. +Lemma no_throw_basic_builtins_5 Regs E1 E2 : + ignore_throw (E1 := E1) (choose_boolS tt) = @choose_boolS Regs E2 tt. +reflexivity. Qed. +Lemma no_throw_basic_builtins_6 Regs A E1 E2 msg : + ignore_throw (E1 := E1) (failS msg) = @failS Regs A E2 msg. +reflexivity. Qed. +Lemma no_throw_basic_builtins_7 Regs A E1 E2 msg x : + ignore_throw (E1 := E1) (maybe_failS msg x) = @maybe_failS Regs A E2 msg x. +destruct x; reflexivity. Qed. + +Hint Rewrite no_throw_basic_builtins_1 no_throw_basic_builtins_2 + no_throw_basic_builtins_3 no_throw_basic_builtins_4 + no_throw_basic_builtins_5 no_throw_basic_builtins_6 + no_throw_basic_builtins_7 : ignore_throw. + +Lemma ignore_throw_option_case_distrib_1 Regs B C E1 E2 (c : sequential_state Regs -> option B) s (n : monadS Regs C E1) (f : B -> monadS Regs C E1) : + ignore_throw (E2 := E2) (match c s with None => n | Some b => f b end) s = + match c s with None => ignore_throw n s | Some b => ignore_throw (f b) s end. +destruct (c s); auto. +Qed. +Lemma ignore_throw_option_case_distrib_2 Regs B C E1 E2 (c : option B) (n : monadS Regs C E1) (f : B -> monadS Regs C E1) : + ignore_throw (E2 := E2) (match c with None => n | Some b => f b end) = + match c with None => ignore_throw n | Some b => ignore_throw (f b) end. +destruct c; auto. +Qed. + +Lemma ignore_throw_let_distrib Regs A B E1 E2 (y : A) (f : A -> monadS Regs B E1) : + ignore_throw (E2 := E2) (let x := y in f x) = (let x := y in ignore_throw (f x)). +reflexivity. +Qed. + +Lemma no_throw_mem_builtins_1 Regs E1 E2 rk a sz : + ignore_throw (E2 := E2) (@read_memt_bytesS Regs E1 rk a sz) === read_memt_bytesS rk a sz. +unfold read_memt_bytesS. autorewrite with ignore_throw. +apply bindS_cong; auto. intros. autorewrite with ignore_throw. reflexivity. +Qed. +Hint Rewrite no_throw_mem_builtins_1 : ignore_throw. +Lemma no_throw_mem_builtins_2 Regs E1 E2 rk a sz : + ignore_throw (E2 := E2) (@read_mem_bytesS Regs E1 rk a sz) === read_mem_bytesS rk a sz. +unfold read_mem_bytesS. autorewrite with ignore_throw. +apply bindS_cong; intros; autorewrite with ignore_throw; auto. +destruct a0; reflexivity. +Qed. +Hint Rewrite no_throw_mem_builtins_2 : ignore_throw. +Lemma no_throw_mem_builtins_3 Regs A E1 E2 a : + ignore_throw (E2 := E2) (@read_tagS Regs A E1 a) === read_tagS a. +reflexivity. Qed. +Hint Rewrite no_throw_mem_builtins_3 : ignore_throw. +Lemma no_throw_mem_builtins_4 Regs A V E1 E2 rk a sz H : + ignore_throw (E2 := E2) (@read_memtS Regs E1 A V rk a sz H) === read_memtS rk a sz. +unfold read_memtS. autorewrite with ignore_throw. +apply bindS_cong; intros; autorewrite with ignore_throw. +reflexivity. destruct a0; simpl. autorewrite with ignore_throw. +reflexivity. +Qed. +Hint Rewrite no_throw_mem_builtins_4 : ignore_throw. +Lemma no_throw_mem_builtins_5 Regs A V E1 E2 rk a sz H : + ignore_throw (E2 := E2) (@read_memS Regs E1 A V rk a sz H) === read_memS rk a sz. +unfold read_memS. autorewrite with ignore_throw. +apply bindS_cong; intros; autorewrite with ignore_throw; auto. +destruct a0; auto. +Qed. +Hint Rewrite no_throw_mem_builtins_5 : ignore_throw. +Lemma no_throw_mem_builtins_6 Regs E1 E2 wk addr sz v t : + ignore_throw (E2 := E2) (@write_memt_bytesS Regs E1 wk addr sz v t) === write_memt_bytesS wk addr sz v t. +unfold write_memt_bytesS. unfold seqS. autorewrite with ignore_throw. +reflexivity. +Qed. +Hint Rewrite no_throw_mem_builtins_6 : ignore_throw. +Lemma no_throw_mem_builtins_7 Regs E1 E2 wk addr sz v : + ignore_throw (E2 := E2) (@write_mem_bytesS Regs E1 wk addr sz v) === write_mem_bytesS wk addr sz v. +unfold write_mem_bytesS. autorewrite with ignore_throw. reflexivity. +Qed. +Hint Rewrite no_throw_mem_builtins_7 : ignore_throw. +Lemma no_throw_mem_builtins_8 Regs E1 E2 A B wk addr sz v t : + ignore_throw (E2 := E2) (@write_memtS Regs E1 A B wk addr sz v t) === write_memtS wk addr sz v t. +unfold write_memtS. rewrite ignore_throw_option_case_distrib_2. +destruct (Sail2_values.mem_bytes_of_bits v); autorewrite with ignore_throw; auto. +Qed. +Hint Rewrite no_throw_mem_builtins_8 : ignore_throw. +Lemma no_throw_mem_builtins_9 Regs E1 E2 A B wk addr sz v : + ignore_throw (E2 := E2) (@write_memS Regs E1 A B wk addr sz v) === write_memS wk addr sz v. +unfold write_memS. autorewrite with ignore_throw; auto. +Qed. +Hint Rewrite no_throw_mem_builtins_9 : ignore_throw. +Lemma no_throw_mem_builtins_10 Regs E1 E2 : + ignore_throw (E2 := E2) (@excl_resultS Regs E1 tt) === excl_resultS tt. +reflexivity. Qed. +Hint Rewrite no_throw_mem_builtins_10 : ignore_throw. +Lemma no_throw_mem_builtins_11 Regs E1 E2 : + ignore_throw (E2 := E2) (@undefined_boolS Regs E1 tt) === undefined_boolS tt. +reflexivity. Qed. +Hint Rewrite no_throw_mem_builtins_11 : ignore_throw. + +Lemma no_throw_read_regvalS Regs RV E1 E2 r reg_name : + ignore_throw (E2 := E2) (@read_regvalS Regs RV E1 r reg_name) === read_regvalS r reg_name. +destruct r; simpl. autorewrite with ignore_throw. +apply bindS_cong; intros; auto. rewrite ignore_throw_option_case_distrib_2. +autorewrite with ignore_throw. reflexivity. +Qed. +Hint Rewrite no_throw_read_regvalS : ignore_throw. + +Lemma no_throw_write_regvalS Regs RV E1 E2 r reg_name v : + ignore_throw (E2 := E2) (@write_regvalS Regs RV E1 r reg_name v) === write_regvalS r reg_name v. +destruct r; simpl. autorewrite with ignore_throw. +apply bindS_cong; intros; auto. rewrite ignore_throw_option_case_distrib_2. +autorewrite with ignore_throw. reflexivity. +Qed. +Hint Rewrite no_throw_write_regvalS : ignore_throw. diff --git a/prover_snapshots/coq/lib/sail/Sail2_values.v b/prover_snapshots/coq/lib/sail/Sail2_values.v index fc97fcc..208f5c8 100644 --- a/prover_snapshots/coq/lib/sail/Sail2_values.v +++ b/prover_snapshots/coq/lib/sail/Sail2_values.v @@ -1704,10 +1704,10 @@ Ltac main_solver := | match goal with |- context [Z.mul] => nia end (* If we have a disjunction from a set constraint on a variable we can often solve a goal by trying them (admittedly this is quite heavy handed...) *) - | subst; + | subst; drop_Z_exists; let aux x := is_var x; - intuition (subst;auto) + intuition (subst;auto with datatypes) in match goal with | _:(@eq Z _ ?x) \/ (@eq Z _ ?x) \/ _ |- context[?x] => aux x @@ -2288,9 +2288,9 @@ Definition negate_range {n m} (l : {l : Z & ArithFact (n <= l <= m)}) : {x : Z & ArithFact ((- m) <= x <= (- n))} := build_ex (- (projT1 l)). -Definition min_atom (a : Z) (b : Z) : {c : Z & ArithFact (c = a \/ c = b /\ c <= a /\ c <= b)} := +Definition min_atom (a : Z) (b : Z) : {c : Z & ArithFact ((c = a \/ c = b) /\ c <= a /\ c <= b)} := build_ex (Z.min a b). -Definition max_atom (a : Z) (b : Z) : {c : Z & ArithFact (c = a \/ c = b /\ c >= a /\ c >= b)} := +Definition max_atom (a : Z) (b : Z) : {c : Z & ArithFact ((c = a \/ c = b) /\ c >= a /\ c >= b)} := build_ex (Z.max a b). |