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authorPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-05-03 13:42:15 -0700
committerPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-05-03 13:42:15 -0700
commit7904e06ebb9106d58bbe026e169b792042a76ddc (patch)
treea46bcea8c16c452f2613a7bbe4299e5cea6bf538
parent860b8675bed29617bae45cdd37026feaea7c84b2 (diff)
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Fix a todo for c.slli on RV32.
-rw-r--r--model/riscv_insts_cext.sail5
1 files changed, 2 insertions, 3 deletions
diff --git a/model/riscv_insts_cext.sail b/model/riscv_insts_cext.sail
index d09a795..27acf7a 100644
--- a/model/riscv_insts_cext.sail
+++ b/model/riscv_insts_cext.sail
@@ -399,11 +399,10 @@ mapping clause assembly = C_BNEZ(imm, rs)
/* ****************************************************************** */
union clause ast = C_SLLI : (bits(6), regbits)
-/* TODO: On RV32, also need shamt[5] == 0 */
mapping clause encdec_compressed = C_SLLI(nzui5 @ nzui40, rsd)
- if nzui5 @ nzui40 != 0b000000 & rsd != zreg
+ if nzui5 @ nzui40 != 0b000000 & rsd != zreg & (sizeof(xlen) == 64 | nzui5 == false)
<-> 0b000 @ nzui5 : bits(1) @ rsd : regbits @ nzui40 : bits(5) @ 0b10
- if nzui5 @ nzui40 != 0b000000 & rsd != zreg
+ if nzui5 @ nzui40 != 0b000000 & rsd != zreg & (sizeof(xlen) == 64 | nzui5 == false)
function clause execute (C_SLLI(shamt, rsd)) =
execute(SHIFTIOP(shamt, rsd, rsd, RISCV_SLLI))