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if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME pic32mx
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# force an error till we get a good number
set _CPUTAPID 0x30938053
}
# default working area is 16384
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x4000
}
jtag_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config srst_only
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
#
# At reset the pic32mx does not allow code execution from RAM
# we have to setup the BMX registers to allow this.
# One limitation is that we loose the first 2k of RAM.
#
global _PIC32MX_DATASIZE
global _PIC32MX_PROGSIZE
set _PIC32MX_DATASIZE 0x800
set _PIC32MX_PROGSIZE [expr ($_WORKAREASIZE - $_PIC32MX_DATASIZE)]
$_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size $_PIC32MX_PROGSIZE -work-area-backup 0
$_TARGETNAME configure -event reset-init {
#
# from reset the pic32 cannot execute code in ram - enable ram execution
# minimum offset from start of ram is 2k
#
global _PIC32MX_DATASIZE
global _PIC32MX_PROGSIZE
# BMXCON
mww 0xbf882000 0x001f0040
# BMXDKPBA: 2k kernel data @ 0xa0000800
mww 0xbf882010 $_PIC32MX_DATASIZE
# BMXDUDBA: 16k kernel program @ 0xa0000800
mww 0xbf882020 $_PIC32MX_PROGSIZE
# BMXDUPBA: 0k user program
mww 0xbf882030 $_PIC32MX_PROGSIZE
}
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME pic32mx 0x1fc00000 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME pic32mx 0x1d000000 0 0 0 $_TARGETNAME
# For more information about the configuration files, take a look at:
# openocd.texi
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