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#
# Texas Instruments XDS100v2
#
# http://processors.wiki.ti.com/index.php/XDS100#XDS100v2_Features
#
# Detailed documentation is available only as CPLD verilog source code
# to the registered TI users.
#
interface ftdi
ftdi_vid_pid 0x0403 0xa6d0 0x0403 0x6010
ftdi_layout_init 0x0038 0x597b
# 8000 z - unused
# 4000 0 > CPLD loopback (all target side pins high-Z)
# 2000 z < !( cable connected ) (open drain on CPLD side for $reasons)
# 1000 0 > EMU1_oe
#
# 800 0 > PWR_RST = clear power-loss flag on rising edge
# 400 z < !( power-loss flag )
# 200 z < nSRST
# 100 0 > nSRST_oe
#
# 80 z < RTCK
# 40 0 > EMU0_oe
# 20 1 > EMU_EN
# 10 1 > nTRST
#
# 8 1 > TMS
# 4 z < TDO
# 2 0 > TDI
# 1 0 > TCK
#
# As long as the power-loss flag is set, all target-side pins are
# high-Z except the EMU-pins for which the opposite holds unless
# EMU_EN is high.
#
# To use wait-in-reset, drive EMU0 low at power-on reset. If the
# target normally reuses EMU0 for other purposes, clear EMU_EN to
# keep the EMU pins high-Z until the target is power-cycled.
#
# The LED only turns off at USB suspend, which is also the only way to
# set the power-loss flag manually. (Can be done in software e.g. by
# changing the USB configuration to zero.)
#
ftdi_layout_signal nTRST -data 0x0010
ftdi_layout_signal nSRST -oe 0x0100
ftdi_layout_signal EMU_EN -data 0x0020
ftdi_layout_signal EMU0 -oe 0x0040
ftdi_layout_signal EMU1 -oe 0x1000
ftdi_layout_signal PWR_RST -data 0x0800
ftdi_layout_signal LOOPBACK -data 0x4000
echo "\nInfo : to use this adapter you MUST add ``init; ftdi_set_signal PWR_RST 1; jtag arp_init'' to the end of your config file!\n"
# note: rising edge on PWR_RST is also needed after power-cycling the
# target
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