From 0c8ec7c826c60391034fe5f0ea90f8538ac94b38 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sat, 14 May 2016 20:21:49 +0200 Subject: Fix spelling of ARM Cortex MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn or CortexXn. Further it's Cortex-M0+, not M0plus. Cf. http://www.arm.com/products/processors/index.php Consistently write it the official way, so that it stops propagating. Originally spotted in the documentation, it mainly affects code comments but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output. Found via: git grep -i "Cortex " git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu" git grep -i "CortexM" Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914 Signed-off-by: Andreas Färber Reviewed-on: http://openocd.zylin.com/3483 Tested-by: jenkins Reviewed-by: Marc Schink Reviewed-by: Andreas Fritiofson --- tcl/target/imx51.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'tcl/target/imx51.cfg') diff --git a/tcl/target/imx51.cfg b/tcl/target/imx51.cfg index 15d5c04..b143aad 100644 --- a/tcl/target/imx51.cfg +++ b/tcl/target/imx51.cfg @@ -40,7 +40,7 @@ jtag configure $_CHIPNAME.SJC -event post-reset "runtest 100" jtag configure $_CHIPNAME.SJC -event setup "jtag tapenable $_CHIPNAME.DAP" proc imx51_dbginit {target} { - # General Cortex A8 debug initialisation + # General Cortex-A8 debug initialisation cortex_a dbginit } -- cgit v1.1