From 1be7163408cc6420d85bf990a2dae46c559a12b1 Mon Sep 17 00:00:00 2001 From: Drasko DRASKOVIC Date: Thu, 7 Jul 2011 17:41:20 +0200 Subject: mips32: Added CP0 coprocessor R/W routines This patch adds MIPS32 CP0 coprocessor R/W routines, as well as adequate commands to use these routines via telnet interface. Now is becomes possible to affect CP0 internal registers and configure CPU directly from OpenOCD. --- src/target/mips32.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/target/mips32.h') diff --git a/src/target/mips32.h b/src/target/mips32.h index 4f0f0ef..8b21b0a 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -4,6 +4,9 @@ * * * Copyright (C) 2008 by David T.L. Wong * * * + * Copyright (C) 2011 by Drasko DRASKOVIC * + * drasko.draskovic@gmail.com * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -149,6 +152,8 @@ struct mips32_algorithm #define MIPS32_SDBBP 0x7000003F #define MIPS16_SDBBP 0xE801 +extern const struct command_registration mips32_command_handlers[]; + int mips32_arch_state(struct target *target); int mips32_init_arch_info(struct target *target, -- cgit v1.1