From 6f88aa0fb3bb7a91b5327b75e8fb772ed6d3be2d Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Fri, 22 May 2020 18:55:34 +0200 Subject: target/cortex_a: fix memory leak of register cache There is no method to free the register cache, allocated in armv4_5, so we get a memory leak. Issue identified by valgrind. Implement the method arm_free_reg_cache() and call it in cortex_a deinit and to exit for error during arm_dpm_setup(). Tested on dual cortex-A stm32mp15x. This change is inspired from similar fix in commit b01b5fe13a67 ("armv7m: Fix memory leak in register caching."). The same allocation is also used by target types "arm7tdmi", "arm9tdmi", "arm11" and "xscale" but they all lack the deinit method and I do not have relevant HW to test the fix. For such reasons they are not addressed in this patch. Change-Id: I4da1e1f12e36ec245d1f3b11a4eafcbd9a1d2e25 Signed-off-by: Antonio Borneo Reviewed-on: http://openocd.zylin.com/5693 Tested-by: jenkins --- src/target/arm.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/target/arm.h') diff --git a/src/target/arm.h b/src/target/arm.h index b399574..3450260 100644 --- a/src/target/arm.h +++ b/src/target/arm.h @@ -272,6 +272,8 @@ struct arm_reg { }; struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm); +void arm_free_reg_cache(struct arm *arm); + struct reg_cache *armv8_build_reg_cache(struct target *target); extern const struct command_registration arm_command_handlers[]; -- cgit v1.1