From 29a57545f6be5ca3ba31f46447b5226b0f604ea0 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Thu, 14 Jul 2022 16:37:54 -0500 Subject: jtag/drivers: Add dmem driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Direct memory driver support for CoreSight Access Port(AP). Even though we emulate SWD (serial wire debug), we aren't actually using swd. Instead, we are using a direct memory access to get to the register set. This is similar in approach to other fast access native drivers such as am335xgpio drivers. Example operation on Texas Instrument's AM62x K3 SoC: +-----------+ | OpenOCD | SoC mem map | on |--------------+ | Cortex-A53| | +-----------+ | | +-----------+ +-----v-----+ |Cortex-M4F |<───────| | +-----------+ | | | DebugSS | +-----------+ | | |Cortex-M4F |<───────| | +-----------+ +-----------+ Signed-off-by: Nishanth Menon Signed-off-by: Jason Peck Change-Id: I8470cb15348863dd844b2c0e3f63a9063cb032c6 Reviewed-on: https://review.openocd.org/c/openocd/+/7088 Tested-by: jenkins Reviewed-by: Antonio Borneo --- doc/openocd.texi | 60 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) (limited to 'doc/openocd.texi') diff --git a/doc/openocd.texi b/doc/openocd.texi index 3348e47..6f16c9f 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -3568,6 +3568,66 @@ espusbjtag chip_id 1 @end deffn +@deffn {Interface Driver} {dmem} Direct Memory access debug interface + +The Texas Instruments K3 SoC family provides memory access to DAP +and coresight control registers. This allows control over the +microcontrollers directly from one of the processors on the SOC +itself. + +For maximum performance, the driver accesses the debug registers +directly over the SoC memory map. The memory mapping requires read +and write permission to kernel memory via "/dev/mem" and assumes that +the system firewall configurations permit direct access to the debug +memory space. + +@verbatim ++-----------+ +| OpenOCD | SoC mem map (/dev/mem) +| on +--------------+ +| Cortex-A53| | ++-----------+ | + | ++-----------+ +-----v-----+ +|Cortex-M4F <--------+ | ++-----------+ | | + | DebugSS | ++-----------+ | | +|Cortex-M4F <--------+ | ++-----------+ +-----------+ +@end verbatim + +NOTE: Firewalls are configurable in K3 SoC and depending on various types of +device configuration, this function may be blocked out. Typical behavior +observed in such cases is a firewall exception report on the security +controller and armv8 processor reporting a system error. + +See @file{tcl/interface/ti_k3_am625-swd-native.cfg} for a sample configuration +file. + +@deffn {Command} {dmem info} +Print the DAPBUS dmem configuration. +@end deffn + +@deffn {Config Command} {dmem device} device_path +Set the DAPBUS memory access device (default: /dev/mem). +@end deffn + +@deffn {Config Command} {dmem base_address} base_address +Set the DAPBUS base address which is used to access CoreSight +compliant Access Ports (APs) directly. +@end deffn + +@deffn {Config Command} {dmem ap_address_offset} offset_address +Set the address offset between Access Ports (APs). +@end deffn + +@deffn {Config Command} {dmem max_aps} n +Set the maximum number of valid access ports on the SoC. +@end deffn + +@end deffn + @section Transport Configuration @cindex Transport As noted earlier, depending on the version of OpenOCD you use, -- cgit v1.1 From 42872d18bf1326294521096b73314e54a31b0b60 Mon Sep 17 00:00:00 2001 From: Jason Peck Date: Mon, 18 Jul 2022 13:45:05 -0500 Subject: jtag/drivers: dmem: Add Emulated AP mode This emulation mode supports software translation of an AP request into an address mapped transaction that does not rely on physical AP hardware. This is necessary in some hardware such as K3 SoCs since the hardware architecture anticipates a potential race condition between AP doing direct memory access generating transactions back to system bus and firewalls that data path out. This emulation mode allows direct memory driver to emulate CoreSight Access Port (AP) and reuse the SoC configuration meant for JTAG debuggers. Since the address ranges are flat in nature, the requisite memory base and size will need to be provided a-priori to the driver for mapping. The other design alternative would be to map requested memory map for every register operation, but, that would defeat our intent of getting max debug performance. Signed-off-by: Nishanth Menon Signed-off-by: Jason Peck Change-Id: I2d3c5f7833f1973e90b4f6b247827f62fc2905d0 Reviewed-on: https://review.openocd.org/c/openocd/+/7089 Tested-by: jenkins Reviewed-by: Antonio Borneo --- doc/openocd.texi | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'doc/openocd.texi') diff --git a/doc/openocd.texi b/doc/openocd.texi index 6f16c9f..d07188c 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -3626,6 +3626,19 @@ Set the address offset between Access Ports (APs). Set the maximum number of valid access ports on the SoC. @end deffn +@deffn {Config Command} {dmem emu_ap_list} n +Set the list of Access Ports (APs) that need to be emulated. This +emulation mode supports software translation of an AP request into an +address mapped transaction that does not rely on physical AP hardware. +This maybe needed if the AP is either denied access via memory map or +protected using other SoC mechanisms. +@end deffn + +@deffn {Config Command} {dmem emu_base_address_range} base_address address_window_size +Set the emulated address and address window size. Both of these +parameters must be aligned to page size. +@end deffn + @end deffn @section Transport Configuration -- cgit v1.1