From ca1a1f8db73559a98c878f31952ca850e6d1cf73 Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Mon, 5 Nov 2018 11:48:52 -0800 Subject: Complete single step before returning. (#319) This fixes the following error, that has been reported occasionally: Error: 34072 2712 riscv-011.c:1175 reg_cache_get(): Register cache entry for 0 is invalid! openocd: ../src/target/riscv/riscv-011.c:1176: reg_cache_get: Assertion `r->valid' failed. The problem was that we'd tell the target to step, and then gdb (which assumed the target halted already) asked to read a register before the target had actually halted. With this fix the target is actually halted, and everything works. Change-Id: Icfcef456f3cec4bb352fb90186f5bbabb00a5ff8 --- src/target/riscv/riscv-011.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c index a9364d7..4ddc0e9 100644 --- a/src/target/riscv/riscv-011.c +++ b/src/target/riscv/riscv-011.c @@ -1451,7 +1451,7 @@ static int step(struct target *target, int current, target_addr_t address, if (result != ERROR_OK) return result; } else { - return resume(target, 0, true); + return full_step(target, false); } return ERROR_OK; -- cgit v1.1