From bd566a98bceab70038cf151a82593ffaaa0336cf Mon Sep 17 00:00:00 2001
From: Liviu Ionescu <ilg@livius.net>
Date: Fri, 29 Dec 2017 17:36:54 +0200
Subject: add configs for the SiFive boards

- the HiFive1 board definition includes the FTDI interface
- the Arty boards require external interface definitions
---
 tcl/board/sifive-e31arty.cfg | 22 ++++++++++++++++++++++
 tcl/board/sifive-e51arty.cfg | 22 ++++++++++++++++++++++
 tcl/board/sifive-hifive1.cfg | 34 ++++++++++++++++++++++++++++++++++
 3 files changed, 78 insertions(+)
 create mode 100644 tcl/board/sifive-e31arty.cfg
 create mode 100644 tcl/board/sifive-e51arty.cfg
 create mode 100644 tcl/board/sifive-hifive1.cfg

diff --git a/tcl/board/sifive-e31arty.cfg b/tcl/board/sifive-e31arty.cfg
new file mode 100644
index 0000000..ec10b27
--- /dev/null
+++ b/tcl/board/sifive-e31arty.cfg
@@ -0,0 +1,22 @@
+#
+# Be sure you include the speed and interface before this file
+# Example:
+# -c "adapter_khz 5000" -f "interface/ftdi/olimex-arm-usb-tiny-h.cfg" -f "board/sifive-e31arty.cfg"
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000
+init
+if {[ info exists pulse_srst]} {
+  ftdi_set_signal nSRST 0
+  ftdi_set_signal nSRST z
+}
+halt
+flash protect 0 64 last off
+echo "Ready for Remote Connections"
diff --git a/tcl/board/sifive-e51arty.cfg b/tcl/board/sifive-e51arty.cfg
new file mode 100644
index 0000000..ffd83a0
--- /dev/null
+++ b/tcl/board/sifive-e51arty.cfg
@@ -0,0 +1,22 @@
+#
+# Be sure you include the speed and interface before this file
+# Example:
+# -c "adapter_khz 5000" -f "interface/ftdi/olimex-arm-usb-tiny-h.cfg" -f "board/sifive-e51arty.cfg"
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000
+init
+if {[ info exists pulse_srst]} {
+  ftdi_set_signal nSRST 0
+  ftdi_set_signal nSRST z
+}
+halt
+flash protect 0 64 last off
+echo "Ready for Remote Connections"
diff --git a/tcl/board/sifive-hifive1.cfg b/tcl/board/sifive-hifive1.cfg
new file mode 100644
index 0000000..9bc6670
--- /dev/null
+++ b/tcl/board/sifive-hifive1.cfg
@@ -0,0 +1,34 @@
+adapter_khz     10000
+
+interface ftdi
+ftdi_device_desc "Dual RS232-HS"
+ftdi_vid_pid 0x0403 0x6010
+
+ftdi_layout_init 0x0008 0x001b
+ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
+
+#Reset Stretcher logic on FE310 is ~1 second long
+#This doesn't apply if you use
+# ftdi_set_signal, but still good to document
+#adapter_nsrst_delay 1500
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+
+flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME
+init
+#reset -- This type of reset is not implemented yet
+if {[ info exists pulse_srst]} {
+  ftdi_set_signal nSRST 0
+  ftdi_set_signal nSRST z
+  #Wait for the reset stretcher
+  #It will work without this, but
+  #will incur lots of delays for later commands.
+  sleep 1500
+}
+halt
+flash protect 0 64 last off
-- 
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