From b3ed97a4925ff441c3c2679d01e6cdb6edc123d8 Mon Sep 17 00:00:00 2001 From: Rod Boyce Date: Sun, 16 Dec 2018 17:41:39 +0000 Subject: NOR: lpc2000 Add support for LPC84x devices These devices differ from LPC8xx devices in that they have a different IAP entry point, but everything else is the same. Using Tcl to pass different IAP entry point. no new Clang analyser warnings and no new build sanitizers issues. Change-Id: I2d654dd250f416e74262c0228cad8713a283402f Signed-off-by: Rod Boyce Reviewed-on: http://openocd.zylin.com/4684 Reviewed-by: Jean-Christian de Rivaz Tested-by: jenkins Reviewed-by: Tomas Vanek --- doc/openocd.texi | 4 +++- src/flash/nor/lpc2000.c | 31 +++++++++++++++++++++++++++++++ tcl/target/lpc1xxx.cfg | 8 ++++++-- tcl/target/lpc84x.cfg | 11 +++++++++++ 4 files changed, 51 insertions(+), 3 deletions(-) create mode 100644 tcl/target/lpc84x.cfg diff --git a/doc/openocd.texi b/doc/openocd.texi index 21b55dc..4b1a5de 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -5910,7 +5910,7 @@ The LPC2888 is supported by the @var{lpc288x} driver. The LPC29xx family is supported by the @var{lpc2900} driver. @end quotation -The @var{lpc2000} driver defines two mandatory and one optional parameters, +The @var{lpc2000} driver defines two mandatory and two optional parameters, which must appear in the following order: @itemize @@ -5937,6 +5937,8 @@ table, the boot ROM will almost certainly ignore your flash image. However, if you do provide it, with most tool chains @command{verify_image} will fail. @end quotation +@item @option{iap_entry} ... optional telling the driver to use a different +ROM IAP entry point. @end itemize LPC flashes don't require the chip and bus width to be specified. diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c index 53ece42..e62fc79 100644 --- a/src/flash/nor/lpc2000.c +++ b/src/flash/nor/lpc2000.c @@ -82,6 +82,7 @@ * - 822 | 4 (tested with LPC824) * - 8N04 * - NHS31xx (tested with NHS3100) + * - 844 | 5 (tested with LPC845) * * lpc1100: * - 11xx @@ -269,6 +270,15 @@ #define NHS3152 0x4e315220 #define NHS3153 0x4e315320 /* Only specified in Rev.1 of the datasheet */ +#define LPC844_201 0x00008441 +#define LPC844_201_1 0x00008442 +#define LPC844_201_2 0x00008444 + +#define LPC845_301 0x00008451 +#define LPC845_301_1 0x00008452 +#define LPC845_301_2 0x00008453 +#define LPC845_301_3 0x00008454 + #define IAP_CODE_LEN 0x34 #define LPC11xx_REG_SECTORS 24 @@ -294,6 +304,7 @@ struct lpc2000_flash_bank { int checksum_vector; uint32_t iap_max_stack; uint32_t lpc4300_bank; + uint32_t iap_entry_alternative; bool probed; }; @@ -546,6 +557,10 @@ static int lpc2000_build_sector_list(struct flash_bank *bank) lpc2000_info->cmd51_max_buffer = 1024; /* For LPC824, has 8kB of SRAM */ bank->num_sectors = 32; break; + case 64 * 1024: + lpc2000_info->cmd51_max_buffer = 1024; /* For LPC844, has 8kB of SRAM */ + bank->num_sectors = 64; + break; default: LOG_ERROR("BUG: unknown bank->size encountered"); exit(-1); @@ -757,6 +772,9 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo exit(-1); } + if (lpc2000_info->iap_entry_alternative != 0x0) + iap_entry_point = lpc2000_info->iap_entry_alternative; + struct mem_param mem_params[2]; /* command parameter table */ @@ -954,6 +972,8 @@ FLASH_BANK_COMMAND_HANDLER(lpc2000_flash_bank_command) if (strcmp(CMD_ARGV[8], "calc_checksum") == 0) lpc2000_info->calc_checksum = 1; } + if (CMD_ARGC >= 10 && !lpc2000_info->iap_entry_alternative) + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[9], lpc2000_info->iap_entry_alternative); return ERROR_OK; } @@ -1476,6 +1496,17 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) bank->size = 30 * 1024; break; + case LPC844_201: + case LPC844_201_1: + case LPC844_201_2: + case LPC845_301: + case LPC845_301_1: + case LPC845_301_2: + case LPC845_301_3: + lpc2000_info->variant = lpc800; + bank->size = 64 * 1024; + break; + default: LOG_ERROR("BUG: unknown Part ID encountered: 0x%" PRIx32, part_id); exit(-1); diff --git a/tcl/target/lpc1xxx.cfg b/tcl/target/lpc1xxx.cfg index 701adf2..1969e46 100644 --- a/tcl/target/lpc1xxx.cfg +++ b/tcl/target/lpc1xxx.cfg @@ -99,10 +99,14 @@ $_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE # (same cmd51 destination boundary alignment, and all three support 256 byte # transfers). # -# flash bank lpc2000 0 0 [calc checksum] +# flash bank lpc2000 0 0 [calc checksum] [iap entry] +set _IAP_ENTRY 0 +if { [info exists IAP_ENTRY] } { + set _IAP_ENTRY $IAP_ENTRY +} set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME lpc2000 0x0 0 0 0 $_TARGETNAME \ - auto $_CCLK calc_checksum + auto $_CCLK calc_checksum $_IAP_ENTRY if { $_CHIPSERIES == "lpc800" || $_CHIPSERIES == "lpc1100" || $_CHIPSERIES == "lpc1200" || $_CHIPSERIES == "lpc1300" } { # Do not remap 0x0000-0x0200 to anything but the flash (i.e. select diff --git a/tcl/target/lpc84x.cfg b/tcl/target/lpc84x.cfg new file mode 100644 index 0000000..cb36698 --- /dev/null +++ b/tcl/target/lpc84x.cfg @@ -0,0 +1,11 @@ +# NXP LPC84x Cortex-M0+ with at least 8kB SRAM +if { ![info exists CHIPNAME] } { + set CHIPNAME lpc84x +} +set CHIPSERIES lpc800 +if { ![info exists WORKAREASIZE] } { + set WORKAREASIZE 0x1fe0 +} + +set IAP_ENTRY 0x0F001FF1 +source [find target/lpc1xxx.cfg] -- cgit v1.1