From 1f66c7827b739abd3b9ebe16c39cb66cffb19ccd Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Thu, 21 Dec 2017 16:41:50 -0800 Subject: Fix flash/run algorithm with new register names Change-Id: I8f539c880ee5da864956f56943411b228d8a5812 --- src/flash/nor/fespi.c | 4 ++-- src/target/riscv/riscv.c | 9 ++++++--- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/src/flash/nor/fespi.c b/src/flash/nor/fespi.c index 04f037d..15ef66e 100644 --- a/src/flash/nor/fespi.c +++ b/src/flash/nor/fespi.c @@ -792,8 +792,8 @@ static int steps_execute(struct algorithm_steps *as, int xlen = riscv_xlen(target); struct reg_param reg_params[2]; - init_reg_param(®_params[0], "x10", xlen, PARAM_OUT); - init_reg_param(®_params[1], "x11", xlen, PARAM_OUT); + init_reg_param(®_params[0], "a0", xlen, PARAM_OUT); + init_reg_param(®_params[1], "a1", xlen, PARAM_OUT); buf_set_u64(reg_params[0].value, 0, xlen, ctrl_base); buf_set_u64(reg_params[1].value, 0, xlen, data_wa->address); while (!as_empty(as)) { diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 9078fab..053655c 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -854,10 +854,13 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params, uint8_t mstatus_bytes[8]; LOG_DEBUG("Disabling Interrupts"); - char mstatus_name[20]; - sprintf(mstatus_name, "csr%d", CSR_MSTATUS); struct reg *reg_mstatus = register_get_by_name(target->reg_cache, - mstatus_name, 1); + "mstatus", 1); + if (!reg_mstatus) { + LOG_ERROR("Couldn't find mstatus!"); + return ERROR_FAIL; + } + reg_mstatus->type->get(reg_mstatus); current_mstatus = buf_get_u64(reg_mstatus->value, 0, reg_mstatus->size); uint64_t ie_mask = MSTATUS_MIE | MSTATUS_HIE | MSTATUS_SIE | MSTATUS_UIE; -- cgit v1.1