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2018-02-21icepick-d: extend access to core control registerMatthias Welwarsky1-6/+7
The ICEPick-D jtag router has core control registers that provide the same (or similar) functionality as the tap control register, for individual cores accessible through the same tap (e.g. through a DAP). Core control registers are located at address "0x60 + core-id" of the ROUTER address space (IR=ROUTER). It is sometimes helpful or even necessary to modify the core control register. This patch renames the "icepick_d_coreid" function to the more appropriate "icepick_d_core_control" and adds a "value" argument that allows writing of arbitrary value. "icepick_d_tapenable" is extended by an optional value argument so that core control can be written as the tap is enabled. Change-Id: I0e7f91b596cb5075364c6c233348508f58e0a901 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4141 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-02-14Add support for Cypress PSoC6 family of devicesBohdan Tymkiv1-0/+134
* Tested on CY8CKIT-001 kit with PSoC6 daughter board. * Tested with several J-Link adapters (Ultra+, Basic) Change-Id: I0a818c231e5f0b270c7774037b38d23221d59417 Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com> Reviewed-on: http://openocd.zylin.com/4233 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-02-14psoc4: update for 4x00BLE, L, M, S and PRoC BLE devicesTomas Vanek1-13/+76
Flash ROM API command PSOC4_CMD_SET_IMO48 is now optional on new devices. Also code tidy up: - improved system ROM call error detection - probe does not require the target to be halted - default_padded_value and erased_value set to 0 - fixed endianess problem in flash write and protection setting - removed fancy chip detection table as it would be updated too often - psoc4 flash_autoerase is now on by default to ease programming psoc4.cfg distinguishes chip family and uses either proprietary acquire function of a KitProg adapter or TEST_MODE workaround to "reset halt" Change-Id: I2c75ec46ed0a95e09274fad70b62d6eed7b9ecdf Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3807 Tested-by: jenkins Reviewed-by: David Girault <david.f.girault@gmail.com>
2018-02-01Kinetis_ke: add KEAx family to texi and cfg commentTomas Vanek1-1/+1
Change-Id: Id8f676b027f57fc540473c1a3a01bdd2ec49a200 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4232 Tested-by: jenkins Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
2018-01-30tcl: interface: harmonise RPi configsPaul Fertser3-12/+21
Make all configs specify same JTAG and SWD GPIO numbers. Change-Id: I65b09c1671c97f253f0aab88e511de7409d91e0a Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3932 Tested-by: jenkins
2018-01-25tcl: target: klx: use 1KiB for working areaPaul Fertser1-2/+2
Some parts have only that much. Reported by robertfoos_ on IRC. Change-Id: I684fdccfa62cf726466ddc467543a990fd88c4dc Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/4369 Reviewed-by: Robert Foss <robert.foss@memcpy.io> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-16target: add initial imx7.cfgOleksij Rempel1-0/+37
Change-Id: I899a215049ff0bc8840463c71018867ef71b5b90 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4190 Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Tested-by: jenkins
2018-01-13jtagspi: new protocol that includes transfer lengthRobert Jordens1-7/+1
This commit contains a rewrite of the jtagspi protocol and covers both changes in the jtagspi.c openocd driver and the bscan_spi (xilinx_bscan_spi) proxy bitstreams. The changes are as follows: 1. Always perform IR scan to ensure proper clearing of BYPASSed DRs. 2. Insert alignment cycles for all BYPASSed TAPs: The previous logic was erroneous. The delay in clock cyles from a bit written to the jtag interface to a bit read by the jtag interface is: * The number of BYPASSed TAPs before this (jtagspi) tap * The length of the jtagspi data register (1) * The number of BYPASSed TAPs before this one. I.e. it is just the number of enabled TAPs. This also gets rid of the configuration parameter DR_LENGTH. 3. Use marker bit to start spi transfer If there are TAPs ahead of this one on the JTAG chain, and we are in DR-SHIFT, there will be old bits toggled through first before the first valid bit destined for the flash. This delays the begin of the JTAGSPI transaction until the first high bit. 4. New jtagspi protocol A JTAGSPI transfer now consists of: * an arbitrary number of 0 bits (from BYPASS registers in front of the JTAG2SPI DR) * a marker bit (1) indicating the start of the JTAG2SPI transaction * 32 bits (big endian) describing the length of the SPI transaction * a number of SPI clock cycles (corresponding to 3.) with CS_N asserted * an arbitrary number of cycles (to shift MISO/TDO data through subsequent BYPASS registers) 5. xilinx_bscan_spi: clean up, add ultrascale This is tested on the following configurations: * KC705: XC7K325T * Sayma AMC: XCKU040 * Sayma AMC + RTM): XCKU040 + XC7A15T, a board with integrated FTDI JTAG adapter, SCANSTA JTAG router, a Xilinx Ultrascale XCKU040 and a Xilinx Artix 7 15T. https://github.com/m-labs/sinara/wiki/Sayma * Custom board with Lattice FPGA + XC7A35T * CUstom board with 3x XCKU115-2FLVA1517E Change-Id: I7361e9fb284ebb916302941735eebef3612aa103 Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/4236 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13ftdi swd: disable SWD output pin during inputPatrick Stewart3-0/+117
* Disables the data output pin while SWD is reading, so that a simple FTDI SWD interface can be made by connecting TCK to SWD_CLK and TDI+TDO directly to SWDIO. Enabled by setting SWDIO_OE to 0. Change-Id: I7d3b71cf3f4eea163cb320aff69ed95d219190bd Signed-off-by: Patrick Stewart <patstew@gmail.com> Signed-off-by: Roger Lendenmann <roger.lendenmann@intel.com> Reviewed-on: http://openocd.zylin.com/2274 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2018-01-13digilent_jtag_smt2_nc: add supportRobert Jordens1-0/+18
The Digilent SMT2 NC is nominally the connector-less version of the SMT2. But neither the SMT2 configuration nor the HS3 configuration work for on the Xilinx KCU105 board where the SMT2 NC is used. Change-Id: Ieb27cbc6d8b0f9c64ef778e4e0c839acc85ec0ef Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/4187 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13XCF (Xilinx platfrom flash) support.barthess2-0/+36
Change-Id: I4ee6db5f0abdb9fd279cc0edd13f71952a9d295d Signed-off-by: Uladzimir Pylinski <barthess@yandex.ru> Reviewed-on: http://openocd.zylin.com/3914 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13board: consolidate st_nucleo_l4 boardsPushpal Sidhu1-3/+2
We can now use the generic stlink.cfg which allows for both ST-LINK/V2 and V2-1 debuggers. Change-Id: I229c6fe5f6a6a4f2d3c787a49939846f102f9e24 Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com> Reviewed-on: http://openocd.zylin.com/4313 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-12Added config files for stm8l152 stm8s003 and stm8s105Ake Rehnman3-0/+31
Change-Id: I26cc401aafac01e5aed8eac605488da5221ffdc2 Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/4268 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-20config for ESPRESSObin from Globalscale Tech. Inc.Jiri Kastner1-0/+7
Change-Id: I77f536a9d2e901ebcef0a7dd0f205e5332b1d382 Signed-off-by: Jiri Kastner <cz172638@gmail.com> Reviewed-on: http://openocd.zylin.com/4303 Tested-by: jenkins Reviewed-by: Forest Crossman <cyrozap@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-12-20configs for Marvell Armada 3700Jiri Kastner3-0/+78
Change-Id: I367f39c9bc9e58380d6d5b500d5368d5173d96bd Signed-off-by: Jiri Kastner <cz172638@gmail.com> Signed-off-by: Forest Crossman <cyrozap@gmail.com> Reviewed-on: http://openocd.zylin.com/4302 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-12jtag: drivers: stlink: handle all versions with single configPaul Fertser26-63/+45
Extend HLA interface to allow multiple VID/PID pairs and use it to autodetect the connected stlink version. Change-Id: I35cd895b2260e23cf0e8fcb1fc11a78c2b99c69b Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3961 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-12-08config: stm32l01x and stm32l02x chips supportelmot1-2/+2
New low-end chips have only 2k of RAM, workarea size adjusted Change-Id: Ibfccd73fef9e6dabffc87d901736c5626ce411fe Signed-off-by: Ilia Motornyi <elijah.mot@gmail.com> Reviewed-on: http://openocd.zylin.com/4308 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-07stm8 : new targetAke Rehnman2-0/+171
New STM8 target based mostly on mips4k. Target communication through STLINK/SWIM. No flash driver yet but it is still possible to program flash through load_image command. The usual target debug methods are implemented. Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329 Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/3953 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-06Add STM32H7 config filesAlexandre Torgue4-0/+123
Add 2 target files: -stm32h7x.cfg -stm32h7x_dual_bank.cfg Add 2 config files for: -STM32H743zi-nucleo bord -STM32H743i and STM32H753i eval boards. Change-Id: I2aae2c5acff4f3ff8e1bf232fda5a11a87f71703 Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Reviewed-on: http://openocd.zylin.com/4182 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-10-27tcl/interface/ftdi/openrd: Fix FTDI channel + device descriptionJonathan McDowell2-7/+4
Similar to the Sheevaplug fix inf95f8b70fbd0f7e9c91a2d9006b1abb2dd07ebf2 the OpenRD device has its JTAG interface on the first channel of the ft2232, which is 0 for the new driver but was 1 for the old one. Correct the config file appropriately. Also the device description was missing the trailing " B" and thus not picking up the device correctly. Finally add an adapter_khz setting in the OpenRD board configuration file - set to 2MHz to match the Sheeva variant. Confirmed as working thanks to Phil Hands providing me access to his hardware to test on. See also Debian Bug#793214; https://bugs.debian.org/793214 Change-Id: Ifacf53124eaa330bbbdf36dfa79e3256bf2a5201 Signed-off-by: Jonathan McDowell <noodles@earth.li> Reviewed-on: http://openocd.zylin.com/4254 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-16tcl: add hi3798 target and Tocoding Poplar board configPeter Griffin2-0/+77
This config covers the 4x Cortex A53 CPUs. A custom connector is required from J14 to standard ARM JTAG on v1 boards. However v2 hardware should have a standard FTSH-105-01-L-DV connector. Pinmuxing code to enable JTAG pins is included in l-loader-poplar repository, so board is flashed with open source code, JTAG is available at very early boot. Alternatively the following pokes can be issued from U-Boot to enable JTAG (e.g. to debug hisilicon SDK). mw 0xf8a210ec 0x130; mw 0xf8a210f0 0x130; mw 0xf8a210f4 0x130; mw 0xf8a210f8 0x130; mw 0xf8a210fc 0x130; mw 0xf8a21100 0x130; Change-Id: I2b83dfcb3dc5461c1620f94dd99aa7b31fdda59b Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-on: http://openocd.zylin.com/4161 Tested-by: jenkins Reviewed-by: Jiri Kastner <cz172638@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-10-03nrf5: Add nRF52832-QFAA supportSlowcoder1-1/+14
Change-Id: Ica9e34e873cac182662b1e32a9b3164dbc0c935f Signed-off-by: Slowcoder <slowcoder@gmail.com> Reviewed-on: http://openocd.zylin.com/4210 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03target: atheros_ar9344: add simple uart0 testOleksij Rempel1-0/+23
in some cases we need something to test if uart is actually properly connected. Change-Id: I5a16b053164b34bb30ae8370753be12887a85c51 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4194 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03board: add TP-Link WDR4300 configOleksij Rempel1-0/+160
tested on TP-Link WDR4300 v1.7 Change-Id: If2b456afac835ab3a3987d434d20824c7ba75b93 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4192 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03target: add atheros_ar9344.cfgOleksij Rempel1-0/+16
Change-Id: I005b4c78ccb0fec8d38a25430cb49c580dcd8df5 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4191 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03board: tp-link_tl-mr3020: add ath79 supportOleksij Rempel1-0/+2
Finally we can use this driver by default! Change-Id: I09d215d1bd1dc16873a7379637e6869af65ad8f1 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4193 Tested-by: jenkins Reviewed-by: Dmytro <dioptimizer@hotmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03tcl/interface/ftdi: improve minimodule configDiego Herranz1-7/+6
- Tested on a real FT2232H MiniModule, so warning removed. - Every pin initially set to high impedance except TCK, TDI, TDO and TMS: Safest values given it's an evaluation board and the rest of pins might be connected to something else. - Reset is now initially de-asserted (it was asserted which is not recommended). - nRST pin choice is arbitrary so comment added (wondering if it should be an "echo"). - "-oe" option added to NRST signal so it can be set as high impedance (tri-stated). Change-Id: I967ab0c7bbccf72dbf6d6d78b3180b74e016e0d6 Signed-off-by: Diego Herranz <diegoherranz@diegoherranz.com> Reviewed-on: http://openocd.zylin.com/4185 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03tcl/interface/ftdi/sheevaplug: Fix FTDI channel configurationJonathan McDowell1-1/+1
The migration from the old ft2232 driver to the new generic ftdi driver ended up breaking support for the SheevaPlug device. The old driver defaulted to channel 1, but numbered the channels 1 to 4. The new driver starts at 0. The SheevaPlug JTAG is on interface A (interface B is the serial console), so it should be using channel 0. Fix this. Confirmed as working; serial console remains available and a new u-boot image can be transferred across using the JTAG link. See also Debian Bug#837989; https://bugs.debian.org/837989 Change-Id: I4ac2bfeb0d1e7e99d70fa47dc55f186e6af2c542 Signed-off-by: Jonathan McDowell <noodles@earth.li> Reviewed-on: http://openocd.zylin.com/4206 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: jenkins
2017-06-30zynq_7000: Add expected id for Zynq 7z100 devicesMoritz Fischer1-1/+2
As found on the NI Project Sulfur SDR board. Change-Id: I47bdd38ae85cf45cedad8797ea03bf3105153320 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-on: http://openocd.zylin.com/4176 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17flash Kinetis: handle all types of watchdog, disable in reset-initTomas Vanek2-8/+16
Active watchdog forces reset during armv7m_checksum_memory() in verify_image command if run just after reset init. COP watchdog in KL series and WDOG32 in KE1 series have longer timeout however they need to be disabled too. The change extends 'kinetis disable_wdog' command to optionally probe the chip and use appropriate algorithm to disable watchdog. Setting of cache type is also split from flash_support flags. Tcl command 'kinetis disable_wdog' is called in reset-init event. Change-Id: I3191e230f38b679ed74f2a97fe323ef8fb3fe22e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3901 Tested-by: jenkins Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17flash Kinetis: implement automatic bank creation based on device probeTomas Vanek4-8/+8
Kinetis flash driver services huge number of MCU types. They have one, two or four flash banks with option of FlexNVM. It would require ~36 config files just for Kx series, more for KLx, KVx and KE1x. The change implements alternative approach: - configuration file creates just one pflash bank (common for all devices) - when a device is probed, additional pflash or flexnvm banks are created based on flash layout of the connected MCU - created banks have names with optional numbering e.g. kx.pflash0 kx.pflash1 kx.flexnvm0 kx.flexnvm1 - the first bank gets renamed if numbering is used Automatic bank creation is enabled by tcl command 'kinetis create_banks'. Used solution has a drawback: other banks than pflash0 are not accessible until pflash0 is probed. Fortunately gdb attach and standard programming accesses banks in right sequence. Change-Id: I5b9037cbefdb8a4176b7715fbcc3af4da4c1ab60 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3925 Tested-by: jenkins Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17tcl/target: make sure kex.cfg is not used for Kinetis KE1x familiesTomas Vanek4-24/+2
Config file renamed to ke0x.cfg and a notice added to texi. While on ke0x.cfg CPUTAPID setting fixed: device has SWD port only, no JTAG. Removed per device configs as they set CHIPNAME and nothing more. Let's use reasonably universal chip name 'ke' set in family config. Change-Id: I313db87a59f25f968eb3c27df155780b67becee8 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3897 Tested-by: jenkins Reviewed-by: Ivan Meleca <ivan@artekit.eu> Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17flash Kinetis: add KE1xZ and KE1xF familiesTomas Vanek2-0/+18
The new Kinetis KE1x families use FTFE flash controller unlike KE0x. Also SDID coding corresponds to new K, KL and KV families. That's why KE1x is handled by kinetis driver instead of kinetis_ke Change-Id: Ibb73e28e41dfbb086e761e1f006b089825dab854 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3896 Tested-by: jenkins Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-31imx_gpio: add mmap based jtag interface for IMX processorsGrzegorz Kostka1-0/+35
For some targets (like nrf51) sysfs driver is too slow. This patch implements memory maped driver for IMX processors. Mostly based on bcm2835gpio. Tested on imx6ul CPU. However, it should work on any NXP IMX CPU. Change-Id: Idace4c98181c6e9c64dd158bfa52631204b5c4a7 Signed-off-by: Grzegorz Kostka <kostka.grzegorz@gmail.com> Reviewed-on: http://openocd.zylin.com/4106 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-05-12jtag/drivers: Add Cypress KitProg driverForest Crossman1-0/+12
This patch adds a driver for the SWD-only Cypress KitProg programmer/debugger. Change-Id: I3a9a8011a762781d560ebb305597e782a4f9a8e5 Signed-off-by: Forest Crossman <cyrozap@gmail.com> Reviewed-on: http://openocd.zylin.com/3221 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-05-09tcl/cpld: add config file for Altera 5M570Z CPLD (MAXV family)Moritz Fischer1-0/+6
Change-Id: I229c746be27b7c4fa01f48a6ed54ab2679b50ab1 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-on: http://openocd.zylin.com/4109 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-05-08stm32l4: support flashing L45x/46x devicesJuha Niskanen1-1/+1
Also fixes incorrect comment about MSI range. Change-Id: If1339a00e50db44195dfcd5c767ba3f5d9035451 Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com> Reviewed-on: http://openocd.zylin.com/4122 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24tcl/board: Add STMicroelectronics STM32F7 Nucleo configMarc Schink1-0/+10
Tested with STM32F746ZG Nucleo development board. Change-Id: Ia97b774b996a3be03e8e84342b93659c3632c18f Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3516 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24tcl STM32L0xx - add support for dual banked targets and for Nucleo-64 STM32L073Jan Čapek2-0/+17
- stm32l0_dual_bank.cfg - implement dual bank configuration - st_nucleo_l073rz.cfg - implement new board script Change-Id: Ie8063e5bec45069a63d414d81b2068fe3cc7e4d7 Signed-off-by: Jan Čapek <jan.capek@braiins.cz> Reviewed-on: http://openocd.zylin.com/3957 Reviewed-by: Cezary Gapiński <cezary.gapinski@gmail.com> Reviewed-by: Karl Palsson <karlp@tweak.net.au> Tested-by: jenkins Reviewed-by: Aurelio Lucchesi <me@0rel.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24Add support for the ATMEL SAM G55 Xplained Pro board and CPU.Jerome Lambourg1-0/+11
Change-Id: Iffe59dcf9f2cb1f5949c37d11fe0d2141a47f8da Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3922 Tested-by: jenkins Reviewed-by: Leo Zhang <liang.zhang@microchip.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23board: introduce base config for TI BeagleBone family boardsMatthias Welwarsky3-2/+14
This patch adds the file ti_beaglebone-base.cfg as the common base configuration for all TI BeagleBone derived boards. It also modifies ti_beaglebone.cfg to source the base board and only add the on-board JTAG adapter. Lastly, it adds a file ti_beaglebone_black.cfg with a suitable configuraton for the BeagleBone "Black" variant. Change-Id: I40cacb8abed7bdb308929713891f7b5e5b685c95 Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-on: http://openocd.zylin.com/3099 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-23added interface config file for In-Circuit's ICprog OpenOCD JTAG adapterMatthias Bock1-0/+14
Change-Id: I9f9758d3a30bbcca9f750f604e011e5cc25809c5 Signed-off-by: Matthias Bock <mail@matthiasbock.net> Reviewed-on: http://openocd.zylin.com/4107 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-24tcl: add Hi6220 target and LeMaker HiKey board configMatthias Welwarsky2-0/+82
configuration covers all 8 Cortex-A53 cores and auxiliary Cortex-M3 used for power management. Change-Id: I5509f275aa669abe285f9152935ecdcbcd0c402e Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4009 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-13flash/nor: avrf: support atmega128rfa1Karl Palsson1-0/+22
Tested with a Dresden Elektronik deRFmega128 module. Change-Id: I91da3b11b60e78755360b08453ed368d6d396651 Signed-off-by: Karl Palsson <karlp@tweak.net.au> Reviewed-on: http://openocd.zylin.com/2790 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15tcl at91samdXX.cfg: partially revert change 3722Tomas Vanek1-1/+2
Commit 25d7ba19c9e70cf5b912f660cf6aaa93d9ca120f introduced a problem with 'reset halt' due to setting srst_pulls_trst: Error: cortex_m.c:595 cortex_m_halt(): can't request a halt while in reset if nSRST pulls nTRST Sorry, I don't know why I overlooked it when I tested #3722. Change-Id: I41e9473dd91a86d93cf3e78b1fbbdfe1dd188d83 Reported-by: Ladislav Laska <laska@kam.mff.cuni.cz> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3942 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-12-25tcl: target: imx5{1,3}: remove bogus tapenable commandPaul Fertser2-6/+0
This seems to be a leftover from borrowing from omap3* configs. Since SJC is not enabling or disabling the DAP tap, and the tap is always available, the extra tapenable command causes warnings on startup (can't enable what's already enabled). Change-Id: I7514436d565aa5b91876dbdab547956f36dcab77 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3892 Tested-by: jenkins
2016-12-09board: add configuration for freescale twr-vf65gs10 system moduleMatthias Welwarsky2-0/+216
This patch contains configuration for the twr-vf65gs10 system module of the Freescale (NXP) tower system. It provides support for both the CMSIS-DAP available via USB and the Cortex+ETM connector on J5. The configuration also contains DDR and clock init code hooked into the reset-init event handler. Change-Id: I68303e0038e137dcadc57525e662428769fb69f2 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3564 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08stm32l0.cfg: Add examine-end event like on other STM32 targets.Uwe Bonnes1-0/+10
Enable debug in standby/stop/sleep. Stop watchdogs during halt. Change-Id: I8383a191cd897118bd88bf78528d05943f3a368e Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/3882 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08at91sam4: Add flash description and chipid for SAM4Cxx variants.Owen Kirby2-0/+16
Chip ID and flash layout taken from Atmel-11102F-ATARM-SAM4C32-SAM4C16-SAM4C8-SAM4C4-Datasheet_27-Mar-15 and tested on a SAM4C32-EK (rev A). Change-Id: I68aae5b60994c0b5964ea9031d40bc76ba025675 Signed-off-by: Owen Kirby <oskirby@gmail.com> Reviewed-on: http://openocd.zylin.com/3527 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-12-08tcl/board: Add Infineon XMC4300 Relax EtherCAT Kit configAndreas Färber1-0/+12
Tested with "J-Link Lite-XMC4200 Rev.1 compiled Jul 18 2014 17:28:26". Change-Id: I31482734af7621593a244ffac9dd223408470609 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3876 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
generated by cgit v1.1 at 2024-09-10 12:46:36 +0000