aboutsummaryrefslogtreecommitdiff
path: root/tcl/target
AgeCommit message (Collapse)AuthorFilesLines
2020-06-23Merge branch 'master' into from_upstreamTim Newsome162-441/+1429
Conflicts: .gitmodules .travis.yml jimtcl src/jtag/core.c src/jtag/drivers/ftdi.c src/jtag/drivers/libjaylink src/jtag/drivers/mpsse.c src/jtag/drivers/stlink_usb.c src/rtos/hwthread.c src/target/riscv/riscv-013.c src/target/riscv/riscv.c tcl/board/sifive-hifive1-revb.cfg Change-Id: I2d26ebeffb4c1374730d2e20e6e2a7710403657c
2020-06-14target/icepick.cfg: Add support for Test TAPs in ICEPick CEdward Fewell1-4/+18
In addition to the debug TAPs, the ICEPick C also supports a bank of Test TAPs (limited functionality intended for non-debuggable targets). Added support for Test TAPs to the icepick_c_tapenable routine. Port numbers of 0 to 15 will continue to be handled as a debug TAP number. Test TAPs will be port numbers of 16 to 31. This functionality will be needed for doing a flash mass erase on CC26xx/CC13xx targets. It is possible for user application to block even adding the Cortex M TAP to the scan chain, so the only way to unbrick the target and erase the flash is using a component on a test TAP of the device's ICEPick router. Change-Id: I0aa52a08d43a00cbd396efdeadd504fc31c98510 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/5715 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24stm8 target: make adapter speed settings workAke Rehnman2-4/+8
Previously the adapter speed settings were hard-coded to connect with low speed then switch over to high speed regardless what was mentioned in the cfg files. Now the stm8 target intercept adapter speed settings and configure the stm8 control registers accordingly. Change-Id: I7419514e5214e4b43b9d51253cf5b7f04a233533 Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/5548 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24swim: add new transportAntonio Borneo2-4/+4
Add SWIM and STM8 to documentation and update TODO file. Introduce transport "swim" and command "swim newtap". Switch in swim.c from HLA API to the new SWIM API. Implement in stlink driver the SWIM APIs as wrappers of existing HLA functions. Remove any SWIM related reference from HLA files. Update stm8 config files and stlink-dap interface config file. Change-Id: I2bb9f58d52900f6eb4df05f979f7ef11fd439c24 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5530 Tested-by: jenkins
2020-05-24swim: fix adapter speed handlingAntonio Borneo2-4/+4
SWIM transport only supports two adapter speeds: - "low speed" equal to 363 kHz (8 MHz / 22) - "high speed" equal to 800 kHz (8 MHz / 10) Replace the previous convention that use "0" or "1" for "low" or "high" speed with the effective speed in kHz. Rework the implementation of stlink_speed_swim(). Set low speed in the stm8 config files, because only low speed is permitted at debug connection; the previous code ignores the initial value. Change-Id: I2484c9419a2c554c59eb6b9216339393ab0b54f3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5529 Tested-by: jenkins
2020-05-09tcl: remove trailing whitespaceAntonio Borneo16-30/+30
The script checkpatch available in new Linux kernel offers an experimental feature for automatically fix the code in place. While still experimental, the feature works quite well for simple fixes, like spacing. This patch has been created automatically with the script under review for inclusion in OpenOCD, using the command: find tcl/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types TRAILING_WHITESPACE --fix-inplace -f {} \; The patch only changes amount and position of whitespace, thus the following commands show empty diff git diff -w git log -w -p git log -w --stat Change-Id: Ie7e3a236f4db9c70019e3b3c7e851edbd3a9dd84 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5616 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2020-05-09tcl: fix typo and spellingAntonio Borneo9-14/+14
Identified by checkpatch script from Linux kernel v5.7-rc1 using the command find tcl/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types TYPO_SPELLING --strict -f {} \; Change-Id: I7b523f0ab5ec047ff167742a44c29984ac672cf4 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5615 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2020-05-09tcl: stm32mp15x: fix "reset halt" on CM4 in engineering bootAntonio Borneo1-1/+1
The state machine of cortex-m have to pass through a set of state before it get in "halted". Add one more "arp_poll" to achieve the proper state during a "reset halt" command in engineering boot. Change-Id: I90828bf20ef75bd4018f8b911f727ae69c4d6e8f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5649 Tested-by: jenkins Reviewed-by: Richard Braun <rbraun@sceen.net>
2020-05-02coding style: tcl: remove empty lines at end of text filesAntonio Borneo33-42/+0
Empty lines at end of text files are useless. Remove them. Change-Id: I503cb0a96c7ccb132f4486c206a48831121d7abd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5171 Tested-by: jenkins
2020-04-21tcl/target/nrf52.cfg: detect AP lock and add command to recoverTomas Vanek1-1/+74
Change-Id: I8d2e29ed88a957d412473255e42b022a00dfb9cb Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4984 Tested-by: jenkins
2020-04-21jtag/drivers: add debugging support for Mellanox BlueField SoCLiming Sun1-0/+78
This commits adds debugging support for the Mellanox BlueField SoC via rshim, which is an interface accessible from external USB or PCIe (for SmartNIC case) via the rshim driver. It implements the arm dap interfaces based on the existing dapdirect framework. Change-Id: I18eb1c54293ec2c581f853e0e55b3f96d7978b56 Signed-off-by: Liming Sun <lsun@mellanox.com> Reviewed-on: http://openocd.zylin.com/5457 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-21tcl: stm32mp15x: add target and board config filesAntonio Borneo1-0/+121
The stm32mp15x has one or two Cortex-A7 (depending on the P/N) and one Cortex-M4. The second core is automatically detected by the target script. In "engineering boot" all the cores are accessible. In "production boot" the Cortex-M4 is kept in reset state after power-on or NRST. The board DK2 includes a ST-Link/V2, but only SWD is connected. Change-Id: Ib6ebefcc696b1716e0f98694cadf0b04fd7d11d6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5454 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-20Introduce ARCv2 tcl config filesEvgeniy Didin1-0/+34
With this commit we add tcl files which describes ARCv2 architecture features and configure files for ARCv2 EMSK board. Changes since v1: -Moved from http://openocd.zylin.com/#/c/5332/4 into separate commit. Changes: 22.01.2020: -Removed "actionpoints" handling code in tcl/cpu/arc/v2.tcl because this capability is not supported yet. Changes: 17.03.2020: -Update Licence headers -Cleanup indents -Removed "reset halt" in boards .tcl -Updated adapter frequency commands Changes: 15.03.2020: -Removed "init" in the of boards .tcl Change-Id: I51bf620abe7b8e046e1dccc861a7d963965d3a42 Signed-off-by: Evgeniy Didin <didin@synopsys.com> Cc: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-on: http://openocd.zylin.com/5350 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-05tcl/target: Use vectreset for CC13xx/CC26xx targets.Edward Fewell1-2/+1
nSRST and sysreqreset are both broken for these targets. Upon a hard reset, the target disables the TDO/TDI pins and the ICEPick router will remove the target's TAP from the scan chain. The scripts to do these tasks are run, but then OpenOCD throws the reset again breaking the debug connection. Until that issue can be resolved, vectreset is the only reset that works without breaking the debug connection. Update: original patch didn't have the correct reset command. Change-Id: If7c985b703c87399a13364609d370d6222f4a66c Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/5511 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-24tcl/target: Enable using vectreset for CC3320SF targetsEdward Fewell2-3/+28
On CC32xx family of devices, sysrequest is disabled, and vectreset is blocked by the boot loader (stops in a while(1) statement). srst reset can leave the target in a state that prevents debug. This change enables using vectreset on SF variants by moving the PC to the start of the user application in internal flash. This allows for a more reliable reset, but with two caveats: 1) This only works for the SF variant with internal flash. 2) This only resets the CPU and not any peripherals. Tested on CC3220SF rev B Launchpad in both SWD and JTAG modes. Confirmed proper behavior of reset, reset init, reset halt, and reset run commands. Update: reworked per comment in code review. Re-tested with CC3220SF Launchpad as both CC3220SF and as CC32xx board to confirm reset behavior as expected. Update: Added adapter srst delay 1100 line to the CC3200 LaunchXL configuration file. Change-Id: Ibc042d785c846c2223ae55b8f2410b75ed2df354 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/5489 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-24tcl/target: Use sysresetreq for MSP432 targetsEdward Fewell1-2/+2
Confirmed that sysresetreq is supported and works better for MSP432P4 and MSP432E4 targets than srst that was previously being used. Tested on MSP432P4111, MSP432P401R, and MSP432E401Y Launchpads. Change-Id: I1454c3379b9300bc133f82a766daeaefb98dbaac Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/5488 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-23flash/stm32l4x: add support of STM32WLEx devicesTarek BOCHKATI1-0/+100
STM32WLEx devices are based on arm Cortex-M4 running at 48MHz, contains a single bank of maximum 256 Kbytes of flash memory. there is 3 variants with different Flash/RAM sizes: STM32WLE5JC : 256K/64K STM32WLE5JB : 128K/48K STM32WLE5J8 : 64K/20K the work-area size is set to 20 kb to fit in STM32WLE5J8 Change-Id: Ie8e186fe4be97cbc25c53ef0ade4b4dbbcee6f66 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5450 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-16Flash driver for STM32G0xx and STM32G4xxAndreas Bolsch2-0/+191
Flash module of STM32G0/G4 family is quite similar to the one of STM32L4, so only minor changes are required, in particular adaption of flash loader to Cortex-M0. Register addresses passed to flash loader to simplify integration of L5. Added re-probe after option byte load. Added flash size override via cfg file. WRPxxR mask now based on max. number of pages instead of fixed 0xFF, as G4 devices fill up unused bits with '1'. Sizes in stm32l4_probe changed to multiples of 1kB. Tested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE. Gap handling in G4 Cat. 3 dual bank mode tested with STM32G473RB. This handling isn't optimal as the bank size includes the size of the gap. WB not tested. Change-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593 Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-on: http://openocd.zylin.com/4807 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-14tcl/target: Fix naming of RZ/A1 SoCMarek Vasut1-1/+1
The RZ/A1 is not part of the R-Car family, but is rather an RZ family. Fix the naming. Change-Id: I5f882b2467e87e534e0f1c827554e664a7d55664 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5445 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-12target: add examine-fail eventTomas Vanek2-5/+9
A configuration script may want to check the reason why examine fails e.g. device has security lock engaged. tcl/target/kx.cfg and klx.cfg is modified to use the new event for testing of the security lock of Kinetis MCU Change-Id: Id1d3a79d24e84b513f4ea35586cd2ab0437ff9b3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4289 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12Add target config for STM8S103 chip...Anton V. Kirilchik1-0/+13
Change-Id: I693e5b7933fc61956010a96be57ee6eb8abd3c31 Signed-off-by: Anton V. Kirilchik <kosmonaffft@gmail.com> Reviewed-on: http://openocd.zylin.com/5422 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-09tcl/target: Unify Renesas R-Car JTAG reset configMarek Vasut3-0/+18
Both Gen2 and Gen3 used the same init_reset{} implementation, pull it into common file and include it from both generations. Moreover, this behavior is SoC specific, not board specific, so move the common init_reset into target/ directory. Change-Id: I5489a4bff9a786da8cb7fd7a515b0c9ce9dc16e3 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5400 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07bluenrg-x: simplyfied the driverluca vinci1-7/+1
Adopted only fast algorithm for flash programming: - write_word and write_byte methods have been removed. - start and end write alignments have been defined. Moved flash controller registers offsets in a common file shared with the flash algorithm. - the flash base address is passed to the flash algorithm as a parameter. Removed unused functions Change-Id: I80aeab3994e477044bbcf02e66d9525dae0cb491 Signed-off-by: luca vinci <luca.vinci@st.com> Reviewed-on: http://openocd.zylin.com/5393 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Michele Sardo <msmttchr@gmail.com>
2020-03-07bluenrg-x: added support for BlueNRG-LP deviceluca vinci1-17/+23
Extended bluenrg-x flash driver with BlueNRG-LP flash controller. Changes include: - register set for the flash controller - made software structure prone to support more easily future devices - updated target config file Change-Id: I2e2dc70db32cf98c62e3a43f2e44a4600a25ac5b Signed-off-by: luca vinci <luca.vinci@st.com> Reviewed-on: http://openocd.zylin.com/5343 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-03tcl/target: Drop old Renesas Gen2 SoC configsMarek Vasut3-90/+0
Drop old Renesas Gen2 SoC configurations, as they were superseded by the new unified config. Change-Id: I7c2ccbdc13b01a552ce9cafdc1538f226beaa9f2 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5399 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-02tcl/target: Add unified config for Renesas R-Car Gen2 targetsMarek Vasut1-0/+123
Add configuration for the Renesas R-Car Generation 2 targets. These are SoCs with Cortex A15s and A7s. All cores currently supported by OpenOCD are supported here as well as two new cores, M2N and V2H, for the sake of support completeness. Change-Id: Ib6fe70a91360b4f8bd69822ee28b6dea530cfa0a Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5397 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-02tcl/target: Abort on invalid SoC selection on R-Car Gen3Marek Vasut1-1/+1
Instead of printing error message and continue, abort on invalid SoC selection right away. Change-Id: I9c7a7111b590c6c49a0826562380b881a162a8dc Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5439 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-24coding style: add newline at end of text filesAntonio Borneo1-1/+1
Some text file is missing newline at EOF. Add it. Change-Id: Ieebc790096f40961283c644642e56fde975e957f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5167 Tested-by: jenkins
2020-02-08tcl: Remove executable bitMarc Schink6-0/+0
Change-Id: Ib452435b13c3cb8d14453d983151936238b9601d Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/5419 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-02-06tcl: fix remaining scripts after rework adapter commandsAntonio Borneo3-6/+6
Some script have been added or modified after the patches for reworking the adapter commands were pushed in gerrit. Such scripts use the old command syntax and trigger a "deprecated" warning at runtime. Fix them with the same sed commands used for the other scripts: sed -i 's/^interface /adapter driver /' $(find tcl/ -type f) sed -i 's/adapter_khz/adapter speed/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_delay/adapter srst delay/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_assert_width/adapter srst pulse_width/g' $(find tcl/ -type f) Change-Id: I0824d6c506a9af3eb9129b74c02a92b4eb1b100d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5424 Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Tested-by: jenkins
2020-01-29tcl: replace the deprecated commands with "adapter ..."Antonio Borneo110-191/+191
Avoid annoying "deprecated" messages while running the scripts distributed with OpenOCD code. Change automatically created with commands sed -i 's/adapter_khz/adapter speed/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_delay/adapter srst delay/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_assert_width/adapter srst pulse_width/g' $(find tcl/ -type f) Minor indentation issue fixed manually in tcl/board/at91sam9g20-ek.cfg tcl/target/at91sam9260_ext_RAM_ext_flash.cfg Change-Id: I425fd56c0c88cd6b06124621306eeb89166dfe71 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5284 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16flash/nor: add support of STM32WB on top STM32L4 flash driverTarek BOCHKATI1-0/+103
Change-Id: I9fb6700085d817d35a691f6484193f67939a4e0f Signed-off-by: Laurent LEMELE <laurent.lemele@st.com> Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/4933 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02tcl: update scripts after "jtag_reset" got deprecatedAntonio Borneo1-3/+3
Avoid annoying "deprecated" messages in the scripts distributed with OpenOCD code. Change-Id: I82d27cd420db30f0653efbd286a627ef56a8c1fd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5287 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02tcl/target: swm050: fix to allow to use with ST-LinkIcenowy Zheng1-2/+5
Currently the code assumes the adapter uses raw SWD, and the expected ID code of the CPU is even wrong. An adapter speed is also not specified. All these prevents the config file to be used with ST-Link. Fix the config file, to allow it to be used with ST-Link. Change-Id: I1244320fabfe8ee23da5a56a592dbeddc72cc8d5 Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-on: http://openocd.zylin.com/5297 Tested-by: jenkins Reviewed-by: Caleb Szalacinski <contact@skiboy.net> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-07target/stm32h7x: add support of dual core variant of STM32H7Tarek BOCHKATI2-17/+142
STM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4 The second core creation is only done when * DUAL_CORE variable is set to true * non HLA interface is used A second check for the second core existence is done in cpu1 examine-end Once the second core is detected it gets examined. Furthermore, the script provides a configurable CTI usage in order to halt the cores simultaneously. Tested on Rev X and V devices. PS: the indentation was a mix of spaces and tabs, all changed to tabs. Change-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5130 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-27target/stm32h7x: Use AP2 to access DBGMCU when non HLA adapter is usedChristopher Head1-6/+42
The STM32H7 has three access ports. The DBGMCU component is available through AP0 at 0x5C001000 and through AP2 at 0xE00E1000. Using the latter is preferable for early configuration because it works in all power states and while SRST is asserted, whereas the former does not. Change-Id: Iaf8f01d769efb6655040060a8e1e951e1f7e50ab Signed-off-by: Christopher Head <chead@zaber.com> Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/4742 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-18tcl/target: Add Infineon TLE987xAndreas Färber1-0/+36
Prepare a config for Infineon TLE9879. Change-Id: Ic667ae822fd514cac365993bc3f39b4185f1a118 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/4339 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18stm32l0|l1: don't corrupt RCC registersFelipe Balbi2-4/+7
instead of overwriting Reset settings, let's read-modify-write RCC registers. Change-Id: I21b7e26e6007d3c3d73803c681c980c6947f5910 Signed-off-by: Felipe Balbi <balbi@kernel.org> Reviewed-on: http://openocd.zylin.com/3601 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-10-15Update FTDI C232HM cfg, and add two new cfgs from cable modem researchAl Dyrius1-0/+17
Change-Id: Idbeffcd5ff4380b1e7c9fd5ef6ba3ca77cc22d99 Signed-off-by: Al Dyrius <aldyrius42@gmail.com> Reviewed-on: http://openocd.zylin.com/5307 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-09-27Merge branch 'master' into from_upstreamTim Newsome13-17/+371
Change-Id: I036350ee06aa396344fb8a80c7dba148ec24c9c8
2019-09-08flash/nor: flash driver for Synwit SWM050 MCUsCaleb Szalacinski1-0/+45
SWM050 is a series of MCU product by Foshan Synwit Tech, which is available in TSSOP-8 or SSOP-16 packages. Adds flash driver for the internal 8KiB flash of the MCU. The registers are based on reverse engineering the J-Flash blob provided by the vendor. Also adds a pre-made cfg file. Change-Id: I0b29f0c0d062883542ee743e0750a4c6b6609ebd Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Caleb Szalacinski <contact@skiboy.net> Reviewed-on: http://openocd.zylin.com/4927 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-06-19tcl/target: Add initial Microchip SAML1x supportMarc Schink1-0/+31
There is not flash bank support at the moment. Change-Id: I833c009d9d21cdeb70b57d67eb557d50ed0fb4de Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/5205 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19Configs for ARM corelink SSE-200 target and Musca A boardOmair Javaid1-0/+71
This patch adds configuration files for ARM CoreLink SSE-200 SoCs. Also adds configuration file for SSE-200 based Musca A board. Flash programming support for Musca A QSPI flash is still not functional. This configuration will be updated once that support lands into OpenOCD. Please refer to ARM documentation for more information about SSE-200 and Musca A. Change-Id: Id3783c34d6e2609d659ef91c0bf7252c39439874 Signed-off-by: Omair Javaid <omair.javaid@linaro.org> Reviewed-on: http://openocd.zylin.com/5006 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-23stm32f7x: Use CHIPNAME-specific name for ITCM bankChristopher Head1-3/+12
Change-Id: Icf67eaecd56ac3fb88bcfa2b7084b846109454e6 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/5102 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2019-05-20tcl/target: Fix V3M/V3H SoC chipnameMarek Vasut1-4/+4
The V3M SoC is R8A77970 while the V3H SoC is R8A77980 . Update the CHIPNAME and swap the SoCs to keep the list sorted. Change-Id: I7e1777c0c7181e5e0beac98333f2047cb443d0df Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5140 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-20tcl/target: Add Renesas RZ/A1H targetMarek Vasut1-0/+25
Add configuration for the Renesas RZ/A1H target. This is an SoC with one Cortex A9 ARMv7a core and up to 10 MiB of on-SoC SRAM. Change-Id: I20fd54b385fe1ba1cc325451c3fdfa3a835d4884 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5141 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-14tcl/psoc4: remove "ocd_" prefixed commandsAntonio Borneo1-1/+1
The commands prefixed with "ocd_" are removed. Remove them from configuration files. Change-Id: Ib44627ee17a39f3d06b479507ab5a025073bf9a8 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5090 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2019-04-24target/imx8m: Cleanup defaultsLeonard Crestez1-2/+8
* Add mem_ap for direct access to axi bus (without halting cpu) * Mark m4 core with -defer-examine because it's not used by default * Make a53.0 default target since it's the boot core Change-Id: Id031533c5d4af346eb08a9ac2532fa1bca602913 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5036 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24target/imx6ul: Initial supportLeonard Crestez1-0/+50
Unlike the rest of imx6 the 6UL 6ULL 6ULZ chips are based on Cortex-A7 which is at a different address so a custom script is required. Tested on imx6ull-14x14-evk Change-Id: I72822d2241045c318389fadbc66d7aaabaaf4cb5 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5040 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24target/imx6sx: Initial supportLeonard Crestez1-0/+50
Unlike the rest of imx6 a Cortex-M4 was added with a second CoreSight DAP so a separate script is required. Tested on imx6sx-sdb running linux Change-Id: I1561910b233015f42508f341175822c0827655ec Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5041 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
generated by cgit v1.1 at 2024-11-16 23:37:49 +0000