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2018-05-08psoc6: Run flash algorithm asynchronously to improve performanceBohdan Tymkiv1-1/+16
Existing psoc6 driver starts flash algorithm for each Flash row. This is suboptimal from performance point of view, starting/stopping flash algorithm for each row adds significant overhead. This change starts flash algorithm and leaves it running asynchronously while driver performs flash operations. Performance gain is 170...250% depending on probe: flash write_image img_256k.bin | w/o this change | with this change | ----------------------------------|-----------------|------------------| KitProg2/CMSIS-DAP, SWD @ 1 MHz | 4 KiB/s | 10 KiB/s | J-Link Ultra, SWD @ 1 MHz | 17 KiB/s | 31 KiB/s | J-Link Ultra, SWD @ 4 MHz | 33 KiB/s | 57 KiB/s | Change-Id: I5bd582584b35af67600c4d197829eb7aeeec7e3f Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com> Reviewed-on: http://openocd.zylin.com/4472 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08board: add configuration for stm32f103c8 "Blue Pill"Matthias Welwarsky1-1/+9
The "Blue Pill" is a popular development board with an STM32F103C8 micro controller. According to sources, it has a 128kB Flash on board even though the option bytes only report 64kB. This patch therefore also modifies target/stm32f1x.cfg to take an optional FLASH_SIZE variable into account which the board file sets to 0x20000. Change-Id: I8a78ccd2b5faf637c539ee3cf8136789ee15c95d Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4495 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08tcl/target: Add Renesas R-Car R8A7790 H2 targetMarek Vasut1-0/+36
Add configuration for the Renesas R-Car R8A7790 H2 target. This is an SoC with four Cortex A15 and four Cortex A7 ARMv7a cores, only the four A15 cores are supported. Change-Id: I6099b257cc0f04e6858ed5f5f8c8d8ad82ef7650 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/4490 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08target: add Cortex-M4 target to VF6xx targetMatthias Welwarsky1-1/+1
The Vybrid VF6xx SoCs contain an additional Cortex-M4 core connected to AP number 3 of the main DAP. Change-Id: I59c020fdfc53e909b1f0dac1a8627a62cdaa74f2 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3640 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08target: add configuration for NXP MC-IMX8M-EVKMatthias Welwarsky1-0/+55
includes target configuration for i.MX8M SoC family, board file needs to set up CHIPNAME and CHIPCORES to match the actual hardware configuration Change-Id: Ieb6d89cab2477a58f85d0ef9cd242710950191c0 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4434 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08tcl/target: Add Renesas R-Car R8A7791 M2W targetNiklas Söderlund1-0/+27
Add configuration for the Renesas R-Car R8A7791 M2W target. This is an SoC with two Cortex A15 ARMv7a cores, both cores are supported. This patch is based on initial submission by Adam Bass and improvements by Niklas Söderlund. Change-Id: I297da62b9ce71ad222a401d98e6bcb8502427673 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Adam Bass <adam.bass@renesas.com> Cc: Niklas Söderlund <niklas.soderlund@ragnatech.se> Reviewed-on: http://openocd.zylin.com/4485 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-09Merge branch 'master' into from_upstreamTim Newsome69-168/+654
Conflicts: src/rtos/rtos.c src/rtos/rtos.h src/server/gdb_server.c Change-Id: Icd5a8165fe111f699542530c9cb034faf30e09b2
2018-03-30target: restructure dap supportMatthias Welwarsky68-153/+235
- add 'dap create' command to create dap instances - move all dap subcmmand into the dap instance commands - keep 'dap info' for convenience - change all armv7 and armv8 targets to take a dap instance instead of a jtag chain position - restructure tap/dap/target relations, jtag tap no longer references the dap, daps are now independently created and initialized. - clean up swd connect - re-initialize DAP also on JTAG errors (e.g. after reset, power cycle) - update documentation - update target files Change-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4468 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30tcl/board: add configuration for the avnet ultrazed-eg starter kitMatthias Welwarsky1-0/+90
also contains target configuration for the Xilinx UltraScale+ platform Change-Id: I6300cbc85c1ed71df71d8aaca59500bbf18f0093 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4467 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30arm_cti: add cti command groupMatthias Welwarsky3-2/+13
Extend the CTI abstraction to be accessible from TCL and change the 'target' command to accept a cti 'object' instead of a base address. This also allows accessing CTI instances that are not related to a configured target. Change-Id: Iac9ed0edca6f1be00fe93783a35c26077f6bc80a Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4031 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-15tcl/target: warn if a Kinetis MCU is connected to a high level adapterTomas Vanek2-2/+27
Make sure the user is aware he can lock the device though unlock is not possible without access to MDM-AP. Change-Id: I92676530e95d19489c6739748a99c2895849f90f Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4403 Tested-by: jenkins
2018-03-07Added support for STMicroelectronics BlueNRG-1 and BlueNRG-2 SoCMichele Sardo1-0/+73
Added configuration files and flash loaders. Change-Id: I768eb3626f4e0eadb206bef90a867cc146fe8c75 Signed-off-by: Michele Sardo <msmttchr@gmail.com> Reviewed-on: http://openocd.zylin.com/4226 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-02-24efm32: Add JTAG definitions to EFM32 target fileJonas Norling1-3/+10
This makes it possible to program newer EFM32 and EFR32 chips with JTAG, as opposed to SWD. Change-Id: Ia3e8c1bbc66fc1f33e8cf2087ccf0d1b4dfd74e1 Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com> Reviewed-on: http://openocd.zylin.com/4262 Tested-by: jenkins Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-02-21icepick-d: extend access to core control registerMatthias Welwarsky1-6/+7
The ICEPick-D jtag router has core control registers that provide the same (or similar) functionality as the tap control register, for individual cores accessible through the same tap (e.g. through a DAP). Core control registers are located at address "0x60 + core-id" of the ROUTER address space (IR=ROUTER). It is sometimes helpful or even necessary to modify the core control register. This patch renames the "icepick_d_coreid" function to the more appropriate "icepick_d_core_control" and adds a "value" argument that allows writing of arbitrary value. "icepick_d_tapenable" is extended by an optional value argument so that core control can be written as the tap is enabled. Change-Id: I0e7f91b596cb5075364c6c233348508f58e0a901 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4141 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-02-14Add support for Cypress PSoC6 family of devicesBohdan Tymkiv1-0/+134
* Tested on CY8CKIT-001 kit with PSoC6 daughter board. * Tested with several J-Link adapters (Ultra+, Basic) Change-Id: I0a818c231e5f0b270c7774037b38d23221d59417 Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com> Reviewed-on: http://openocd.zylin.com/4233 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-02-14psoc4: update for 4x00BLE, L, M, S and PRoC BLE devicesTomas Vanek1-13/+76
Flash ROM API command PSOC4_CMD_SET_IMO48 is now optional on new devices. Also code tidy up: - improved system ROM call error detection - probe does not require the target to be halted - default_padded_value and erased_value set to 0 - fixed endianess problem in flash write and protection setting - removed fancy chip detection table as it would be updated too often - psoc4 flash_autoerase is now on by default to ease programming psoc4.cfg distinguishes chip family and uses either proprietary acquire function of a KitProg adapter or TEST_MODE workaround to "reset halt" Change-Id: I2c75ec46ed0a95e09274fad70b62d6eed7b9ecdf Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3807 Tested-by: jenkins Reviewed-by: David Girault <david.f.girault@gmail.com>
2018-02-02Merge branch 'master' into updateTim Newsome6-3/+71
Change-Id: I2cd34ed5bb1903736ae8ce109acebaf13bf49805
2018-02-01Kinetis_ke: add KEAx family to texi and cfg commentTomas Vanek1-1/+1
Change-Id: Id8f676b027f57fc540473c1a3a01bdd2ec49a200 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4232 Tested-by: jenkins Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
2018-01-25tcl: target: klx: use 1KiB for working areaPaul Fertser1-2/+2
Some parts have only that much. Reported by robertfoos_ on IRC. Change-Id: I684fdccfa62cf726466ddc467543a990fd88c4dc Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/4369 Reviewed-by: Robert Foss <robert.foss@memcpy.io> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-16target: add initial imx7.cfgOleksij Rempel1-0/+37
Change-Id: I899a215049ff0bc8840463c71018867ef71b5b90 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4190 Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Tested-by: jenkins
2018-01-12Added config files for stm8l152 stm8s003 and stm8s105Ake Rehnman3-0/+31
Change-Id: I26cc401aafac01e5aed8eac605488da5221ffdc2 Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/4268 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-22Merge branch 'master' into updateTim Newsome11-3/+453
Change-Id: Icec244b174cc0c67ab58961649a369db7f344824
2017-12-20configs for Marvell Armada 3700Jiri Kastner3-0/+78
Change-Id: I367f39c9bc9e58380d6d5b500d5368d5173d96bd Signed-off-by: Jiri Kastner <cz172638@gmail.com> Signed-off-by: Forest Crossman <cyrozap@gmail.com> Reviewed-on: http://openocd.zylin.com/4302 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-08config: stm32l01x and stm32l02x chips supportelmot1-2/+2
New low-end chips have only 2k of RAM, workarea size adjusted Change-Id: Ibfccd73fef9e6dabffc87d901736c5626ce411fe Signed-off-by: Ilia Motornyi <elijah.mot@gmail.com> Reviewed-on: http://openocd.zylin.com/4308 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-12-07stm8 : new targetAke Rehnman2-0/+171
New STM8 target based mostly on mips4k. Target communication through STLINK/SWIM. No flash driver yet but it is still possible to program flash through load_image command. The usual target debug methods are implemented. Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329 Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/3953 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-06Add STM32H7 config filesAlexandre Torgue2-0/+100
Add 2 target files: -stm32h7x.cfg -stm32h7x_dual_bank.cfg Add 2 config files for: -STM32H743zi-nucleo bord -STM32H743i and STM32H753i eval boards. Change-Id: I2aae2c5acff4f3ff8e1bf232fda5a11a87f71703 Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Reviewed-on: http://openocd.zylin.com/4182 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-10-26No RussianPalmer Dabbelt2-0/+0
2017-10-16tcl: add hi3798 target and Tocoding Poplar board configPeter Griffin1-0/+49
This config covers the 4x Cortex A53 CPUs. A custom connector is required from J14 to standard ARM JTAG on v1 boards. However v2 hardware should have a standard FTSH-105-01-L-DV connector. Pinmuxing code to enable JTAG pins is included in l-loader-poplar repository, so board is flashed with open source code, JTAG is available at very early boot. Alternatively the following pokes can be issued from U-Boot to enable JTAG (e.g. to debug hisilicon SDK). mw 0xf8a210ec 0x130; mw 0xf8a210f0 0x130; mw 0xf8a210f4 0x130; mw 0xf8a210f8 0x130; mw 0xf8a210fc 0x130; mw 0xf8a21100 0x130; Change-Id: I2b83dfcb3dc5461c1620f94dd99aa7b31fdda59b Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-on: http://openocd.zylin.com/4161 Tested-by: jenkins Reviewed-by: Jiri Kastner <cz172638@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-10-03nrf5: Add nRF52832-QFAA supportSlowcoder1-1/+14
Change-Id: Ica9e34e873cac182662b1e32a9b3164dbc0c935f Signed-off-by: Slowcoder <slowcoder@gmail.com> Reviewed-on: http://openocd.zylin.com/4210 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03target: atheros_ar9344: add simple uart0 testOleksij Rempel1-0/+23
in some cases we need something to test if uart is actually properly connected. Change-Id: I5a16b053164b34bb30ae8370753be12887a85c51 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4194 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-10-03target: add atheros_ar9344.cfgOleksij Rempel1-0/+16
Change-Id: I005b4c78ccb0fec8d38a25430cb49c580dcd8df5 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4191 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2017-06-30zynq_7000: Add expected id for Zynq 7z100 devicesMoritz Fischer1-1/+2
As found on the NI Project Sulfur SDR board. Change-Id: I47bdd38ae85cf45cedad8797ea03bf3105153320 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-on: http://openocd.zylin.com/4176 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17flash Kinetis: handle all types of watchdog, disable in reset-initTomas Vanek2-8/+16
Active watchdog forces reset during armv7m_checksum_memory() in verify_image command if run just after reset init. COP watchdog in KL series and WDOG32 in KE1 series have longer timeout however they need to be disabled too. The change extends 'kinetis disable_wdog' command to optionally probe the chip and use appropriate algorithm to disable watchdog. Setting of cache type is also split from flash_support flags. Tcl command 'kinetis disable_wdog' is called in reset-init event. Change-Id: I3191e230f38b679ed74f2a97fe323ef8fb3fe22e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3901 Tested-by: jenkins Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17flash Kinetis: implement automatic bank creation based on device probeTomas Vanek4-8/+8
Kinetis flash driver services huge number of MCU types. They have one, two or four flash banks with option of FlexNVM. It would require ~36 config files just for Kx series, more for KLx, KVx and KE1x. The change implements alternative approach: - configuration file creates just one pflash bank (common for all devices) - when a device is probed, additional pflash or flexnvm banks are created based on flash layout of the connected MCU - created banks have names with optional numbering e.g. kx.pflash0 kx.pflash1 kx.flexnvm0 kx.flexnvm1 - the first bank gets renamed if numbering is used Automatic bank creation is enabled by tcl command 'kinetis create_banks'. Used solution has a drawback: other banks than pflash0 are not accessible until pflash0 is probed. Fortunately gdb attach and standard programming accesses banks in right sequence. Change-Id: I5b9037cbefdb8a4176b7715fbcc3af4da4c1ab60 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3925 Tested-by: jenkins Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17tcl/target: make sure kex.cfg is not used for Kinetis KE1x familiesTomas Vanek4-24/+2
Config file renamed to ke0x.cfg and a notice added to texi. While on ke0x.cfg CPUTAPID setting fixed: device has SWD port only, no JTAG. Removed per device configs as they set CHIPNAME and nothing more. Let's use reasonably universal chip name 'ke' set in family config. Change-Id: I313db87a59f25f968eb3c27df155780b67becee8 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3897 Tested-by: jenkins Reviewed-by: Ivan Meleca <ivan@artekit.eu> Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-06-17flash Kinetis: add KE1xZ and KE1xF familiesTomas Vanek2-0/+18
The new Kinetis KE1x families use FTFE flash controller unlike KE0x. Also SDID coding corresponds to new K, KL and KV families. That's why KE1x is handled by kinetis driver instead of kinetis_ke Change-Id: Ibb73e28e41dfbb086e761e1f006b089825dab854 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3896 Tested-by: jenkins Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08stm32l4: support flashing L45x/46x devicesJuha Niskanen1-1/+1
Also fixes incorrect comment about MSI range. Change-Id: If1339a00e50db44195dfcd5c767ba3f5d9035451 Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com> Reviewed-on: http://openocd.zylin.com/4122 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24tcl STM32L0xx - add support for dual banked targets and for Nucleo-64 STM32L073Jan Čapek1-0/+5
- stm32l0_dual_bank.cfg - implement dual bank configuration - st_nucleo_l073rz.cfg - implement new board script Change-Id: Ie8063e5bec45069a63d414d81b2068fe3cc7e4d7 Signed-off-by: Jan Čapek <jan.capek@braiins.cz> Reviewed-on: http://openocd.zylin.com/3957 Reviewed-by: Cezary Gapiński <cezary.gapinski@gmail.com> Reviewed-by: Karl Palsson <karlp@tweak.net.au> Tested-by: jenkins Reviewed-by: Aurelio Lucchesi <me@0rel.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-02-24tcl: add Hi6220 target and LeMaker HiKey board configMatthias Welwarsky1-0/+56
configuration covers all 8 Cortex-A53 cores and auxiliary Cortex-M3 used for power management. Change-Id: I5509f275aa669abe285f9152935ecdcbcd0c402e Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4009 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-13flash/nor: avrf: support atmega128rfa1Karl Palsson1-0/+22
Tested with a Dresden Elektronik deRFmega128 module. Change-Id: I91da3b11b60e78755360b08453ed368d6d396651 Signed-off-by: Karl Palsson <karlp@tweak.net.au> Reviewed-on: http://openocd.zylin.com/2790 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15tcl at91samdXX.cfg: partially revert change 3722Tomas Vanek1-1/+2
Commit 25d7ba19c9e70cf5b912f660cf6aaa93d9ca120f introduced a problem with 'reset halt' due to setting srst_pulls_trst: Error: cortex_m.c:595 cortex_m_halt(): can't request a halt while in reset if nSRST pulls nTRST Sorry, I don't know why I overlooked it when I tested #3722. Change-Id: I41e9473dd91a86d93cf3e78b1fbbdfe1dd188d83 Reported-by: Ladislav Laska <laska@kam.mff.cuni.cz> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3942 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-12-25tcl: target: imx5{1,3}: remove bogus tapenable commandPaul Fertser2-6/+0
This seems to be a leftover from borrowing from omap3* configs. Since SJC is not enabling or disabling the DAP tap, and the tap is always available, the extra tapenable command causes warnings on startup (can't enable what's already enabled). Change-Id: I7514436d565aa5b91876dbdab547956f36dcab77 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3892 Tested-by: jenkins
2016-12-08stm32l0.cfg: Add examine-end event like on other STM32 targets.Uwe Bonnes1-0/+10
Enable debug in standby/stop/sleep. Stop watchdogs during halt. Change-Id: I8383a191cd897118bd88bf78528d05943f3a368e Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/3882 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08at91sam4: Add flash description and chipid for SAM4Cxx variants.Owen Kirby2-0/+16
Chip ID and flash layout taken from Atmel-11102F-ATARM-SAM4C32-SAM4C16-SAM4C8-SAM4C4-Datasheet_27-Mar-15 and tested on a SAM4C32-EK (rev A). Change-Id: I68aae5b60994c0b5964ea9031d40bc76ba025675 Signed-off-by: Owen Kirby <oskirby@gmail.com> Reviewed-on: http://openocd.zylin.com/3527 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-12-08tcl: Support for Analog Devices ADSP-SC58xPeter Lawrence1-0/+45
target tcl to enable debugging of ARM Cortex-A5 on ADSP-SC58x Change-Id: I378f8b94b7d6d6b9d0567985abc0e36aea7c8dea Signed-off-by: Peter Lawrence <majbthrd@gmail.com> Reviewed-on: http://openocd.zylin.com/3125 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2016-12-08tcl at91samdXX.cfg: update config to current OpenOCD statusTomas Vanek1-7/+1
Remove comment about workaround of not working 'reset halt' - not needed as 'reset halt' is working as expected @ EDBG with srst_only. Add srst_pulls_trst to reset_config as it no more triggers an error. Change-Id: I47cf445690c46ccfb866900cddbfcaefc8649f82 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3722 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-11-04AM335x: Disable watchdog on 'reset halt'Harald Welte1-0/+32
At least on my (phyCORE-AM335X) system, the AM335x watchdog needs to be disabled to use OpenOCD for more than 6.5 seconds after reset. Change-Id: I3d883a9f572b0ccb92f9864853a00c372e39d7f2 Signed-off-by: Harald Welte <laforge@gnumonks.org> Reviewed-on: http://openocd.zylin.com/3391 Tested-by: jenkins Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-11-04cfg: Don't check BS TAP IDCODE in STM32 configsAndreas Fritiofson7-133/+7
Instead of updating these regularly we can just accept any IDCODE for the boundary scan TAP. The only downside might be that it's not immediately obvious if you source a config for the wrong type of STM32. Change-Id: I96d4d81699a491b3a46de3f0d3fd078ffddad4e4 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3385 Tested-by: jenkins
2016-08-14flash Kinetis: Detect RESET/WDOG loop, fix detection of secured MCUTomas Vanek2-22/+17
Kinetis driver checks MDM STAT register to detect secured state of MCU. Original version often reported a blank device as secured one. Change #3010 has not fixed all false reports. After changes in arm_adi_v5 infrastructure secured devices was not detected at all. New algorithm uses multiple MDM STAT reads and counts MDM_STAT_SYSSEC and MDM_STAT_FREADY bits. Both secured MCU and MCU locked-up in RESET/WDOG loop are detected reliably. Detection is run in both kx.cfg and klx.cfg from examine-start event, not examine-end as before. Event is configured only for non hla adapter. Minor fix in klx.cfg: commented out adapter_khz 24000 in reset-init. Such frequency is not supported in VLPR CPU mode and with JTAG. Change-Id: I2ec2b68c45bde9898159cd15fbdcbcfa538c41d9 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3547 Tested-by: jenkins Reviewed-by: Steven Stallion <stallion@squareup.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-14target/stm32f4x.cfg: Add STM32F410/F412/F469.Uwe Bonnes1-1/+11
Taken from git://git.ac6.fr/openocd commit e8ed67c42227b7072a1e7 Change-Id: Iac106d4823123eaa96f16a975e7ecbcb24189924 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/3377 Tested-by: jenkins Reviewed-by: Stian Skjelstad <stian@nixia.no> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
generated by cgit v1.1 at 2024-11-16 13:04:56 +0000