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2017-02-10aarch64: deconflict debug register namesMatthias Welwarsky2-127/+131
CPUDBG_ -> CPUV8_DBG_ for armv8 debug registers. Change-Id: I3d24cc209309fa9bbeb5c3e6c88a572383c9360e Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10aarch64: Implement MA mode for bulk memory reads and writesMatthias Welwarsky1-84/+165
- 64bit addresses are supported - Aarch32 state is supported Change-Id: I8c37fa166954d09195d08c6963b8017194e350f5 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10aarch64: make DCC read/write functions operate on struct armv8_commonMatthias Welwarsky1-30/+31
Change the signature of aarch64_(read|write)_dcc[_64] to take a "struct armv8_common *" as the context to operate on. No functional change. Change-Id: Ie501113f65ea22aff2eee173ec717f6908a63494 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10aarch64: introduce dpm extension for ARMv8Matthias Welwarsky9-260/+1400
Add or move ARMv8 related dpm function to their own source module Change-Id: Id93d50be0b8635bd40ddb2a74fe8746ff840d736 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10target: add -ctibase config option in addition to -dbgbaseMatthias Welwarsky2-1/+21
Some vendors don't fully populate the ROM table, e.g. BCM2357 (used in Raspberry Pi 3) doesn't list CTI, however it is mandatory for halting an ARMv8 core and therefore it's always present (and required), regardless of the ROM table listing it or not. Change-Id: Ia18a4f1b5b931ccd19805b188ebf737c837c6b54 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10aarch64: fix reading of MPIDRMatthias Welwarsky1-1/+2
read MPIDR register through correct MSR instruction. Change-Id: I7e2d00c2871191c4168b177a7a809443b0db4c82 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10aarch64: add symbolic definitions for armv8 opcodesMatthias Welwarsky2-0/+127
To replace hexadecimal constants with descriptive names and increase flexibility. Change-Id: I6f7b6f045866ed8b9360f54b640ecdb307eebc51 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10aarch64: Correct target state for hardware stepDavid Ung2-2/+12
When using hardware step for doing stepping, the existing DSCR records the event as external debug request. This will generate a SIGINT event to GDB and causes it to stop the stepping process. For aarch64, read DESR to check if the event is a hardware step and set state to DBG_REASON_SINGLESTEP. With this patch, GDB can now do source level stepping. Change-Id: I1d06f819578c74b3ac17376c67f882adddea1f52 Signed-off-by: David Ung <david.ung.42@gmail.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10aarch64: Enable resuming with addressDavid Ung1-9/+5
Enable resuming to an address. Change-Id: I29c7d3b56f6cbf8b3cd02c93733fc96f45000af3 Signed-off-by: David Ung <david.ung.42@gmail.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10aarch64: Add instruction stepping support using hardware steppierre Kuo2-36/+14
Use AARCH64's hardware step event to do stepping. Change-Id: I2d029ceeadd381913d0c3355c8787b11dacff7f7 Signed-off-by: pierre Kuo <vichy.kuo@gmail.com> Signed-off-by: David Ung <david.ung.42@gmail.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10aarch64: Enable halting debug mode on breakpoint setDavid Ung1-0/+12
Ensure that we allow halting debug mode after setting breakpoint Change-Id: I6f0d7a4a4775a93c133fb1ec31dfe3324d9f7395 Signed-off-by: David Ung <david.ung.42@gmail.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10aarch64: Add hardware breakpoint supportpierre Kuo1-20/+19
Enable the use of hardware breakpoint on AARCH64. Change-Id: I59caaa6d92ac60278af8938625b1790a1787372f Signed-off-by: pierre Kuo <vichy.kuo@gmail.com> Signed-off-by: David Ung <david.ung.42@gmail.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10aarch64: Add ARMv8 AARCH64 support filesDavid Ung9-9/+3701
Add new AARCH64 target and ARMv8 support files. This is an instantiation from the cortex_a files but modified to support 64bit ARMv8. Not all features are complete, notably breakpts and single stepping are not yet implemented. Currently it lets you halt of the processors, resume, dump cpu registers, read/write memory and getting a stack trace with gdb. > halt invalid mode value encountered 5 target state: halted unrecognized psr mode: 0x5 target halted in ARM state due to debug-request, current mode: UNRECOGNIZED cpsr: 0x600001c5 pc: 0x00093528 MMU: disabled, D-Cache: disabled, I-Cache: disabled > targets TargetName Type Endian TapName State -- ------------------ ---------- ------ ------------------ ------------ 0* cpu0 aarch64 little cpu.dap halted > reg ===== arm v8 registers (0) r0 (/64): 0x00000000FFFFFFED (dirty) (1) r1 (/64): 0x00000000F76E4000 (2) r2 (/64): 0x0000000000000000 (3) r3 (/64): 0x0000000000010000 (4) r4 (/64): 0xFFFFFFC06E2939E1 (5) r5 (/64): 0x0000000000000018 (6) r6 (/64): 0x003A699CFB3C8480 (7) r7 (/64): 0x0000000053555555 (8) r8 (/64): 0x00FFFFFFFFFFFFFF (9) r9 (/64): 0x000000001FFEF992 (10) r10 (/64): 0x0000000000000001 (11) r11 (/64): 0x0000000000000000 (12) r12 (/64): 0x00000000000000F0 (13) r13 (/64): 0x00000000EFDFEAC8 (14) r14 (/64): 0x00000000F6DDA659 (15) r15 (/64): 0x0000000000000000 (16) r16 (/64): 0xFFFFFFC0000F9094 (17) r17 (/64): 0x0000000000000000 (18) r18 (/64): 0x0000000000000000 (19) r19 (/64): 0xFFFFFFC00087C000 (20) r20 (/64): 0x0000000000000002 (21) r21 (/64): 0xFFFFFFC000867C28 (22) r22 (/64): 0xFFFFFFC000916A52 (23) r23 (/64): 0xFFFFFFC00116D8B0 (24) r24 (/64): 0xFFFFFFC000774A0C (25) r25 (/64): 0x000000008007B000 (26) r26 (/64): 0x000000008007D000 (27) r27 (/64): 0xFFFFFFC000080450 (28) r28 (/64): 0x0000004080000000 (29) r29 (/64): 0xFFFFFFC00087FF20 (30) r30 (/64): 0xFFFFFFC000085114 (31) sp (/64): 0xFFFFFFC00087FF20 (32) pc (/64): 0xFFFFFFC000093528 (33) xPSR (/64): 0x00000000600001C5 And from gdb (gdb) bt #0 cpu_do_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/mm/proc.S:87 #1 0xffffffc000085114 in arch_cpu_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/kernel/process.c:107 #2 0x0000000000000000 in ?? () Change-Id: Iccb1d15c7d8ace7b9e811dac3c9757ced4d0f618 Signed-off-by: David Ung <david.ung.42@gmail.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10arm_dpm: Add 64bit register handling.David Ung2-86/+257
Add various function to read/write ARMv8 registers. Change-Id: I16f2829bdd0e87b050a51e414ff675d5c21bcbae Signed-off-by: David Ung <david.ung.42@gmail.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10arm_dpm: Add new state ARM_STATE_AARCH64David Ung3-0/+8
Add new enum ARM_STATE_AARCH64 to the list of possible states. Change-Id: I3cb2df70f8d5803a63d8374bf3eb75de988e24f8 Signed-off-by: David Ung <david.ung.42@gmail.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10server: Allow 64 address to be send over GBD serverDavid Ung1-13/+13
Accept 64 bit addresses from GDB read memory packet. Also allow breakpoint/stepping addresses to take 64bit values. Change-Id: I9bf7b44affe24839cf30897c55ad17fdd29edf14 Signed-off-by: David Ung <david.ung.42@gmail.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10target: Add 64-bit target address supportDongxue Zhang67-546/+716
Define a target_addr_t type to support 32-bit and 64-bit addresses at the same time. Also define matching TARGET_PRI*ADDR format macros as well as a convenient TARGET_ADDR_FMT. In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000) be least invasive by leaving the formatting unchanged apart from the type; for generic code adopt TARGET_ADDR_FMT as unified address format. Don't silently change gdb formatting here, leave that to later. Add COMMAND_PARSE_ADDRESS() macro to abstract the address type. Implement it using its own parse_target_addr() function, in the hopes of catching pointer type mismatches better. Add '--disable-target64' configure option to revert to previous 32-bit target address behavior. Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5 Signed-off-by: Dongxue Zhang <elta.era@gmail.com> Signed-off-by: David Ung <david.ung.42@gmail.com> [AF: Default to enabling (Paul Fertser), rename macros, simplify] Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-01-20arm_dpm: avoid duplicating the register cacheMatthias Welwarsky1-4/+7
This bug was already attempted to fix in an earlier patch but merging the "defer-examine" feature caused a regression, which this patch tries to fix again. Change-Id: Ie1ad1516f0d7f130d44e003d6c29dcc1a02a82ca Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3951 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15jtag: core: report TRST and SRST as asserted only when they really arePaul Fertser1-2/+2
When SRST is never enabled, the global jtag_srst variable is left at its initial state, that is, -1, and it does _not_ mean SRST is currently asserted. Same about TRST. Fixes "reset halt" in cases when srst_pulls_trst but srst usage is not enabled. Change-Id: I8d2e9120479de4cfbf5561033926c9ef945eecc9 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3943 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-01-15flash/nor: fix doc/help and range test for flash protectTomas Vanek2-7/+15
Commit 77a1c01ccbb1150ffe749a7373cf6c4dc15ecad0 introduced infrastructure for utilizing protection blocks of different size than erase sector. Parts of doc/help kept reading 'sector' instead of 'protection block'. flash_driver_protect() parameter range testing did not switched to bank->num_prot_blocks. This change fixes it. Change-Id: Iec301761190a1a1bcc4cb005a519b9e5e4fede51 Reported-by: Mark Odell <mark@odell.ws> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3917 Tested-by: jenkins Reviewed-by: Mark Odell <mrfirmware@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15adi_v5_jtag: make sure SSTICKYERR is cleared after a PORMatthias Welwarsky1-6/+1
Don't terminate the transaction end-check early if debug power-loss was detected, without clearing SSTICKYERR. Change-Id: I83b6a4a20523eea42e48a15297f972a730aa21a8 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3947 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15helper,rtos,server: Restore missing warning flagsAndreas Fritiofson3-3/+3
These libraries override the used CFLAGS without adding the defaults. This didn't have any effect until change http://openocd.zylin.com/3870 (ef4c139). Restore by adding AM_CLAGS to the per-target CFLAGS. Interestingly, automake seems to clear the CFLAGS for the target even if the override variable is only mentioned within a non-active conditional branch, such as the IS_MINGW for the affected libraries. Change-Id: I805206865e59e3fa33a7ea3c0d3472e51219351c Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3927 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-01-15jtag: drivers: build usb_blaster only if enabledPaul Fertser1-1/+1
Fix build failure when libusb dev files are not available and so usb_blaster is disabled. Change-Id: I4cda7df689cdb4b62b733cbbab813241cf561e29 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3920 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2017-01-15libjaylink: Update to 0.1.0 releaseMarc Schink1-0/+0
Change-Id: I5a905ccda346c09187f7f8e8229ae71d3353128f Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3946 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-25target: armv7a: remove unused level_num field from armv7a_cachesizePaul Fertser1-1/+0
This was never used and produces warnings on some systems. Change-Id: I48d2c5b79890bb2d70c5fae95278b8eb62743398 Reported-by: Tommy Murphy <tm1234@users.sf.net> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3891 Tested-by: jenkins
2016-12-25target: cortex_a: fix segfault when SPSR is not properly handledPaul Fertser1-9/+11
OpenOCD doesn't (yet) know how to handle HYP mode properly so spsr register is not getting initialised when OpenOCD connects to a target stopped in this mode. Reported on IRC by thinkfat and nearffxx. Change-Id: I4bda9ba0c582c8e9cacefe708cc4a3d947151f84 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3906 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Chengyu Zheng <chengyu.zheng@polimi.it>
2016-12-25Search for scripts relative to the executable on all(?) platformsAndreas Fritiofson1-33/+122
Add a helper to hide the platform-dependent method to get a canonical, absolute, /-separated path to the executable. Use this and the relative path from BINDIR to PKGDATADIR to construct a search path that finds the scripts even if the installation dir is moved, as long as the structure below $prefix is maintained. This method should fully support all the tricks you can to with autotools to customize the installed layout such as overriding the default directories at configure-time and overriding the configured directories at build-time. The exe path detection methods are combined from http://openocd.zylin.com/3388 by Rick Foos and http://openocd.zylin.com/3537 by Steven Stallion, as well as tips found all over internet. Change-Id: Ifc9cc9dd0bf52fbd67b1b0f2383318cda0c422c4 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Signed-off-by: Steven Stallion <sstallion@gmail.com> Reviewed-on: http://openocd.zylin.com/3889 Tested-by: jenkins Reviewed-by: Rick Foos <rfoos@solengtech.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-25jtag: drivers: ulink: fix uninitialised variable warningPaul Fertser1-1/+1
This prevents clean build when --enable-verbose-jtag-io is used. Change-Id: I5c9e6968cfa425b1f6f92f59156b6ae38cb9af18 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3907 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-12-08Convert to non-recursive makeAndreas Fritiofson20-735/+599
Change-Id: I11f8bc8553957e2ff083c09e72e16881e4d3bb6f Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3865 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08configure: Use same case for libjaylink as for other libsAndreas Fritiofson2-2/+2
Change-Id: I60d91a0543d9b8c580254cdc5f04b2e60209b98b Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3868 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08target: LS1_SAP: fix "declaration of 'read' shadows a global" warningPaul Fertser1-4/+4
Change-Id: I7070193819cc134f9fe1427c20a11160ec415ccb Reported-by: Jens Bauer <jens-lists@gpio.dk> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3877 Tested-by: jenkins
2016-12-08target: Replace malloc+manual zeroing with callocAndreas Fritiofson1-8/+1
Change-Id: I3c782c34b59cb36b8ca1d36e9c804c67bae5cb45 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3667 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08jlink: Output libjaylink versionMarc Schink1-0/+3
Output the package version of libjaylink to ease debugging. Change-Id: I3b9da6d046d140ba850056c98e67bed22c885ee0 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3887 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08libjaylink: Update to latest master branchMarc Schink2-6/+6
The changes since the last update are mainly related to the build system, preparations and cleanups for the upcoming release. If there are no bugs reported, this will be the last update before the libjaylink 0.1.0 release. Change-Id: I4cec9bb61159f6153690aaf39c1d12ba0baacf9b Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3886 Tested-by: jenkins Reviewed-by: Xiaofan <xiaofanc@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08jlink: Add EMUCOM supportMarc Schink1-0/+143
EMUCOM is a way to communicate with a J-Link device via so called channels. A channel can either be read or written in a single operation. Beside the reserved channels for SEGGER, there are channels available to implement vendor and/or device specific functionalities. For example, EMUCOM is used on many starter and development kits from Silicon Labs to access power measurements and various other information and settings. Change-Id: I6094109c043b34aed4a40ceabe71f30ff896bf1d Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3794 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08flash/nor/efm32: Support flash size smaller than 32kkevin1-3/+3
The current implementation fails on devices with less than 32k of flash (such as several devices in the Zero Gecko family) because the 'assert' assumes (incorrectly) that the number of flash banks will always be >= 32. This change ensures that at least one word of lock bits is always read in order to support devices with less than 32k of flash. Signed-off-by: Kevlar Harness <software@klystron.com> Change-Id: I59febe2cb690c893a5057a5f72918e146cf2afe4 Reviewed-on: http://openocd.zylin.com/3806 Tested-by: jenkins Reviewed-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08xscale: Move debug handler to contrib/loadersAndreas Fritiofson7-854/+1
Avoid special rules to generate array at compile time by shipping the generated file. Convert to Makefile build like the other loaders. Change-Id: I5a05edddcfaff3d395086cd3aa33120f8a7aa9dc Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3864 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08cortex_a: fix reset for SWD transportMatthias Welwarsky1-3/+10
Change b0698501b0e789091e9f9f1427b32af304888769 fixed reset for i.MX6 and TI Sitara SoCs but broke reset for cortex-a targets that use SWD. This patch is a work- around that forces asserting SRST when SWD is used. Change-Id: I7e39f2a469b9b4b2b74ad48ba49f2eeb58528921 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3641 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08Remove build date from banner for releasesAndreas Fritiofson2-1/+7
In support for reproducible builds, see https://wiki.debian.org/ReproducibleBuilds Fixes Debian bug #834316. Change-Id: Id81ec72a87bf6dd99abfd2a0ae074658111bc9a3 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3866 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08cortex_m: allow setting debug ap during createMatthias Welwarsky5-5/+62
This patch adds a Cortex-M private configuration option that allows setting the acess point during target creation. This circumvents situations in hybrid systems when the correct access point can not be automatically detected. Change-Id: If313a5250e6e66509bb9080f3498feab7781dced Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3639 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08jtag/drivers/openjtag: Add support for Cypress CY7C65215Vianney le Clément de Saint-Marcq1-26/+247
The Cypress CY7C65215 Dual Channel USB-Serial Bridge Controller [1] understands the OpenJTAG protocol over a proprietary USB interface. This patch adds support for the CY7C65215 to the openjtag interface driver. A new configuration option, `openjtag_variant`, allows to select the transport to use. Libusb (1.x or 0.1) is now a hard dependency of the openjtag driver. This should not be a big issue as libftdi also depends on it. [1] http://www.cypress.com/?rID=82870 Change-Id: I55ffb3fd9e006eb311e405d9fb836bb119644bfd Signed-off-by: Vianney le Clément de Saint-Marcq <vianney.leclement@essensium.com> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-on: http://openocd.zylin.com/2805 Tested-by: jenkins Reviewed-by: Jiri Kastner <cz172638@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08helper: Code cleanup for hexify()Marc Schink8-18/+46
Simplify hexify() and do not longer use 0 as special case for the parameter 'count' to determine the string length of the binary input. Instead, use strlen() outside of the function if needed. Additionally, fix the return value and return the length of the converted string. The old function always returned 2 * count. Also, use more appropriate data types for the function parameters and add a small documentation. Change-Id: I133a8ab786b8f7c1296afcaf9c0a0b43881e5112 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3793 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-12-08jtag: drivers: bcm2835gpio: set 4ma drive, slow slew rateSean Cross1-2/+2
Both the drive strength and slew rate are currently set to very high values. This causes the waveforms to overshoot and be less reliable when operating at high speed. This patch lowers the slew rate and sets the drive strength to 4ma, improving the waveform output. Change-Id: I761d35cd64bc54a9e94043904ef00a003b056af0 Signed-off-by: Sean Cross <sean@xobs.io> Reviewed-on: http://openocd.zylin.com/3707 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Philipp Guehring <pg@futureware.at>
2016-12-08gdb_server: support qXfer:threads:read packetSteven Stallion9-24/+145
This patch adds support for the qXfer:threads:read packet. In addition to providing a more efficient method of updating thread state, recent versions of GDB (7.11.1 and up) can also report remote thread names. While thread names are not enabled in this patch due to its limited applicability at the moment, it can be enabled at a later date with little effort. As a part of revamping how threads are presented to GDB, extra info strings for each of the supported RTOSes were updated to match conventions present in the GDB source code. For more information, see remote_threads_extra_info() in remote.c. This results in a much smoother experience when interacting with GDB. It is also worth mentioning that use of qXfer:threads:read works around a number of regressions in older versions of GDB regarding remote thread display. Trust me, it's great. Change-Id: I97dd6a93c342ceb9b9d0023b6359db0e5604c6e6 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/3559 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08semihosting: support fileio operationSteven Stallion11-158/+437
This patch adds support for bridging semihosting to GDB's File-I/O remote protocol extension. For the most part operations match up 1:1, however some require a working area to complete successfully, namely operations that devolve to read, stat, and gettimeofday. A new command was added to enable support for fileio named `arm semihosting_fileio`, which ensures that the default behavior remains intact for those that prefer it. Finally, redundant logging was removed from the target_arch_state function; this permits ARM targets to quiesce log output when polling for a fileio reply. This prevents filling the logs with halt/resume messages when using semihosting fileio. Change-Id: Ifbb864fc2373336a501cc0332675b887b552e1ee Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/3566 Tested-by: jenkins Reviewed-by: Steven Stallion <sstallion@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08at91sam4: Add missing SAM4S family CHIPIDs and remove FWS=6.Owen Kirby1-17/+275
Add missing CHIPID values for all SAM4S parts listed in revision K of Atmel-11100-32-bit Cortex-M4-Microcontroller-SAM4S_Datasheet.pdf. I have also removed the FWS=6 workaround, as this appears to be a copy-paste error from the SAM3X family. Change-Id: I1ce1d82911f39d6fcb8f04034f5c9c9bf2818466 Signed-off-by: Owen Kirby <oskirby@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3837 Tested-by: jenkins
2016-12-08at91sam4: Add flash description and chipid for SAM4Cxx variants.Owen Kirby1-4/+195
Chip ID and flash layout taken from Atmel-11102F-ATARM-SAM4C32-SAM4C16-SAM4C8-SAM4C4-Datasheet_27-Mar-15 and tested on a SAM4C32-EK (rev A). Change-Id: I68aae5b60994c0b5964ea9031d40bc76ba025675 Signed-off-by: Owen Kirby <oskirby@gmail.com> Reviewed-on: http://openocd.zylin.com/3527 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-12-08jtag: drivers: cmsis-dap: fix operation with SAMD10 Xplained boardPaul Fertser1-1/+3
Change-Id: I9164edeb83c9a9106e74798e98b9517177e83358 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/3856 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-12-08helper: Update jep106 database to JEP106ATAndreas Fritiofson1-4/+41
Change-Id: I2dac416189d16938597c073fd35ad654bca7484c Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3871 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08Cortex-R: Force usage of physical memory read/write since there is no MMUEvan Hunter1-2/+2
Change-Id: I69d6e6301ab66744258fe650a76c7241bebe00a8 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/3203 Tested-by: jenkins Reviewed-by: Girts Folkmanis <opensource@girts.me> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Jiri Kastner <cz172638@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
generated by cgit v1.1 at 2024-08-18 15:24:41 +0000