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2017-06-15Accept 64-bit addresses in CRC requests.Tim Newsome1-1/+1
2017-06-13Fix the build.Tim Newsome5-77/+85
2017-06-13Merge branch 'remotes/openocd/master' into riscv64Tim Newsome188-8991/+15088
2017-06-08Fix dmi_read() indentation; remove \n in LOG_ERRORTim Newsome1-25/+25
2017-06-07riscv: Move the initialization of the field inside the structure for consistencyMegan Wachs1-5/+1
2017-06-07riscv: v13 -- dmi_write must still check for the OP resultv20170608Megan Wachs1-21/+17
2017-06-06%p already includes 0x (on gcc)Tim Newsome1-4/+4
2017-06-06Don't leave fd undefined.Tim Newsome1-1/+1
2017-06-02flash: nor: ath79: fix build failure due to recent MIPS changesPaul Fertser1-37/+35
2017-05-31flash: Add support for Atheros (ath79) SPI interfaceTobias Diedrich4-0/+908
2017-05-31imx_gpio: add mmap based jtag interface for IMX processorsGrzegorz Kostka3-2/+561
2017-05-25Return 5 (SIGBREAK) not 2 (SIGINT) after a stepPalmer Dabbelt1-1/+1
2017-05-25Pass EVENT_RESUMED in the RTOSPalmer Dabbelt1-2/+3
2017-05-25Invalidate the register cache when rtos_hartid==-1Palmer Dabbelt1-1/+4
2017-05-25Invalidate the register cache on step, resume, resetPalmer Dabbelt2-0/+14
2017-05-22riscv-v11: Don't perform unexpected operation in cache_writeMegan Wachs1-1/+1
2017-05-15Check for abstractcs.busy, not just CMDERR_BUSYPalmer Dabbelt1-0/+4
2017-05-15Go back to 32-word read/write buffersPalmer Dabbelt1-2/+2
2017-05-15Don't re-read registers after they're writtenPalmer Dabbelt1-8/+0
2017-05-15Print out the actual CSR that's readPalmer Dabbelt1-0/+1
2017-05-15Build fixesPalmer Dabbelt2-3/+3
2017-05-15riscv: Remove some compile warningsMegan Wachs1-2/+0
2017-05-12jtag/drivers: Add Cypress KitProg driverForest Crossman3-0/+977
2017-05-11Shim back in some old interfaces for nowPalmer Dabbelt1-16/+72
2017-05-09Allow all harts to be resetPalmer Dabbelt3-39/+112
2017-05-08stm32l4: support flashing L45x/46x devicesJuha Niskanen1-7/+18
2017-05-08mips32, use scan32 function for reading impcode/idcode.Salvador Arroyo3-60/+19
2017-05-08mips32: add micromips breakpoints supportSalvador Arroyo1-46/+105
2017-05-08mips32: add micromips isa handlingSalvador Arroyo5-19/+91
2017-05-08mips32, convert miniprograms with code definitionSalvador Arroyo1-44/+63
2017-05-08mips32, add support for micromips in debug modeSalvador Arroyo8-270/+374
2017-05-08mips32, add microMips instruction subsetSalvador Arroyo1-0/+95
2017-05-08mips32, add option to avoid check in last instructionSalvador Arroyo3-33/+36
2017-05-08mips32, add realloc codeSalvador Arroyo3-44/+35
2017-05-08mips32, change in pracc_list for dynamic allocationSalvador Arroyo3-44/+45
2017-05-05 Avoid accessing null target->reg_cacheMegan Wachs1-0/+6
2017-05-02Fix compile failure on MacOSXMatthias Welwarsky2-7/+3
2017-05-01riscv-013: more consistent parensMegan Wachs1-2/+2
2017-05-01riscv-013: Correct sign extension of address on read_memory for lower bits as...Megan Wachs1-1/+1
2017-05-01riscv-013: Correct sign extension of address on read_memoryMegan Wachs1-2/+2
2017-05-01Correct debugging print in read_memoryMegan Wachs1-1/+1
2017-05-01Fix an assertion when reading from 0Palmer Dabbelt1-1/+1
2017-05-01Correct previous hart caching logicPalmer Dabbelt1-1/+2
2017-04-27Clean up unused read_memory codePalmer Dabbelt1-31/+0
2017-04-26Correct an off-by-one in argument parsingPalmer Dabbelt1-1/+1
2017-04-26Keep calling the old poll on v0.11 targetsPalmer Dabbelt1-2/+11
2017-04-26Initialize all registers in examinePalmer Dabbelt1-0/+3
2017-04-26riscv: Fix some blocking compile warningsMegan Wachs2-5/+7
2017-04-26fespi: Allow the ctrl_base address specified as a parameterMegan Wachs1-14/+25
2017-04-26Add 64-bit and multihart supportPalmer Dabbelt22-1451/+3210