Age | Commit message (Collapse) | Author | Files | Lines |
|
Change-Id: Icec244b174cc0c67ab58961649a369db7f344824
|
|
Change-Id: I8f539c880ee5da864956f56943411b228d8a5812
|
|
Change-Id: Iadf7b2a926d6d5abc4c8daa2f5620886bcb09b31
|
|
Update debug_defines to the one used with spike.
|
|
Use %ll instead of %L in scanf.
|
|
Change-Id: I627c6ee557d98239227324c33f9b89f6280cbf93
|
|
Fix Windows build
|
|
I'm surprised this built with gcc before.
Fixes Issue #150.
Change-Id: I24d2957783c66ad53d5b532a4e930349a2059a97
|
|
This lets users tell OpenOCD which non-standard CSRs exist on their
target, that will also be accessible and whose existence will be
communicated to gdb.
Change-Id: I56163a9fcb84ad7ebe815ae74fbd9fcc208f5a9d
|
|
Also update encoding.h.
Change-Id: I275be7de0aa1af64d13ea191b9f4ff391cfb16dc
|
|
Change-Id: If198d10e16671b9868836e23386aaf8d4b05f317
|
|
Change-Id: I09989d4c0e102889ecb0eedbd3f4138f8b7bdb8c
|
|
Change-Id: Ia54f778152974164697b712c360918e17a127d95
|
|
Change-Id: I7a172d83055d8bd833e3349a5b22b47dd5f31f5c
|
|
Change-Id: I4e05eb091823b2e0fb481ca0b599072ba1ca70f2
|
|
Change-Id: I888680e73682582438a0de0496238867f1604754
|
|
Now we don't have to play tricks fooling other parts of our code that
might assert.
Change-Id: Ia574378e1f95ed62d297e6b2e852245e58c9ffc9
|
|
(It's really only 2 bits, but something wonky happens between gdb and
OpenOCD if I make it that size.)
Change-Id: I562a65cb0ebe5aa0edcc54c251d0fea0e26f9cb1
|
|
On HiFive1, FPRs show up with no name, and misa is 0x1105 instead of
0x40001105.
Change-Id: I4ee223c905ad7d860147014e7b6394668658c6ea
|
|
Change-Id: Iffa8fa5ff4b0a01abd30fa302b7087e2011337bf
|
|
Use the ABI ones for every register that we have one for.
Change-Id: I2a993abff416d2652dbe026b3fb498e144a5006f
|
|
Change-Id: I1a234ee07c417ba56da10a61fc2bdbdcc60490a8
|
|
Change-Id: I988c0c36f2de8157d76874a697b3c054773b787d
|
|
Also properly support (I think) D extension on RV32.
Change-Id: I2f0162d36e4c18c251f99b6943403cef30d17d29
|
|
Change-Id: I9599aacc256f6340795097732b6f8e8869c2099f
|
|
Mac build barfs on L, and the manpage says they're equivalent.
Hopefully fixes #147
Change-Id: I3aa57775731f3f5ceb03097cae2a9dc6fd426dcd
|
|
Now reading 64-bit FPRs on 32-bit harts using scratch memory might work.
Change-Id: Ie8c0fc689386c6e724ecab5e8c855e725fa8dd97
|
|
Fixes #138
Change-Id: I4d9b49762e318fe91f1561ed315829b43daefef4
|
|
Events reset-halt-pre, reset-halt-post, reset-wait-pre and
reset-wait-post are not used anywhere.
Change-Id: I9a0f94875b102d9b08f6c2fd9d73a9f05f8e8e79
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4285
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
|
|
Theese devices do not have a gap in sector numbering.
The driver translates sectors numbers 12 13... to 16 17... as used on dual
bank flash devices. Therefore erase of sector 12 and above fails with error
'stm32x device protected'
on F413/423.
Drop sector number translation for devices without has_large_mem flag.
Change-Id: I65531c0dfe02e2fd0f3d68f0615e0926e9901391
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4299
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
|
|
A protection block comprises two adjacent sectors in dual bank mode.
As there are 64 and 128kB sectors joined in blocks 2 and 8, block size
should be computed as a sum of sector sizes.
Change-Id: Ie915df8cf7ca232c4565d7e0c514c8933e71fdfe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4271
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
|
|
Extend HLA interface to allow multiple VID/PID pairs and use it to
autodetect the connected stlink version.
Change-Id: I35cd895b2260e23cf0e8fcb1fc11a78c2b99c69b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3961
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
|
|
Change-Id: I4e3a36fac77fefa271ae9facbaa990fa330501ae
|
|
Support program buffers that are just 2 instructions large
|
|
New STM8 target based mostly on mips4k. Target communication
through STLINK/SWIM. No flash driver yet but it is still possible
to program flash through load_image command. The usual target debug
methods are implemented.
Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/3953
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
|
|
Add basic support for:
-STM32H7x (Embedded flash 2M)
Erase and write tested on stm32h743.
Change-Id: Ie8d8786227cdeee39fcf5663167a053ad8dcef4c
Signed-off-by: RĂ©mi Prud'homme <remi.prudhomme@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4181
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
|
|
The CMSIS-DAP used by NXP's LS1012ARDB board only supports JTAG,
and not SWD. Calling cmsis_dap_cmd_DAP_SWD_Configure returns with an
error (and doesn't actually do anything in the debugger).
Wrap the call to cmsis_dap_cmd_DAP_SWD_Configure in a check for
swd_mode, to make sure initialisation doesn't fail needlessly.
Change-Id: Id7e568cb6e36886bd7c5b3699d198a77a51c28c9
Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Reviewed-on: http://openocd.zylin.com/4294
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
|
|
* 256 MBit SPI flash
* https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_l_256_aba_0.pdf spells out the entire zoo of IDs
* used e.g. on Xilinx KCU105
Change-Id: I18b19292b4869627adb9071266271962fec68fb4
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4186
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
|
|
Change-Id: I71c2f2553a29e9ef167ff3313cc06c7b31c64190
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4278
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
|
|
Change-Id: I2c66bf6da734a3b71e358553943e9fc3c6578c39
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4277
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
|
|
Change-Id: Ieea1b0dec88818e9e8d5c8c5d54aa8959556d77b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4275
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
|
|
Change-Id: I91ad0431d44ed94f48d20c4690f8642d66f52a9b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4274
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
|
|
Error message instead of failing silently.
Change-Id: Ie54a5bf68459d3c0e96cc38080ffad8de0a4b5ce
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4269
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
|
|
Change-Id: Id653500aa525746e8824ff5fd2850c62c8c21c08
|
|
Change-Id: Ida32482903cdfd8eeb043088e84bb1f4f5ac673c
|
|
Clean up this JTAG debug code.
|
|
Change-Id: I1d48cb1f8448ebbf98c8bb369928d1e7a7a78c75
|
|
Change-Id: I14ebf597f41429c0fc3ebac8da9c9f62c78fb1ae
|
|
Because there is no instruction that moves just half of a 64-bit FPR
to/from a GPR, we need to use scratch memory for this operation. This
code can theoretically use:
1. DMI_DATA, if it is memory mapped in the target.
2. DMI_PROGBUF, if it is writable in the target.
3. A user-configured address.
I have only tested this code very lightly. One reason is that gdb thinks
that on RV32 harts every register is 32 bits wide. Another is that this
is mostly proof-of-concept to satisfy the small program buffer code
review, which I don't want to drag out forever.
Existing tests don't realize that floating support was broken with
RV32D, and don't realize that it still doesn't work because of the gdb
problem mentioned above.
This change improves Issue #110 but there's more work to be done.
Change-Id: I99b8a36e5fea26f1d9e16e36cf99adc7be26b944
|
|
The SWDIO buffer has to be enabled, by setting SWDIO_OE, for data on
SWDIO to reach the target. Explicitly do this before sending the
switch sequences for JTAG-to-SWD, etc.
This makes the code insensitive to the state of SWDIO_OE specified in
ftdi_layout_init. It used to work only on adapters with a non-inverted
SWDIO_OE inited to 1, or inverted SWDIO_OE inited to 0.
Change-Id: I4b9e520ac1c7ce2a437251a05fc036bc68de718e
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4270
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
|