index
:
riscv-openocd.git
FE_402_fix
__archive__
add_macos_build
autoconf
bscan_optimization
bscan_tunnel
buf_sget
build32
busy
compliance_dev
debug-log-reg-failure
deinit
dmi_read
dmstatus_version
dsp5680_build
eclipse_memory_read
eclipse_multicore_fix
examine_command
examine_unavailable_harts
examine_unavailable_harts_backup
examine_unavailable_harts_rebase
examine_unavailable_harts_squash
fence_i_fix_for_release
fix-halt-reason-after-singlestep
fix_macbuild
gd32vf103
gdb_next_port
gitignore-build
global
halt_examine
haltreq
hypervisor_translate
jlink
log_output
macbuild
macro
manual_hwbp
master
mem64
mpsse_flush
multicore
new_bscan_approach
newprogram
nohartstatus
old_fixes_and_eclipse_memory_read
old_triggers
print_port
race
rbb_cleanup
regcache
regression_test_janmat_experim
release
remove-slot_t-from-riscv-013
reset_test
reverse-resume-order
riscv
riscv-batch-cleanup
riscv-compliance
riscv-compliance-dev
s2_increment
sba_tests
set_group
static
travis-nop
update_defines
us_xds110
vector2
winbuild
wip
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
Age
Commit message (
Expand
)
Author
Files
Lines
2017-01-25
riscv: disable interrupts for all priviledge levels
Megan Wachs
1
-3
/
+2
2017-01-25
riscv: Use proper UINT packing and unpacking routines for disabling interrupt...
Megan Wachs
1
-5
/
+12
2017-01-25
riscv: Globally disable interrupts when running algorithms.
Megan Wachs
1
-0
/
+12
2016-12-23
Correct off by 1 in malloc, which causes this to fail on macOS (and in theory...
mwachs5
1
-1
/
+1
2016-12-18
riscv: Increase the number of Algorithm Steps
Megan Wachs
1
-1
/
+1
2016-12-07
riscv: implement skeletons for Memory Blank Check and CRC. Otherwise you just...
Megan Wachs
1
-0
/
+30
2016-12-01
Fix issue #6: build failure on gcc 6
Tim Newsome
1
-1
/
+1
2016-11-30
Use portable format specifier for size_t
Albert Ou
1
-1
/
+1
2016-11-27
Don't write SCKDIV when flashing
Megan Wachs
1
-4
/
+0
2016-11-27
Add timeout to infinite loop.
Tim Newsome
1
-1
/
+13
2016-11-25
Add some timeouts that I ran into.
Tim Newsome
1
-11
/
+48
2016-11-25
Cope better if the target unexpectedly resets.
Tim Newsome
1
-4
/
+11
2016-11-23
Fix typo.
Tim Newsome
1
-1
/
+1
2016-11-19
Merge branch 'sifive/add_issi_flash' into riscv
Tim Newsome
1
-1
/
+1
2016-11-19
Fix off-by-one error in assert.
Tim Newsome
1
-1
/
+1
2016-11-19
Add the ISSI SPI Flash to the list
Megan Wachs
1
-1
/
+1
2016-11-18
Flash at 8KB/s, using 10,000 byte working area.
Tim Newsome
2
-67
/
+170
2016-11-17
2KB/s, by using the algorithm more.
Tim Newsome
1
-7
/
+42
2016-11-17
Base work for using a much smarter algorithm.
Tim Newsome
1
-52
/
+203
2016-11-17
Merge branch 'Og' into enable_flash_prog
Tim Newsome
4
-9
/
+9
2016-11-16
Use algorithm to speed up fespi flash programming.
Tim Newsome
2
-378
/
+609
2016-11-14
riscv: In FESPI driver, rename 'wip' to 'tx_wait', a more descriptive name.
Megan Wachs
1
-10
/
+34
2016-11-07
riscv: Correct reading SPI Flash ID
Megan Wachs
1
-16
/
+36
2016-11-04
riscv: Add first cut of Flash driver for Freedom E platforms. Completely unte...
Megan Wachs
4
-0
/
+631
2016-11-01
Make fpu regs work even if mstatus.fs is 0.
Tim Newsome
2
-8
/
+104
2016-10-27
Fix bug with slow targets.
Tim Newsome
1
-11
/
+14
2016-10-24
Add some comments.
Tim Newsome
1
-0
/
+44
2016-10-20
Make CLI step and resume work.
Tim Newsome
1
-24
/
+26
2016-10-20
Use reg_cache structure, to make reg command work.
Tim Newsome
1
-64
/
+78
2016-10-14
Print when we're ready for gdb to connect.
Tim Newsome
1
-0
/
+6
2016-10-13
Be quiet when the target is just running normally.
Tim Newsome
1
-1
/
+0
2016-10-11
Use an easily changed constant for timeout.
Tim Newsome
1
-3
/
+4
2016-10-10
Display pc to the user in 'monitor reset init'.
Tim Newsome
1
-2
/
+13
2016-10-04
Make OpenOCD build using -Og.
Tim Newsome
4
-9
/
+9
2016-10-03
Change invalid access from error to user message.
Tim Newsome
1
-2
/
+2
2016-09-29
Fix off-by-one error in assert.
Tim Newsome
1
-9
/
+9
2016-09-29
Clear dmode triggers when we first halt the target
Tim Newsome
1
-19
/
+42
2016-09-29
Deal with dbus being busy in all cases.
Tim Newsome
1
-17
/
+43
2016-09-27
Read idle, and test all debug RAM.
Tim Newsome
1
-17
/
+73
2016-09-27
Only write to existing dram. Clear dbus error.
Tim Newsome
1
-45
/
+55
2016-09-23
Improve low-level logging.
Tim Newsome
1
-40
/
+79
2016-09-23
Make more code use the scans "class".
Tim Newsome
1
-178
/
+152
2016-09-23
Implement hardware triggers that match spec.
Tim Newsome
2
-239
/
+779
2016-09-23
Optimize read a bit.
Tim Newsome
1
-31
/
+39
2016-09-23
Properly mark the cache as clean after its written
Tim Newsome
1
-3
/
+3
2016-09-23
Convert some more code for 64-bit.
Tim Newsome
1
-16
/
+17
2016-09-23
Properly write 64-bit PCs.
Tim Newsome
1
-2
/
+2
2016-09-23
WIP for 64-bit support.
Tim Newsome
2
-184
/
+362
2016-09-23
Prevent the State Machine from moving during runtest
Megan Wachs
1
-1
/
+1
2016-09-23
Stop using conditional writes.
Tim Newsome
1
-16
/
+18
[next]