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2017-01-25riscv: disable interrupts for all priviledge levelsMegan Wachs1-3/+2
2017-01-25riscv: Use proper UINT packing and unpacking routines for disabling interrupt...Megan Wachs1-5/+12
2017-01-25riscv: Globally disable interrupts when running algorithms.Megan Wachs1-0/+12
2016-12-23Correct off by 1 in malloc, which causes this to fail on macOS (and in theory...mwachs51-1/+1
2016-12-18riscv: Increase the number of Algorithm StepsMegan Wachs1-1/+1
2016-12-07riscv: implement skeletons for Memory Blank Check and CRC. Otherwise you just...Megan Wachs1-0/+30
2016-12-01Fix issue #6: build failure on gcc 6Tim Newsome1-1/+1
2016-11-30Use portable format specifier for size_tAlbert Ou1-1/+1
2016-11-27Don't write SCKDIV when flashingMegan Wachs1-4/+0
2016-11-27Add timeout to infinite loop.Tim Newsome1-1/+13
2016-11-25Add some timeouts that I ran into.Tim Newsome1-11/+48
2016-11-25Cope better if the target unexpectedly resets.Tim Newsome1-4/+11
2016-11-23Fix typo.Tim Newsome1-1/+1
2016-11-19Merge branch 'sifive/add_issi_flash' into riscvTim Newsome1-1/+1
2016-11-19Fix off-by-one error in assert.Tim Newsome1-1/+1
2016-11-19Add the ISSI SPI Flash to the listMegan Wachs1-1/+1
2016-11-18Flash at 8KB/s, using 10,000 byte working area.Tim Newsome2-67/+170
2016-11-172KB/s, by using the algorithm more.Tim Newsome1-7/+42
2016-11-17Base work for using a much smarter algorithm.Tim Newsome1-52/+203
2016-11-17Merge branch 'Og' into enable_flash_progTim Newsome4-9/+9
2016-11-16Use algorithm to speed up fespi flash programming.Tim Newsome2-378/+609
2016-11-14riscv: In FESPI driver, rename 'wip' to 'tx_wait', a more descriptive name.Megan Wachs1-10/+34
2016-11-07riscv: Correct reading SPI Flash IDMegan Wachs1-16/+36
2016-11-04riscv: Add first cut of Flash driver for Freedom E platforms. Completely unte...Megan Wachs4-0/+631
2016-11-01Make fpu regs work even if mstatus.fs is 0.Tim Newsome2-8/+104
2016-10-27Fix bug with slow targets.Tim Newsome1-11/+14
2016-10-24Add some comments.Tim Newsome1-0/+44
2016-10-20Make CLI step and resume work.Tim Newsome1-24/+26
2016-10-20Use reg_cache structure, to make reg command work.Tim Newsome1-64/+78
2016-10-14Print when we're ready for gdb to connect.Tim Newsome1-0/+6
2016-10-13Be quiet when the target is just running normally.Tim Newsome1-1/+0
2016-10-11Use an easily changed constant for timeout.Tim Newsome1-3/+4
2016-10-10Display pc to the user in 'monitor reset init'.Tim Newsome1-2/+13
2016-10-04Make OpenOCD build using -Og.Tim Newsome4-9/+9
2016-10-03Change invalid access from error to user message.Tim Newsome1-2/+2
2016-09-29Fix off-by-one error in assert.Tim Newsome1-9/+9
2016-09-29Clear dmode triggers when we first halt the targetTim Newsome1-19/+42
2016-09-29Deal with dbus being busy in all cases.Tim Newsome1-17/+43
2016-09-27Read idle, and test all debug RAM.Tim Newsome1-17/+73
2016-09-27Only write to existing dram. Clear dbus error.Tim Newsome1-45/+55
2016-09-23Improve low-level logging.Tim Newsome1-40/+79
2016-09-23Make more code use the scans "class".Tim Newsome1-178/+152
2016-09-23Implement hardware triggers that match spec.Tim Newsome2-239/+779
2016-09-23Optimize read a bit.Tim Newsome1-31/+39
2016-09-23Properly mark the cache as clean after its writtenTim Newsome1-3/+3
2016-09-23Convert some more code for 64-bit.Tim Newsome1-16/+17
2016-09-23Properly write 64-bit PCs.Tim Newsome1-2/+2
2016-09-23WIP for 64-bit support.Tim Newsome2-184/+362
2016-09-23Prevent the State Machine from moving during runtestMegan Wachs1-1/+1
2016-09-23Stop using conditional writes.Tim Newsome1-16/+18