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2017-12-21Use %ll instead of %L instead of scanf.fix_macbuildTim Newsome1-1/+1
Mac build barfs on L, and the manpage says they're equivalent. Hopefully fixes #147 Change-Id: I3aa57775731f3f5ceb03097cae2a9dc6fd426dcd
2017-12-21Merge pull request #145 from riscv/rbb_winTim Newsome2-2/+13
Fix Windows build
2017-12-21Use parens after if.Tim Newsome1-1/+1
I'm surprised this built with gcc before. Fixes Issue #150. Change-Id: I24d2957783c66ad53d5b532a4e930349a2059a97
2017-12-19Add `riscv expose_csrs` command.Tim Newsome1-0/+110
This lets users tell OpenOCD which non-standard CSRs exist on their target, that will also be accessible and whose existence will be communicated to gdb. Change-Id: I56163a9fcb84ad7ebe815ae74fbd9fcc208f5a9d
2017-12-19Hide supervisor registers if there is no S mode.Tim Newsome2-28/+32
Also update encoding.h. Change-Id: I275be7de0aa1af64d13ea191b9f4ff391cfb16dc
2017-12-19Give FPRs ABI names.Tim Newsome2-2/+67
Change-Id: If198d10e16671b9868836e23386aaf8d4b05f317
2017-12-19Remove some debug printfs.Tim Newsome1-2/+0
Change-Id: I09989d4c0e102889ecb0eedbd3f4138f8b7bdb8c
2017-12-19Avoid another assertion failure.Tim Newsome1-1/+5
Change-Id: Ia54f778152974164697b712c360918e17a127d95
2017-12-19Read misa before using it to check for extensions.Tim Newsome1-1/+2
Change-Id: I7a172d83055d8bd833e3349a5b22b47dd5f31f5c
2017-12-19Don't rely on hart count until it's correct.Tim Newsome1-1/+1
Change-Id: I4e05eb091823b2e0fb481ca0b599072ba1ca70f2
2017-12-19Remove no-longer-true comment.Tim Newsome1-1/+0
Change-Id: I888680e73682582438a0de0496238867f1604754
2017-12-19Simplify examine()Tim Newsome1-43/+13
Now we don't have to play tricks fooling other parts of our code that might assert. Change-Id: Ia574378e1f95ed62d297e6b2e852245e58c9ffc9
2017-12-19Make priv register 8 bits.Tim Newsome1-0/+1
(It's really only 2 bits, but something wonky happens between gdb and OpenOCD if I make it that size.) Change-Id: I562a65cb0ebe5aa0edcc54c251d0fea0e26f9cb1
2017-12-19WIP xml register for 0.11.Tim Newsome4-392/+290
On HiFive1, FPRs show up with no name, and misa is 0x1105 instead of 0x40001105. Change-Id: I4ee223c905ad7d860147014e7b6394668658c6ea
2017-12-19Hide unknown registers, which probably don't existTim Newsome2-13/+21
Change-Id: Iffa8fa5ff4b0a01abd30fa302b7087e2011337bf
2017-12-19Fix register names.Tim Newsome5-46/+108
Use the ABI ones for every register that we have one for. Change-Id: I2a993abff416d2652dbe026b3fb498e144a5006f
2017-12-19WIP better CSR names, and include only existingTim Newsome1-1/+32
Change-Id: I1a234ee07c417ba56da10a61fc2bdbdcc60490a8
2017-12-19WIP. Hide FPRs if the hart doesn't support F/D.Tim Newsome2-23/+31
Change-Id: I988c0c36f2de8157d76874a697b3c054773b787d
2017-12-19`make all` debug tests now pass.Tim Newsome3-73/+106
Also properly support (I think) D extension on RV32. Change-Id: I2f0162d36e4c18c251f99b6943403cef30d17d29
2017-12-19Checkpoint that seems to work.Tim Newsome1-0/+30
Change-Id: I9599aacc256f6340795097732b6f8e8869c2099f
2017-12-14Fix cut and paste bug.Tim Newsome1-1/+1
Now reading 64-bit FPRs on 32-bit harts using scratch memory might work. Change-Id: Ie8c0fc689386c6e724ecab5e8c855e725fa8dd97
2017-12-14Use abstraction because Windows is not POSIXTim Newsome2-2/+13
Fixes #138 Change-Id: I4d9b49762e318fe91f1561ed315829b43daefef4
2017-12-11Fix build.Tim Newsome1-2/+2
Change-Id: I4e3a36fac77fefa271ae9facbaa990fa330501ae
2017-12-11Merge pull request #131 from riscv/small_progbufTim Newsome7-1018/+780
Support program buffers that are just 2 instructions large
2017-11-27Update encoding.h.Tim Newsome2-58/+216
Change-Id: Id653500aa525746e8824ff5fd2850c62c8c21c08
2017-11-16Add missing return.Tim Newsome1-0/+1
Change-Id: Ida32482903cdfd8eeb043088e84bb1f4f5ac673c
2017-11-14Merge pull request #127 from riscv/jtag_debugTim Newsome1-62/+10
Clean up this JTAG debug code.
2017-11-01Merge branch 'riscv' into small_progbufTim Newsome2-5/+1
Change-Id: I1d48cb1f8448ebbf98c8bb369928d1e7a7a78c75
2017-10-27Fix compile warning with new gcc.Tim Newsome1-1/+1
Change-Id: I14ebf597f41429c0fc3ebac8da9c9f62c78fb1ae
2017-10-27Support 64-bit FPRs on RV32.Tim Newsome3-34/+328
Because there is no instruction that moves just half of a 64-bit FPR to/from a GPR, we need to use scratch memory for this operation. This code can theoretically use: 1. DMI_DATA, if it is memory mapped in the target. 2. DMI_PROGBUF, if it is writable in the target. 3. A user-configured address. I have only tested this code very lightly. One reason is that gdb thinks that on RV32 harts every register is 32 bits wide. Another is that this is mostly proof-of-concept to satisfy the small program buffer code review, which I don't want to drag out forever. Existing tests don't realize that floating support was broken with RV32D, and don't realize that it still doesn't work because of the gdb problem mentioned above. This change improves Issue #110 but there's more work to be done. Change-Id: I99b8a36e5fea26f1d9e16e36cf99adc7be26b944
2017-10-25Remove unused variables.Tim Newsome1-4/+0
Change-Id: I678d0a65c22792895375dc6916381f81af8f83e4
2017-10-24Remove more unused functionality.Tim Newsome1-6/+0
Change-Id: I43283b9556c959f891a587fb39bdd1ab9206e8af
2017-10-24Add a fence after memory writes.Tim Newsome1-7/+16
Change-Id: I5137479b685f735aa573cec5d40170016c40f597
2017-10-24Remove more unused code.Tim Newsome1-6/+0
Change-Id: I962660f58d948f85df6e073065e15e5d8f4a02b6
2017-10-24Remove more unused code.Tim Newsome1-48/+6
Change-Id: Id91237c163d86e8f4d039503ca33b4ad7571ecd1
2017-10-23Remove unused functionality.Tim Newsome2-268/+0
Change-Id: Ic70cebd62bbd04f7ae5566504fbb279a11de57f0
2017-10-23Properly fix memory read when encountering busy.Tim Newsome1-36/+101
Change-Id: I377054495e860076edc2f38d1cc0f11c23f98d3b
2017-10-18Pay attention to impebreak.Tim Newsome4-64/+95
This required updating debug_defines.h, which caused a few other small cleanups as well. Change-Id: I3c2cb418d7eff3093d7664c5563b2af5e8b530eb
2017-10-18Remove unused functionality.Tim Newsome2-73/+3
Change-Id: I0c1464e2e6aa12d0cb1025ed0a7c1c483e7403b7
2017-10-18Still restore registers if an access failed.Tim Newsome1-8/+11
Change-Id: I11571f0926f69a34f95b4929f633fdecd3a4e810
2017-10-18Fix FPR access.Tim Newsome1-5/+8
Change-Id: I1379de87904f1cf40b45d1a5490249e3ba90d7d0
2017-10-17Don't crash when encountering RV64.Tim Newsome1-7/+3
Change-Id: Ie915ce830c3499919e4918ad443a5e225cf8c4d9
2017-10-17Memory read/write works if the core can keep up.Tim Newsome1-11/+8
Change-Id: Ieca50ece266fbc9d2ff16a5cc2e6b4b926ad5e6f
2017-10-17MemTest64 passes.Tim Newsome2-4/+18
Change-Id: I75996b71c3f31025c89ef596a08e01d191405336
2017-10-16Memtest{16,32} pass.Tim Newsome4-217/+126
Change-Id: I15c2a4fd2bb9a7b30762d07f3b3a74d2f477746b
2017-10-13At least some memory writes work.Tim Newsome3-130/+94
Change-Id: I6fcf261341f10ec34df01bb844744439d02471a8
2017-10-12Register read/write might be working.Tim Newsome2-72/+67
Change-Id: I6c51d6157dde56d8cd666b4d30ec7bbc7a4bef9f
2017-10-12WIP; doesn't work.Tim Newsome5-174/+55
Change-Id: Ia407e82ccbd2044ad61e0845d285dd5765154476
2017-10-10Remove duplicate progbuf size variable.Tim Newsome1-21/+13
Change-Id: I662ff84d13ecfc7faae51406a4df57a3643116f0
2017-10-09Merge pull request #123 from riscv/fast_rbbTim Newsome3-33/+147
Add read buffer to bitbang, improving performance.
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