aboutsummaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Expand)AuthorFilesLines
2017-12-22Merge branch 'master' into updateTim Newsome54-791/+4228
2017-12-21Fix flash/run algorithm with new register namesTim Newsome2-5/+8
2017-12-21Make functions static. Free memory.Tim Newsome1-10/+12
2017-12-21Merge pull request #155 from riscv/debug_definesMegan Wachs1-22/+48
2017-12-21Merge pull request #148 from riscv/macbuildMegan Wachs1-1/+1
2017-12-21Update debug_defines to the one used with spike.Tim Newsome1-22/+48
2017-12-21Merge pull request #145 from riscv/rbb_winTim Newsome2-2/+13
2017-12-21Use parens after if.Tim Newsome1-1/+1
2017-12-19Add `riscv expose_csrs` command.Tim Newsome1-0/+110
2017-12-19Hide supervisor registers if there is no S mode.Tim Newsome2-28/+32
2017-12-19Give FPRs ABI names.Tim Newsome2-2/+67
2017-12-19Remove some debug printfs.Tim Newsome1-2/+0
2017-12-19Avoid another assertion failure.Tim Newsome1-1/+5
2017-12-19Read misa before using it to check for extensions.Tim Newsome1-1/+2
2017-12-19Don't rely on hart count until it's correct.Tim Newsome1-1/+1
2017-12-19Remove no-longer-true comment.Tim Newsome1-1/+0
2017-12-19Simplify examine()Tim Newsome1-43/+13
2017-12-19Make priv register 8 bits.Tim Newsome1-0/+1
2017-12-19WIP xml register for 0.11.Tim Newsome4-392/+290
2017-12-19Hide unknown registers, which probably don't existTim Newsome2-13/+21
2017-12-19Fix register names.Tim Newsome5-46/+108
2017-12-19WIP better CSR names, and include only existingTim Newsome1-1/+32
2017-12-19WIP. Hide FPRs if the hart doesn't support F/D.Tim Newsome2-23/+31
2017-12-19`make all` debug tests now pass.Tim Newsome3-73/+106
2017-12-19Checkpoint that seems to work.Tim Newsome1-0/+30
2017-12-15Use %ll instead of %L instead of scanf.macbuildTim Newsome1-1/+1
2017-12-14Fix cut and paste bug.Tim Newsome1-1/+1
2017-12-14Use abstraction because Windows is not POSIXTim Newsome2-2/+13
2017-12-12target: remove unused event definitionsTomas Vanek2-8/+0
2017-12-12flash/nor/stm32f2x: fix erase on STM32F413/423Tomas Vanek1-4/+10
2017-12-12flash/nor/stm32f2x: fix protection block size for F767 in dual bank modeTomas Vanek1-1/+2
2017-12-12jtag: drivers: stlink: handle all versions with single configPaul Fertser4-28/+44
2017-12-11Fix build.Tim Newsome1-2/+2
2017-12-11Merge pull request #131 from riscv/small_progbufTim Newsome7-1018/+780
2017-12-07stm8 : new targetAke Rehnman4-0/+2301
2017-12-06flash: Add new stm32h7x driver supportAlexandre Torgue3-0/+1186
2017-12-06Only call cmsis_dap_cmd_DAP_SWD_Configure when swd_mode is enabledBas Vermeulen1-5/+8
2017-12-06spi: add n25q256 flashRobert Jordens1-48/+50
2017-12-06server/gdb: Use 'bool' instead of 'int' for boolean valuesMarc Schink1-17/+17
2017-12-06server/gdb: Use get_target_from_connection()Marc Schink1-30/+37
2017-12-06target: Constify parameter of is_armv7m()Marc Schink1-1/+1
2017-12-06rtos: Use 'bool' as return type for detect_rtos()Marc Schink9-29/+29
2017-12-06adi_v5_swd: Add error message when SWD fails to connectJonas Norling1-1/+4
2017-11-27Update encoding.h.Tim Newsome2-58/+216
2017-11-16Add missing return.Tim Newsome1-0/+1
2017-11-14Merge pull request #127 from riscv/jtag_debugTim Newsome1-62/+10
2017-11-01Merge branch 'riscv' into small_progbufTim Newsome2-5/+1
2017-10-27Fix compile warning with new gcc.Tim Newsome1-1/+1
2017-10-27Support 64-bit FPRs on RV32.Tim Newsome3-34/+328
2017-10-27ftdi: Enable SWDIO output before sending data on itJonas Norling1-0/+3
generated by cgit v1.1 at 2024-11-16 20:56:21 +0000