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2018-05-08target: free target SMP list on shutdownMatthias Welwarsky1-0/+12
On SMP targets, the "target smp" command creates a list of targets that belong to the SMP cluster. Free this list when a target gets destroyed on shutdown. For simplicity, the complete list is free'd as soon as the first target of the SMP cluster is destroyed instead of individually removing targets from the list. Change-Id: Ie217ae1efb2e819c288ff3b1155aeaf0a19b06be Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4481 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08target/arm_adi_v5: extend apcsw command to accept arbitrary bitsTomas Vanek3-18/+33
apcsw command was limited to SPROT bit only. Now user can manipulate any bit except size and addrinc fields. Can be used e.g. to set bus signal 'cacheable' on Cortex-M7 Change-Id: Ia1c22b208e46d1653136f6faa5a7aaab036de7aa Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4431 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08arm_adi_v5: Add ability to ignore the CSYSPWRUPACK bitMatthias Welwarsky4-9/+22
The CTRL/STAT register in the ARM DAP DP has a debug power up ack bit and a system power up ack bit. Some devices do not set the system power up ack bit until sometime later. To avoid having the initial target examination fail due to this or to have a sticky bit error report claim power failure due to this a user can now specify that this bit should be ignored. Change-Id: I2451234bbe904984e29562ef6f616cc6d6f60732 Signed-off-by: Eric Katzfey <eric.katzfey@mentalbee.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3710 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-07Don't error if hart select isn't implemented.Tim Newsome1-1/+1
It's not implemented for 0.11 because we don't need it. Returning error caused 0.11 targets to not be debuggable since change 848062d0d11679de25be573981df45e2c4880db8. Change-Id: I8b04a1fcf3c3e8bf8340cbf39aaf475d2a213519
2018-05-03Conform to OpenOCD styleTim Newsome1-2/+1
Change-Id: I3954a8ac254b460560fa1414c5921777e4005645
2018-05-03Merge branch 'riscv' into optimizeTim Newsome131-1585/+7213
Change-Id: I2693eb05dee72acd2df5d8594c51e9da08ea1cc6
2018-05-03counter*h registers only exist on RV32Tim Newsome1-0/+66
Fixes #245. Change-Id: If05ec9773dc9975931434f09c431eba122a6e8d0
2018-05-01Merge pull request #246 from darius-bluespec/sysbus-bugfixTim Newsome1-1/+3
Bug fixes for system bus access
2018-05-01Properly retry system bus access if busy error was detected.Darius Rad1-0/+2
2018-05-01Fix polling for system bus busy.Darius Rad1-1/+1
2018-04-30Merge branch 'riscv' into notice_resetTim Newsome129-1525/+7186
2018-04-24fespi: flag an error if offset can't be handled in 3B modeMegan Wachs1-0/+12
2018-04-20Fix mingw32 build.Tim Newsome2-5/+6
Change-Id: If7a57749ba8c49385a4020ce8d2d8dbb94242122
2018-04-20Fix error messages for reset dmi timeouts.Tim Newsome2-52/+53
Change-Id: I00869ba20db6f27415af8e53e7b3e67741bf894d
2018-04-20Make encoding.h pass style guide.Tim Newsome1-0/+2
There's a manual step in commenting this out, but this file changes very rarely. Change-Id: I332d6490940ecc81e18c3b112a7ba415331b9c86
2018-04-20Fix comments in encoding.h.Tim Newsome1-11/+11
This was updated in the source a long time ago: https://github.com/riscv/riscv-opcodes/commit/25881d8a221393cfd996ec074d8003ef31bfc5a6 Change-Id: Ia158205d046522c6802a3a32b330759f5e65566f
2018-04-18Use reset timeout to read dmstatus out of resetTim Newsome1-11/+28
Change-Id: I74cc6a1e006269270c5197994d21523d01206141
2018-04-18Enforce OpenOCD style guide. (#239)Tim Newsome3-16/+10
* Enforce OpenOCD style guide. Change-Id: I579a9f54ed22a774bf52f6aa5bc13bcbd2e82cd8 * Fail if `git diff` fails Change-Id: I57256b0a24247f6123cb0e25a89c1b59867cb3f9 * Maybe every line gets its own shell? Change-Id: I1a6f83e9f3d7cfd39f8933f0dba13c3cf76f71f6 * Maybe this will error properly. Change-Id: I50803cfc229e61158569fb6b609195f7191ecac9 * Take different approach than merge-base Change-Id: I345cbc4eecc4755c7127e8e36e403f7b727010b1 * Fix style issues. Change-Id: I90e71f710858524812d0ab160b25c486b7b099e7
2018-04-12Fix FESPI assert when guessing few algorithm stepsTim Newsome1-29/+35
Instead of trying to predict exactly how many steps will be required (doable but error-prone), just allocate more memory when we need it. Tested against HiFive1, and Arty board image. Change-Id: I3cd9798432e65176616c700ba122daf7a5ed6209
2018-04-09Only write hartsel if we're changing it.Tim Newsome1-2/+12
DebugBreakpoint went from 2.94s to 2.74s. Change-Id: Ia3ab857aea89fb83f0bcdd9a6bb69f256bde13dd
2018-04-09Remove prototype that crept back in.Tim Newsome1-2/+0
Change-Id: I93c4690d6f655d2b4e5121cee889d9143d49b9ed
2018-04-09Merge branch 'master' into from_upstreamTim Newsome123-1346/+6832
Conflicts: src/rtos/rtos.c src/rtos/rtos.h src/server/gdb_server.c Change-Id: Icd5a8165fe111f699542530c9cb034faf30e09b2
2018-04-06Cache registers while halted.Tim Newsome1-15/+57
This saves us from re-reading s0 before doing just about anything program buffer related. Improves DebugBreakpoint from 3.01s to 2.89s. Feels like the improvement should be larger than that. Maybe my metric isn't very good. Change-Id: I85e1a1ddbf09006d76c451a32048be7b773dcfe9
2018-04-06flash/nor/at91samd: Add "nvmuserrow" command.Stefan Arnold1-86/+246
Add option "nvmuserrow" to "at91samd" for changing and reading the register at 0x804000 which represents various fuses. Change-Id: I6382cc4ac15e6b9681e2f30b0ae60397a6289c3b Signed-off-by: Stefan Arnold <sarnold@sh-sw.de> Reviewed-on: http://openocd.zylin.com/4260 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-05Just read abstractcs once when executing a commandTim Newsome1-9/+4
DebugBreakpoint went from 3.41s to 3.05s! Change-Id: Icfc4ad5fb663b3607bf2027fda744b43be662fc5
2018-04-04nrf51: Add HWID 0x008F againTomas Vanek1-5/+6
HWID originally added in commit 7829f31a6dd61297e97d8e94fe98a1658eac833e was accidentally omited during refactoring in commit 52885d2b538dcd4184aae14cf2706fb97acccbd9 While on it move old ingeneering sample of 51822 to block of 51822 rev 1 Change-Id: Ie9f15563792a27a72e71df6edbcc6b04490370ed Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4437 Tested-by: jenkins
2018-04-04drivers/kitprog: workaround KitProg firmware bug of missing ZLPTomas Vanek1-3/+13
KitProg firmware does not send a zero length packet at the end of the bulk-in transmission of a length divisible by a bulk packet size. This is inconsistent with the USB specification and results in jtag_libusb_bulk_read() waits forever when a transmission of specific size is received. Limit bulk read size to expected number of bytes for problematic tranfer sizes. Use 1 second timeout as the last resort. Change-Id: Ice80306424afd76e9fbc6851911ffd5109c84501 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4426 Tested-by: jenkins Reviewed-by: Bohdan Tymkiv <bhdt@cypress.com>
2018-04-04target/cortex_m: avoid dwt comparator overflowCody P Schafer1-0/+13
Avoid ever overflowing the DWT_COMPARATOR array by allocating space for 16 comparators (the field is masked by 0xf). On a stm32f767zi chip (on a nucleo-767zi board) I've been seeing crashes with address sanitizer enabled due to its (apparent) 10 present comparators. This appears to be due to https://sourceforge.net/p/openocd/tickets/178/. In non-address sanitizer builds, this would likely cause some random memory to be written to in some cases. (see above bug for observations). Change-Id: I2b7d599eb326236dbc93f74b350c442c9a502c4b Signed-off-by: Cody P Schafer <openocd@codyps.com> Reviewed-on: http://openocd.zylin.com/4458 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-04Fix for warnings detected by clang static analyzerMichele Sardo1-0/+5
Fix for potential memory leakage and for unused/unreported return error code Change-Id: Ifb2c95b60637c3a241ad4bf41d1a328c92ccea4b Signed-off-by: Michele Sardo <msmttchr@gmail.com> Reviewed-on: http://openocd.zylin.com/4476 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-04flash/nor: implement flash bank deallocation in drivers with simple allocTomas Vanek40-4/+45
All drivers which simply allocate one driver_priv memory block per each bank now use default_flash_free_driver_priv() Change-Id: I425bf4213c3632f02dbe11ab819c31eda9b2db62 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4417 Tested-by: jenkins Reviewed-by: Liviu Dudau <liviu@dudau.co.uk> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-03Track misa per-hart even in -rtos modeTim Newsome4-28/+36
This works around some side effects of the -rtos hack, namely that we were unable to set hardware breakpoints on harts whose misa differed from the first one. There may be other bugs like this one lurking elsewhere. The only proper solution is for gdb to have a better user interface when talking to a server that exposes multiple targets, but that's a very big project. This fixes #194. Change-Id: I81aedddeaa922d220e936730e9c731545953ae21
2018-04-02Add gdb_report_register_access_error commandTim Newsome3-13/+23
This replaces the earlier mechanism which would propagate errors only for targets that decided they wanted to. It was suggested by Matthias Welwarsky from the OpenOCD team. Change-Id: Ibe8e97644abb47aff26d74b8280377d42615a4d3
2018-03-30Add wall clock timeout to dmi_op()Tim Newsome1-5/+18
If the target is held in reset we'd keep adding more delays, and since those grow exponentially they'd get so huge it would take forever to exit out of the loop. Change-Id: Ieaab8b124c101fd1b12f81f905a6de22192ac662
2018-03-30Merge pull request #231 from riscv/authTim Newsome1-2/+2
Fix auth error message.
2018-03-30Merge pull request #230 from riscv/delegTim Newsome1-0/+8
Make m*deleg regs conditional on U/S/N
2018-03-30Fix auth error message.Tim Newsome1-2/+2
Change-Id: I79b72325e9a6b85f8b67df8e9837a54cfce928f0
2018-03-30Merge pull request #224 from riscv/upstreamTim Newsome1-64/+2
Remove debug code.
2018-03-30jtag/core, target: unregister JTAG eventsTomas Vanek3-2/+12
Also call adapter_exit() before command_exit() as the latter releases Jim interpreter so JTAG events should be released before. Fixes memory leak reported by valgrind Change-Id: I493f3fcba34ea2b4234148e79a4e329c866e0f05 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4474 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30target: fix display halt message logicTomas Vanek3-5/+8
If a target is run from gdb and then stopped from OpenOCD telnet interface, halt does not show message with status and PC registers. While on it rename 'display' to 'verbose_halt_msg' and use bool type instead of int. Change-Id: Ibe6589015b302e0be97258b06938c297745436a5 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4475 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30flash/nor: implement flash bank deallocation on OpenOCD exitTomas Vanek4-1/+42
Change-Id: I8fcf09b2a85b3b68743f5fd68a31edea933b9b17 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4414 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30target: restructure dap supportMatthias Welwarsky19-280/+721
- add 'dap create' command to create dap instances - move all dap subcmmand into the dap instance commands - keep 'dap info' for convenience - change all armv7 and armv8 targets to take a dap instance instead of a jtag chain position - restructure tap/dap/target relations, jtag tap no longer references the dap, daps are now independently created and initialized. - clean up swd connect - re-initialize DAP also on JTAG errors (e.g. after reset, power cycle) - update documentation - update target files Change-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4468 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30arm_cti: add cti command groupMatthias Welwarsky6-38/+514
Extend the CTI abstraction to be accessible from TCL and change the 'target' command to accept a cti 'object' instead of a base address. This also allows accessing CTI instances that are not related to a configured target. Change-Id: Iac9ed0edca6f1be00fe93783a35c26077f6bc80a Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4031 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-27Once more... Less sloppy this time.Tim Newsome1-1/+1
Change-Id: I4a24e777af3a0d8e072bc1bce0b314738393aa86
2018-03-27Don't rely on havereset when deasserting reset.Tim Newsome3-49/+11
This removes the need for the supports_havereset config option as well. Change-Id: Ic4391ce8c15d15e2ef662d170d483f336e8e8a5e
2018-03-27aarch64: add cpsr bitfields to target descriptionMatthias Welwarsky1-4/+45
provide meta information for the cpsr so gdb can display the status flags and not only a hexadecimal number Change-Id: I9d3fb29153780adbea389d7e4175d5e19bddc256 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4460 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-27tdesc: bitfields may carry a typeMatthias Welwarsky2-5/+13
a bitfield may carry a type (bool or int), add support for that. Change-Id: Ic831a9b8eac8579e8fdd7d0f01b7f1c9259e6739 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4459 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-26Fix m*deleg logic.Tim Newsome1-2/+1
Change-Id: Ieda035280334f8e7dc78c9fbc2bdbea7c565d2de
2018-03-23Make m*deleg regs conditional on U/S/NTim Newsome1-0/+9
Change-Id: I544fc15625400d8ad64d4a65f0fc9d77f428ca84
2018-03-23Make reset work again for multicoreTim Newsome2-77/+76
Both regular multicore and RTOS hack methods. Change-Id: I9a0998de0f33ef8a4d163f36ddf01c7675893b3d
2018-03-22Add set_supports_haveresetTim Newsome3-32/+54
This lets reset work on targets that don't implement havereset. Change-Id: I09eb20970fac740eb6465541db6e739ae3e6b0d5
generated by cgit v1.1 at 2024-10-12 22:44:48 +0000