aboutsummaryrefslogtreecommitdiff
path: root/src/target
AgeCommit message (Expand)AuthorFilesLines
2023-09-11Merge pull request #911 from riscv/from_upstreamTim Newsome1-28/+6
2023-09-08Merge pull request #912 from MarekVCodasip/make-unknown-semihosting-errorTim Newsome1-3/+3
2023-09-08Merge pull request #909 from en-sc/en-sc/cleanup-enumerate-triggersTim Newsome1-74/+122
2023-09-07target/riscv: cleanup riscv_enumerate_triggers()Evgeniy Naydanov1-74/+122
2023-09-07target/riscv_semihosting: Make the unknown operation number an errorMarek Vrbka1-3/+3
2023-09-04target/riscv: Reject size 2 soft breakpoints when C extension not supportedMarek Vrbka1-6/+8
2023-08-30Merge pull request #906 from MarekVCodasip/zero-no-cacheTim Newsome1-0/+3
2023-08-29Merge commit 'dfbbfac4d72e247e8094a49c8573b2f49689b6d5' into from_upstreamTim Newsome1-28/+6
2023-08-29Merge pull request #900 from aap-sc/aap-sc/simplify_state_managmentTim Newsome1-25/+16
2023-08-25target/riscv: Don't write to zero.Marek Vrbka1-0/+3
2023-08-23Merge pull request #904 from kr-sc/kr-sc/support-sv57Tim Newsome2-2/+37
2023-08-23Merge pull request #905 from aap-sc/aap-sc/crash_when_on_vector_tgt_runningTim Newsome1-6/+6
2023-08-18Merge pull request #903 from wxjstz/riscvTim Newsome1-8/+28
2023-08-18riscv: simplify state management during examineParshintsev Anatoly1-25/+16
2023-08-18fix crash when we try to read vector register on a running targetParshintsev Anatoly1-6/+6
2023-08-17target/riscv: fix execute_fenceXiang W1-8/+28
2023-08-15[riscv] refactor functions that register read/write via progbufParshintsev Anatoly1-72/+147
2023-08-14Merge pull request #899 from en-sc/en-sc/trig-handle-res-not-avlblTim Newsome1-2/+4
2023-08-14target/riscv: Add support for Sv57 translation mode (including second-stage t...Kirill Radkin2-2/+37
2023-08-03target/riscv: improve error handling in trigger setupEvgeniy Naydanov1-2/+4
2023-08-02add diagnostics for non-implemented data watchpointsParshintsev Anatoly1-0/+8
2023-07-31target: OpenOCD fails with assert during running "reset" commandKirill Radkin2-22/+32
2023-07-31Merge pull request #884 from riscv/from_upstreamTim Newsome2-40/+1
2023-07-26target/riscv: support check dbgbase existMark Zhuang2-0/+33
2023-07-26target/riscv: support multiple DMsMark Zhuang1-18/+54
2023-07-26target/riscv: add dm layerMark Zhuang5-154/+302
2023-07-24target/riscv: Add target logging to most logging instancesMarek Vrbka4-270/+269
2023-07-20target/riscv: fix semantic checker warningsErhan Kurubas4-59/+59
2023-07-20src: fix clang15 compiler warningsErhan Kurubas2-4/+2
2023-07-18Merge pull request #878 from en-sc/en-sc/trigg-eq-checkTim Newsome2-13/+44
2023-07-17target/riscv: cleanup trigger setupEvgeniy Naydanov2-13/+44
2023-07-17Merge pull request #879 from riscv/power_dance3Tim Newsome2-40/+100
2023-07-17Merge pull request #871 from en-sc/en-sc/fix-mdx-errTim Newsome5-333/+488
2023-07-14target/riscv: refactor read_memory_progbuf()Evgeniy Naydanov5-333/+488
2023-07-14target/riscv: dynamic allocate memory for hawindowMark Zhuang1-6/+15
2023-07-14target/riscv: update some macroMark Zhuang1-4/+3
2023-07-12Merge commit 'a3ed12401b1f7d9578fb7da881d3504e07acfc27' into from_upstreamTim Newsome2-40/+1
2023-07-12target/riscv: Message when harts become available.Tim Newsome1-0/+6
2023-07-12target/breakpoints: Clear software breakpoints from available targetsTim Newsome1-39/+93
2023-07-06target/riscv: Fix typo in gdb_regno_cacheable() comment.Tim Newsome1-1/+1
2023-07-06Merge pull request #872 from aap-sc/aap-sc/smp_manipulationTim Newsome1-0/+3
2023-07-04target/riscv: Fix the trigger writing sequenceMarek Vrbka1-16/+29
2023-07-03[target/riscv] support for smp group manipulationParshintsev Anatoly1-0/+3
2023-06-29Merge pull request #873 from eosea/bscan_tunnel_seg_fault_fixTim Newsome1-2/+4
2023-06-27target/riscv: fix haltgroup_supported to info->haltgroup_supportedMark Zhuang1-2/+1
2023-06-22Add null pointer check before right shift for bscan tunneling.eolson1-2/+4
2023-06-21Merge pull request #868 from en-sc/en-sc/upstream-resume-err-2Tim Newsome2-23/+23
2023-06-21Merge pull request #857 from riscv/power_dance2Tim Newsome3-31/+161
2023-06-21target/riscv: resume only halted hartsEvgeniy Naydanov2-23/+23
2023-06-20target/riscv: From tick(), set ebreak* if necessary.Tim Newsome1-0/+74