Age | Commit message (Expand) | Author | Files | Lines |
2017-06-21 | Allow memory writes to proceed on all harts | Palmer Dabbelt | 1 | -6/+0 |
2017-06-21 | Refactor examine, to avoid some assertions | Palmer Dabbelt | 1 | -9/+16 |
2017-06-21 | Factor out checking if harts should be used | Palmer Dabbelt | 3 | -18/+35 |
2017-06-20 | Set current_hartid from coreid | Palmer Dabbelt | 3 | -7/+5 |
2017-06-20 | Set hardware triggers on all harts.multicore | Tim Newsome | 1 | -33/+69 |
2017-06-20 | Don't immediately segfault with -rtos on v0.11. | Tim Newsome | 1 | -0/+3 |
2017-06-20 | Comment curious code. | Tim Newsome | 1 | -0/+4 |
2017-06-20 | Update list of "threads" when harts are discovered. | Tim Newsome | 1 | -2/+8 |
2017-06-19 | Put early DEBUG notice of XLEN back. | Tim Newsome | 1 | -0/+5 |
2017-06-16 | Update debug_defines. Clarify debug output. | Tim Newsome | 2 | -52/+118 |
2017-06-16 | Fix comment. | Tim Newsome | 1 | -1/+1 |
2017-06-16 | Tell the user about detected harts. | Tim Newsome | 1 | -8/+10 |
2017-06-16 | Tighten up debug output. | Tim Newsome | 1 | -17/+14 |
2017-06-15 | Fix indentation to match OpenOCD style. | Tim Newsome | 6 | -335/+333 |
2017-06-15 | Merge pull request #64 from riscv/release-fixes | Tim Newsome | 2 | -5/+12 |
2017-06-15 | Fix print statements to work with 64-bit addresses | Tim Newsome | 1 | -4/+7 |
2017-06-15 | Jump to the RTOS hartid after halting | Palmer Dabbelt | 1 | -0/+7 |
2017-06-15 | Clear abstract errors from register_read_direct | Palmer Dabbelt | 1 | -5/+5 |
2017-06-13 | Fix the build. | Tim Newsome | 4 | -71/+79 |
2017-06-13 | Merge branch 'remotes/openocd/master' into riscv64 | Tim Newsome | 91 | -2717/+9456 |
2017-06-08 | Fix dmi_read() indentation; remove \n in LOG_ERROR | Tim Newsome | 1 | -25/+25 |
2017-06-07 | riscv: Move the initialization of the field inside the structure for consistency | Megan Wachs | 1 | -5/+1 |
2017-06-07 | riscv: v13 -- dmi_write must still check for the OP resultv20170608 | Megan Wachs | 1 | -21/+17 |
2017-06-06 | %p already includes 0x (on gcc) | Tim Newsome | 1 | -4/+4 |
2017-05-31 | flash: Add support for Atheros (ath79) SPI interface | Tobias Diedrich | 1 | -0/+2 |
2017-05-25 | Invalidate the register cache when rtos_hartid==-1 | Palmer Dabbelt | 1 | -1/+4 |
2017-05-25 | Invalidate the register cache on step, resume, reset | Palmer Dabbelt | 2 | -0/+14 |
2017-05-22 | riscv-v11: Don't perform unexpected operation in cache_write | Megan Wachs | 1 | -1/+1 |
2017-05-15 | Check for abstractcs.busy, not just CMDERR_BUSY | Palmer Dabbelt | 1 | -0/+4 |
2017-05-15 | Go back to 32-word read/write buffers | Palmer Dabbelt | 1 | -2/+2 |
2017-05-15 | Don't re-read registers after they're written | Palmer Dabbelt | 1 | -8/+0 |
2017-05-15 | Print out the actual CSR that's read | Palmer Dabbelt | 1 | -0/+1 |
2017-05-15 | Build fixes | Palmer Dabbelt | 2 | -3/+3 |
2017-05-15 | riscv: Remove some compile warnings | Megan Wachs | 1 | -2/+0 |
2017-05-11 | Shim back in some old interfaces for now | Palmer Dabbelt | 1 | -16/+72 |
2017-05-09 | Allow all harts to be reset | Palmer Dabbelt | 3 | -39/+112 |
2017-05-08 | mips32, use scan32 function for reading impcode/idcode. | Salvador Arroyo | 3 | -60/+19 |
2017-05-08 | mips32: add micromips breakpoints support | Salvador Arroyo | 1 | -46/+105 |
2017-05-08 | mips32: add micromips isa handling | Salvador Arroyo | 5 | -19/+91 |
2017-05-08 | mips32, convert miniprograms with code definition | Salvador Arroyo | 1 | -44/+63 |
2017-05-08 | mips32, add support for micromips in debug mode | Salvador Arroyo | 7 | -239/+343 |
2017-05-08 | mips32, add microMips instruction subset | Salvador Arroyo | 1 | -0/+95 |
2017-05-08 | mips32, add option to avoid check in last instruction | Salvador Arroyo | 3 | -33/+36 |
2017-05-08 | mips32, add realloc code | Salvador Arroyo | 3 | -44/+35 |
2017-05-08 | mips32, change in pracc_list for dynamic allocation | Salvador Arroyo | 3 | -44/+45 |
2017-05-05 | Avoid accessing null target->reg_cache | Megan Wachs | 1 | -0/+6 |
2017-05-02 | Fix compile failure on MacOSX | Matthias Welwarsky | 2 | -7/+3 |
2017-05-01 | riscv-013: more consistent parens | Megan Wachs | 1 | -2/+2 |
2017-05-01 | riscv-013: Correct sign extension of address on read_memory for lower bits as... | Megan Wachs | 1 | -1/+1 |
2017-05-01 | riscv-013: Correct sign extension of address on read_memory | Megan Wachs | 1 | -2/+2 |