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2020-07-26target: fix minor typos and duplicated wordsAntonio Borneo1-1/+1
Change-Id: I8deb0017dc66a243e3dd51e285aa086db500decd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5766 Tested-by: jenkins
2018-04-10target, flash: prepare infrastructure for multi-block blank checkTomas Vanek1-1/+1
'flash erase_check' command runs a check algorithm on a target if possible. The algorithm is run repeatedly for each flash sector. Unfortunately every start and stop of the algorithm impose not negligible overhead. In practice it means checking is faster than plain read only for sectors of size approx 4 kByte or bigger. And checking sectors as short as 512 bytes runs approx 4 times slower than plain read. The patch changes API call target_blank_check_memory() and related to take an array of sectors (or arbitrary memory blocks). Changes in target-specific checking routines are kept minimal. They use only the first block from the array and process it by the unchanged algorithm. default_flash_blank_check() routine repeats target_blank_check_memory() until all blocks are checked, so it works with both multi-block and single-block based checkers. Change-Id: I0e6c60f2d71364c9c07c09416b04de9268807f5e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4297 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2017-05-08mips32: add micromips isa handlingSalvador Arroyo1-0/+14
Read and save configuration registers, up to 4. Config3 holds the micromips implementation info. Added isa implementation info to mips32_common. Added isa filter to avoid common mistakes, but only if one isa mode is implemented. When resuming the isa requested is set if more than one isa mode is implemented. Change-Id: I1d6526c5525bffac8d75e031b842b2edc6310e28 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4123 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08mips32, add support for micromips in debug modeSalvador Arroyo1-77/+147
Micromips is 16bit oriented, branch and jumps are 16 bit based. The upper half 16bits of a 32bit instruction with the major opcode, must go first in the instruction stream, hence the SWAP16 macro and swap16 array function, needed if the code is written as 32 bit word in little endian cores. Endianess info added to ejtag_iinfo. Pointer to ejtag_info and isa field added to pracc context. MIPS32 code are renamed to MIPS32_ISA_... To select the isa, the new code has an additional isa parameter (1 for micromips, 0 for mips32). In JR instruction the isa bit must be set to execute micromips code. The suffix u is added to the OP codes to avoid signed/unsigned comparison errors and to make sure the right shift is performed logically. The isa in debug mode is updated in the poll function. Code for miniprograms, in kernel mode, need to be converted. CFI code only for mips32. Change-Id: I79a8b637d49b0e2d92b6dd5eb5aa8aa0520bf938 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4032 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08mips32, add microMips instruction subsetSalvador Arroyo1-0/+95
Only reencoded MIPS32 instructions. Added some instructions for crc code. Micromips isa in debug mode is only needed for pic32mm cores. Pic32mz seems that only works with MIPS32 isa when in debug mode. Change-Id: I07059e153a7000ea9204f20b6b37edf6a7623455 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/4022 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-02-10target: Add 64-bit target address supportDongxue Zhang1-3/+3
Define a target_addr_t type to support 32-bit and 64-bit addresses at the same time. Also define matching TARGET_PRI*ADDR format macros as well as a convenient TARGET_ADDR_FMT. In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000) be least invasive by leaving the formatting unchanged apart from the type; for generic code adopt TARGET_ADDR_FMT as unified address format. Don't silently change gdb formatting here, leave that to later. Add COMMAND_PARSE_ADDRESS() macro to abstract the address type. Implement it using its own parse_target_addr() function, in the hopes of catching pointer type mismatches better. Add '--disable-target64' configure option to revert to previous 32-bit target address behavior. Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5 Signed-off-by: Dongxue Zhang <elta.era@gmail.com> Signed-off-by: David Ung <david.ung.42@gmail.com> [AF: Default to enabling (Paul Fertser), rename macros, simplify] Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2016-10-30flash/nor: Add erased_value to drivers and pass it to targetsAndreas Färber1-1/+1
struct flash_driver has a default_padded_value field that is similar, but it can be changed by the user for the specific purpose of padding. Add a new erased_value field and initialize it for all targets, particularly stm32lx, xmc4xxx and virtual. Use this value in core.c:default_flash_mem_blank_check(), the slow path. Extend the target API to pass erased_value down to target code. Adding an argument ensures that we catch all callers. This allows us to merge xmc4xxx.c:xmc4xxx_blank_check_memory() into armv7m:armv7m_blank_check_memory(). It further allows us to use default_flash_blank_check() in place of xmc4xxx.c:xmc4xxx_flash_blank_check(), adding a potential slow path fallback, as well as stm32lx:stm32lx_erase_check(), adding the potential armv7m fast path with fallback to default_flash_mem_blank_check(). Fix a mips32 code comment while at it (zeroed -> erased). The armv4_5 and mips32 target implementations will now error out if an erase value other than 0xff is used, causing default_flash_blank_check() to fall back to the default_flank_mem_blank_check() slow path. Change-Id: I39323fbbc4b71c256cd567e439896d0245d4745f Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3497 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-04mips: Added #define for scan_delay legacy mode default valueKent Brinkley1-0/+2
Believe in using defines to make maintenance easier. Change-Id: I8edf151352131bbf2b884dfcd67ca5764b11b13c Signed-off-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com> Reviewed-on: http://openocd.zylin.com/2350 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2016-05-24Make #include guard naming consistentMarc Schink1-3/+3
Change-Id: Ie13e8af0bb74ed290f811dcad64ad06c9d8cb4fa Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/2956 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-24Remove FSF address from GPL noticesMarc Schink1-3/+1
Also make GPL notices consistent according to: https://www.gnu.org/licenses/gpl-howto.html Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3488 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-02-11mips32: add gdb target description supportAntony Pavlov1-0/+1
This commit is inspired by commit 1255b18fc650193094666ba8afd2018089cc9794 Author: Spencer Oliver <spen@spen-soft.co.uk> Date: Fri Sep 13 09:44:36 2013 +0100 armv7m: add gdb target description support Change-Id: I75c3971fd0599d34ed49fb73975378b57f2a4af0 Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> CC: Spencer Oliver <spen@spen-soft.co.uk> CC: Oleksij Rempel <linux@rempel-privat.de> CC: Paul Fertser <fercerpav@gmail.com> CC: Gregory Fong <gregory.0xf0@gmail.com> Reviewed-on: http://openocd.zylin.com/1972 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: jenkins
2015-02-11mips32: use 'unsigned int' for CPU register indicesAntony Pavlov1-2/+2
Change-Id: I77e94b2fe0943a87e1d18d88ebf2a0133aaad728 Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-on: http://openocd.zylin.com/2216 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-11-24mips32: fix typosAntony Pavlov1-1/+1
Change-Id: Ibb98fe3da68bf670a5bb83600bb49647db8a4163 Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-on: http://openocd.zylin.com/2338 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-07gdb_server: support gdb target descriptionHsiangkai Wang1-1/+2
* Add a parameter in .get_gdb_reg_list() to return different register lists as generating target description. * Modify STRUCT REG to let gdb generate target description according to register information. The modified structure of register is struct reg { const char *name; uint32_t number; /* for regnum="num" */ struct reg_feature *feature; /* for register group feature name */ bool caller_save; /* for save-restore="yes|no" */ void *value; bool dirty; bool valid; bool exist; uint32_t size; struct reg_data_type *reg_data_type; /* for type="type" */ const char *group; /* for group="general|float|vector" */ void *arch_info; const struct reg_arch_type *type; }; Change-Id: I2096b67adf94518ba0b8b23d8c6a9f64ad7932b8 Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-on: http://openocd.zylin.com/1382 Tested-by: jenkins Reviewed-by: Franck Jullien <franck.jullien@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-07-17mips32: add jump instructionOleksij Rempel1-0/+2
This instruction we will need to make jump to 0xff20.0000 Change-Id: Ic723e683e8848492cd8e186e71fd668dbd1d97e6 Signed-off-by: Oleksij Rempel <bug-track@fisher-privat.net> Reviewed-on: http://openocd.zylin.com/1338 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-05update files to correct FSF addressSpencer Oliver1-1/+1
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2012-11-16mips: optimize mips_ejtag_step_disable() codeSalvador Arroyo1-0/+2
The code is a bit large compared to mips_ejtag_step_enable(). With the mips32 xori instruction the code can be reused. The number of pracc accesses are reduced from 18 to 7. Change-Id: If3974ebd64da4461c22b089796646990e68e1b72 Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es> Reviewed-on: http://openocd.zylin.com/944 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-06build: cleanup src/target directorySpencer Oliver1-18/+14
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2011-08-09mips32: Sync Caches to Make Instr Writes EffectiveDrasko DRASKOVIC1-24/+88
Pprogram that loads another program into memory is actually writing the D- side cache. The instructions it has loaded can't be executed until they reach the I-cache. After the instructions have been written, the loader should arrange to write back any containing D-cache line and invalidate any locations already in the I-cache. For the MIPS Architecture Release2 cores, we can use synci command that does this job. For Release1 we must use "cache" instruction.
2011-08-09mips32: Added CP0 coprocessor R/W routinesDrasko DRASKOVIC1-0/+5
This patch adds MIPS32 CP0 coprocessor R/W routines, as well as adequate commands to use these routines via telnet interface. Now is becomes possible to affect CP0 internal registers and configure CPU directly from OpenOCD.
2011-06-05mips: add nor flash write from memory blockStefan Mahr1-1/+5
2011-01-04mips32: add fastdata loader working areaSpencer Oliver1-0/+3
Add a working area that is preserved between calls to mips_m4k_bulk_write_memory - this gives us a speed increase of approx 3kb/sec during flash writes to the pic32mx. This area is released during a resume/reset. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-04-11TARGET/MIPS32: review scope of functionsAntonio Borneo1-2/+0
Add "static" qualifier to private functions. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-02-28MIPS: add mips algorithm supportSpencer Oliver1-0/+10
- add mips support for target algorithms. - added handlers for target_checksum_memory and target_blank_check_memory. - clean up long lines Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-09MIPS: update arch_info access to match other targetsSpencer Oliver1-2/+15
- add target_to_mips32 and target_to_m4k to match test of codebase. - mips32_arch_state now shows if processer is running mips16e isa. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-07MIPS: whitespace cleanupSpencer Oliver1-1/+1
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-05MIPS: merge mips fast_data patch from David N. ClaffeyDavid Claffey1-0/+2
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2009-12-13target files shouldn't #include <target/...h>David Brownell1-2/+2
Make these ".h" files adopt the same policy the ".c" files already follow: don't use <subsystem/...h> syntax for private interfaces. If we ever get reviewed/supported "public" interfaces they should come exclusively from some include/... directory; that'll be the time to switch to <...> syntax for any subsystem's own interfaces. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-03change #include "target.h" to <target/target.h>Zachary T Welch1-1/+1
Changes from the flat namespace to heirarchical one. Instead of writing: #include "target.h" the following form should be used. #include <target/target.h> The exception is from .c files in the same directory.
2009-12-03change #include "mips32_pracc.h" to <target/mips32_pracc.h>Zachary T Welch1-1/+1
Changes from the flat namespace to heirarchical one. Instead of writing: #include "mips32_pracc.h" the following form should be used. #include <target/mips32_pracc.h> The exception is from .c files in the same directory.
2009-11-19target: create/use register_cache_invalidate()David Brownell1-1/+0
Create a generic register_cache_invalidate(), and use it to replace three all-but-identical core-specific routines: - armv4_5_invalidate_core_regs() - armv7m_invalidate_core_regs - mips32_invalidate_core_regs() too. Make cache->num_regs be unsigned, avoiding various errors. Net code shrink and simplification. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-16target: no implicit #includes of "register.h"David Brownell1-1/+0
Same deal: "register.h" got needlessly included all over the place because of being in a few widely included headers. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Also, don't need that extra "types.h" inclusion. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-13command_context_t -> struct command_contextZachary T Welch1-1/+1
Remove misleading typedef and redundant suffix from struct command_context.
2009-11-13target_t -> struct targetZachary T Welch1-14/+14
Remove misleading typedef and redundant suffix from struct target.
2009-11-13reg_t -> struct regZachary T Welch1-1/+1
Remove misleading typedef and redundant suffix from struct reg.
2009-11-13reg_cache_t -> struct reg_cacheZachary T Welch1-2/+2
Remove misleading typedef and redundant suffix from struct reg_cache.
2009-11-13mips_ejtag_t -> struct mips_ejtagZachary T Welch1-1/+1
Remove misleading typedef and redundant suffix from struct mips_ejtag.
2009-11-13mips32_core_reg_t -> struct mips32_core_regZachary T Welch1-2/+2
Remove misleading typedef and redundant suffix from struct mips32_core_reg.
2009-11-13mips32_common_t -> struct mips32_commonZachary T Welch1-4/+4
Remove misleading typedef and redundant suffix from struct mips32_common.
2009-11-13mips32_comparator_t -> struct mips32_comparatorZachary T Welch1-4/+4
Remove misleading typedef and redundant suffix from struct mips32_comparator.
2009-11-13reg_param_t -> struct reg_paramZachary T Welch1-1/+1
Remove misleading typedef and redundant suffix from struct reg_param.
2009-11-13mem_param_t -> struct mem_paramZachary T Welch1-1/+1
Remove misleading typedef and redundant suffix from struct mem_param.
2009-11-13jtag_tap_t -> struct jtag_tapZachary T Welch1-1/+1
Search and destroy the jtag_tap_t typedef. This also cleans up a layering violation, removing the declaration from types.h.
2009-11-09src/target: remove 'extern' and wrap headersZachary T Welch1-13/+27
Remove extern keywords from function prototypes and wrap long lines.
2009-06-23Remove whitespace at end of lines, step 1.zwelch1-3/+3
- Replace '\s*$' with ''. git-svn-id: svn://svn.berlios.de/openocd/trunk@2379 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23- Fixes '[|]' whitespacezwelch1-2/+2
- Replace ')\([|]\)(' with ') \1 ('. - Replace ')\([|]\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\([|]\)(' with '\1 \2 ('. - Replace '\(\w\)\([|]\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2374 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23- Fixes '<<' whitespacezwelch1-3/+3
- Replace ')\(<<\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(<<\)(' with '\1 \2 ('. - Replace '\(\w\)\(<<\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2370 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-18Transform 'u32' to 'uint32_t' in src/targetzwelch1-6/+6
- Replace '\([^_]\)u32' with '\1uint32_t'. - Replace '^u32' with 'uint32_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2279 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-20Author: Spencer Oliver <spen@spen-soft.co.uk>kc8apf1-0/+1
- Bring the mips step/resume interrupt handling inline with the rest of openocd. git-svn-id: svn://svn.berlios.de/openocd/trunk@1850 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-05-11Audit and eliminate redundant #include directives in other target files.zwelch1-2/+2
git-svn-id: svn://svn.berlios.de/openocd/trunk@1715 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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