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2017-02-10target: Add 64-bit target address supportDongxue Zhang1-2/+2
Define a target_addr_t type to support 32-bit and 64-bit addresses at the same time. Also define matching TARGET_PRI*ADDR format macros as well as a convenient TARGET_ADDR_FMT. In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000) be least invasive by leaving the formatting unchanged apart from the type; for generic code adopt TARGET_ADDR_FMT as unified address format. Don't silently change gdb formatting here, leave that to later. Add COMMAND_PARSE_ADDRESS() macro to abstract the address type. Implement it using its own parse_target_addr() function, in the hopes of catching pointer type mismatches better. Add '--disable-target64' configure option to revert to previous 32-bit target address behavior. Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5 Signed-off-by: Dongxue Zhang <elta.era@gmail.com> Signed-off-by: David Ung <david.ung.42@gmail.com> [AF: Default to enabling (Paul Fertser), rename macros, simplify] Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2016-05-24Remove FSF address from GPL noticesMarc Schink1-3/+1
Also make GPL notices consistent according to: https://www.gnu.org/licenses/gpl-howto.html Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3488 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-05target: improve robustness of reset commandTomas Vanek1-0/+7
Before this change jim_target_reset() checked examined state of a target and failed without calling .assert_reset in particular target layer (and without comprehensible warning to user). Cortex-M target (which refuses access to DP under active SRST): If connection is lost then reset process fails before asserting SRST and connection with MCU is not restored. This resulted in: 1) A lot of Cortex-M MCUs required use of reset button or cycling power after firmware blocked SWD access somehow (sleep, misconfigured clock etc). If firmware blocks SWD access early during initialization, a MCU could become completely inaccessible by SWD. 2) If OpenOCD is (re)started and a MCU is in a broken state unresponsive to SWD, reset command does not work even if it could help to restore communication. Hopefully this scenario is not possible under full JTAG. jim_target_reset() in target.c now does not check examined state and delegates this task to a particular target. All targets have been checked and xx_assert_reset() (or xx_deassert_reset()) procedures were changed to check examined state if needed. Targets except arm11, cortex_a and cortex_m just fail if target is not examined although it may be possible to use at least hw reset. Left as TODO for developers familiar with these targets. cortex_m_assert_reset(): memory access errors are stored instead of immediate returning them to a higher level. Errors from less important reads/writes are ignored. Requested reset always leads to a configured action. arm11_assert_reset() just asserts hw reset in case of not examined target. cortex_a_assert_reset() works as usual in case of not examined target. Change-Id: I84fa869f4f58e2fa83b6ea75de84440d9dc3d929 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/2606 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-12-29target/arm: Remove usage of struct arm_jtag in ARMv7 targetsAndreas Fritiofson1-1/+1
The Cortex-A and Cortex-M keeps an arm_jtag struct around just to be able to pass a pointer to it to one common JTAG function which anyway only uses the TAP field. Refactor the function to take a TAP directly, remove the legacy struct from cortex instances and store the TAP pointer only in the DAP. Cortex-M makes a call to arm_jtag_setup_connection() with the struct but the function does nothing useful for a Cortex-M target so remove the call. Change-Id: I3b33709ef55372ef14522ed4337e9f2e817ae3ab Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3142 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2013-11-07target: use target_buffer_set_u32_arraySpencer Oliver1-2/+1
Attempt to use target_buffer_set_u32_array to convert to target endian arrays rather reimplementing code. This also removed cfi_fix_code_endian as its functionality is also repeated. Change-Id: I7c359dbe46ea791cd5f6fb18d8b0fb6895c599d3 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1783 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-10-15arm7_9: Avoid infinite loops in bulk write dispatchingAndreas Fritiofson1-5/+17
Add a mandatory field in struct arm7_9_common for regular, non-optimized memory writes. Together with the existing bulk_memory_write field, this allows variants to select any combination of implementations for regular and bulk writes, without risking infinite loops from accidentally using bulk writes for implementing bulk writes. ARM 7/9 targets may now select arm7_9_memory_write_opt as their target.write_memory implementation, which will dispatch to arm7_9_common.bulk_write_memory if possible, or fallback to arm7_9_common.write_memory otherwise. To avoid loops, bulk write implementations mustn't call any other functions than arm7_9_write_memory_no_opt() to write memory; it will unconditionally call arm7_9_common.write_memory. If they fail, they should simply return error to allow the caller to fallback to regular writes. Tested on a regular ARM7TDMI only. Change-Id: Iae42a6e093e2df68c4823c927d757ae8f42ef388 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1685 Tested-by: jenkins Reviewed-by: Sergey A. Borshch <sb-sf@users.sourceforge.net> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-13[RFC] target: Move bulk_write_memory to arm7_9Andreas Fritiofson1-4/+4
The only remaining user is arm7_9 so remove it from the target API and add it to struct arm7_9_common to support all its variants with minimal changes. Many of the variants are likely not correct in the cache/mmu handling when the bulk write is triggered. This patch does nothing to change that, except for arm946e, where it was easier to do what might be the right thing. Change-Id: Ie73ac07507ff0936fefdb90760046cc8810ed182 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1220 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-05update files to correct FSF addressSpencer Oliver1-1/+1
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2012-02-06build: cleanup src/target directorySpencer Oliver1-34/+20
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-01-23cleanup: rename armv4_5 to arm for readabilitySpencer Oliver1-54/+54
Nothing more than a name change, just to make reading the code a bit simpler. Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/390 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-04-01types: write memory now uses constØyvind Harboe1-1/+1
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-20arm_jtag_scann error propagation fixesØyvind Harboe1-1/+3
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19arm: error propagation of arm_jtag_set_instrØyvind Harboe1-1/+4
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-21target/feroceon: review scope of symbolsAntonio Borneo1-23/+32
Add "static" qualifier to private functions. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-03-19jtag: retire jtag_get/set_end_state()Øyvind Harboe1-1/+0
Voila! This get rids of mysteries about what what state the TAP is in. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-18jtag: retire one instance of jtag_get_end_state() usageØyvind Harboe1-2/+2
Less global variables.... Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-18jtag: cut down on usage of unintended modification of global end stateØyvind Harboe1-2/+2
jtag_get/set_end_state() is now deprecated. There were lots of places in the code where the end state was unintentionally modified. The big Q is whether there were any places where the intention was to modify the end state. 0.5 is a long way off, so we'll get a fair amount of testing. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-08jtag: retire tap fieldØyvind Harboe1-4/+1
jtag_add_dr/ir_scan() now takes the tap as the first argument, rather than for each of the fields passed in. The code never exercised the path where there was more than one tap being scanned, who knows if it even worked. This simplifies the implementation and reduces clutter in the calling code. use jtag_add_ir/dr_plain_scan() for more fancy situations. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-21ARM: keep a handle to the PCDavid Brownell1-5/+5
Keep a handle to the PC in "struct arm", and use it. This register is used a fair amount, so this is a net minor code shrink (other than some line length fixes), but mostly it's to make things more readable. For XScale, fix a dodgy sequence while stepping. It was initializing a variable to a non-NULL value, then updating it to handle the step-over-active-breakpoint case, and then later testing for non-NULL to see if it should reverse that step-over-active logic. It should have done like ARM7/ARM9 does: init to NULL. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07ARM: rename some generic routinesDavid Brownell1-3/+3
Rename some (mostly) generic ARM functions: armv4_5_arch_state() --> arm_arch_state() armv4_5_get_gdb_reg_list() --> arm_get_gdb_reg_list() armv4_5_init_arch_info() --> arm_init_arch_info() Cores using the microcontroller profile may want a different arch_state() routine though. (Also fix strange indentation in arm_arch_state: use tabs only! And update a call to it, removing assignment-in-conditional.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-07ARM: move opcode macros to <target/arm_opcodes.h>David Brownell1-0/+1
Move the ARM opcode macros from <target/armv4_5.h>, and a few Thumb2 ones from <target/armv7m.h>, to more appropriate homes in a new <target/arm_opcodes.h> file. Removed duplicate opcodes from that v7m/Thumb2 set. Protected a few macro argument references by adding missing parentheses. Tightening up some of the line lengths turned up a curious artifact: the macros for the Thumb opcodes are all 32 bits wide, not 16 bits. There's currently no explanation for why it's done that way... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04ARM: rename armv4_5_state_* as arm_state_*David Brownell1-1/+1
And make arm_state_strings[] be const. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-04ARM: rename ARMV4_5_STATE_* as ARM_STATE_*David Brownell1-1/+1
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-24remove target_type register_command callbackZachary T Welch1-2/+2
Uses chaining of command_registration structures to eliminate all target_type register_callback routines. Exports the command_handler registration arrays for those target types that are used by others.
2009-11-16target: no implicit #includes of "register.h"David Brownell1-0/+2
Same deal: "register.h" got needlessly included all over the place because of being in a few widely included headers. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Also, don't need that extra "types.h" inclusion. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-15ARM: memory utils aren't ARM7/ARM9 dependentDavid Brownell1-4/+6
The arm7_9_checksum_memory() and arm7_9_blank_check_memory() routines are not actually specific to the ARM7 and ARM9 core generations ... they can work for any core which can run algorithms using basic ARM (not Thumb) instructions. Rename them; move the declarations to a more generic site; likewise move the code (and tidy it a bit in the process). NOTE: the blank_check() method falsely returned a success status (0) on one error path, when the algorithm failed. Fixed this bug. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-13ARM7/ARM9: use shared examine() methodDavid Brownell1-1/+1
No point in having two identical examine methods for the ARM7TDMI and ARM9TDMI drivers; move, rename, shrink, share. Add a bit of doxygen; stop needlessly exporting a method. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-11-13command_context_t -> struct command_contextZachary T Welch1-1/+1
Remove misleading typedef and redundant suffix from struct command_context.
2009-11-13target_t -> struct targetZachary T Welch1-22/+22
Remove misleading typedef and redundant suffix from struct target.
2009-11-13reg_t -> struct regZachary T Welch1-1/+1
Remove misleading typedef and redundant suffix from struct reg.
2009-11-13target_type_t -> struct target_typeZachary T Welch1-2/+2
Remove misleading typedef and redundant suffix from struct target_type.
2009-11-13armv4_5_common_t -> struct armZachary T Welch1-18/+18
Remove misleading typedef and just use struct arm.
2009-11-13arm_jtag_t -> struct arm_jtagZachary T Welch1-12/+12
Remove misleading typedef and redundant suffix from struct arm_jtag.
2009-11-13arm966e_common_t -> struct arm966e_commonZachary T Welch1-1/+1
Remove misleading typedef and redundant suffix from struct arm966e_common.
2009-11-13arm926ejs_common_t -> struct arm926ejs_commonZachary T Welch1-1/+1
Remove misleading typedef and redundant suffix from struct arm926ejs_common.
2009-11-13arm7_9_common_t -> struct arm7_9_commonZachary T Welch1-18/+18
Remove misleading typedef and redundant suffix from struct arm7_9_common.
2009-11-13scan_field_t -> struct scan_fieldZachary T Welch1-1/+1
Remove useless structure typedef.
2009-11-05target: remove unused interface fn that clutters codeØyvind Harboe1-7/+0
The quit entry point was not being invoked. Just a source of confusion at this point. XScale ran 100x reset upon quit, but that code made no sense, wasn't commented and never invoke. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-10-22Ferocion: fix corruption of r0 when resuming Thumb modeNicolas Pitre1-2/+1
The wrong variable (pc instead of r0) was used. Furthermore, someone did cover this error by stupidly silencing the compiler warning that occurred before a dummy void reference to r0 was added to the code. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-09-11Nicolas Pitre <nico@cam.org> put feroceon target definition at the end so to ↵oharboe1-86/+79
avoid a bunch of useless forward declarations. git-svn-id: svn://svn.berlios.de/openocd/trunk@2694 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11Nicolas Pitre <nico@cam.org> Dragonite supportoharboe1-17/+72
git-svn-id: svn://svn.berlios.de/openocd/trunk@2693 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-11Nicolas Pitre <nico@cam.org> tighten error checking in bulk_writeoharboe1-4/+15
git-svn-id: svn://svn.berlios.de/openocd/trunk@2687 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-07-16microscopic whitespace cleanupoharboe1-15/+0
git-svn-id: svn://svn.berlios.de/openocd/trunk@2547 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23Remove whitespace at end of lines, step 1.zwelch1-15/+15
- Replace '\s*$' with ''. git-svn-id: svn://svn.berlios.de/openocd/trunk@2379 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23- Fixes '!=' whitespacezwelch1-1/+1
- Replace ')\(!=\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(!=\)(' with '\1 \2 ('. - Replace '\(\w\)\(!=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2363 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-23- Replace 'if(' with 'if ('.zwelch1-1/+1
git-svn-id: svn://svn.berlios.de/openocd/trunk@2357 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-21C99 printf() -Werror fixesduane1-1/+1
git-svn-id: svn://svn.berlios.de/openocd/trunk@2318 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-18Transform 'u32' to 'uint32_t' in src/targetzwelch1-21/+21
- Replace '\([^_]\)u32' with '\1uint32_t'. - Replace '^u32' with 'uint32_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2279 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-18Transform 'u16' to 'uint16_t'zwelch1-1/+1
- Replace '\([^_]\)u16' with '\1uint16_t'. - Replace '^u16' with 'uint16_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2277 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-06-18Transform 'u8' to 'uint8_t' in src/targetzwelch1-8/+8
- Replace '\([^_]\)u8' with '\1uint8_t'. - Replace '^u8' with 'uint8_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2274 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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