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2017-02-10target: Add 64-bit target address supportDongxue Zhang1-7/+7
Define a target_addr_t type to support 32-bit and 64-bit addresses at the same time. Also define matching TARGET_PRI*ADDR format macros as well as a convenient TARGET_ADDR_FMT. In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000) be least invasive by leaving the formatting unchanged apart from the type; for generic code adopt TARGET_ADDR_FMT as unified address format. Don't silently change gdb formatting here, leave that to later. Add COMMAND_PARSE_ADDRESS() macro to abstract the address type. Implement it using its own parse_target_addr() function, in the hopes of catching pointer type mismatches better. Add '--disable-target64' configure option to revert to previous 32-bit target address behavior. Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5 Signed-off-by: Dongxue Zhang <elta.era@gmail.com> Signed-off-by: David Ung <david.ung.42@gmail.com> [AF: Default to enabling (Paul Fertser), rename macros, simplify] Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2016-05-24Remove FSF address from GPL noticesMarc Schink1-3/+1
Also make GPL notices consistent according to: https://www.gnu.org/licenses/gpl-howto.html Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3488 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-02-29Cleanup: removal of obsolete semicolonsAlexander Kurz1-2/+2
Obsolete C source code semicolons were removed using the semantic patch semicolon/semicolon.cocci, see coccinellery.org Change-Id: I153b4995a9e028ebaf5f58c947821dc78345a777 Signed-off-by: Alexander Kurz <akurz@blala.de> Reviewed-on: http://openocd.zylin.com/3367 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-03-17flash: Constify write bufferAndreas Fritiofson1-3/+3
Change-Id: Ic812098d3ed5a2992c26bb57d08ae350e2c5d5d8 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2040 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-31Clean up many C99 integer types format specifiersPaul Fertser1-6/+6
This eliminates most of the warnings reported when building for arm-none-eabi (newlib). Hsiangkai, there're many similar warnings left in your nds32 files, I didn't have the nerve to clean them all, probably you could pick it up. Change-Id: Id3bbe2ed2e3f1396290e55bea4c45068165a4810 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1674 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-08target: remove unimplemented target_request_data implementationsSpencer Oliver1-2/+0
Change-Id: Ia9afa83752d17f0f56bdf3bd81f5c69d108aa5e9 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1537 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-06-05update files to correct FSF addressSpencer Oliver1-1/+1
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-03-15target: Add default implementation of bulk_write_memoryAndreas Fritiofson1-8/+0
Remove dummy implementations from all targets except arm7_9 and mips, which are the only ones with real implementations. Replace with a single default implementation simply calling target_write_memory(). Change-Id: I9228104240bc0b50661be20bc7909713ccda2164 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1213 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-10doxygen: remove warningsSpencer Oliver1-178/+172
Change-Id: I020845a8df7b67f3b6c1a233b3ee07a5d14fa685 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/556 Tested-by: jenkins
2012-02-06build: cleanup src/target directorySpencer Oliver1-8/+9
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2011-12-11dsp5680xx - indent fixrodrigo_l_rosa1-1474/+1881
no logic changes, only coding style (spaces to tabs, etc) Change-Id: I5933447c633990e103bc62d088ca2e12f11f031d Signed-off-by: rodrigo_l_rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/253 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - mark erase after unlocking flashrodrigo_l_rosa1-48/+52
the unlocking procedure erases the flash mem (even if it wasn't locked), so it should be marked as erased after unlocking. Change-Id: I5cc6a1e1d6cf4e1f243de532eff54111ffd66187 Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/222 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - fix jtag debug request failure handlingrodrigo_l_rosa1-4/+6
if JTAG debug request fails then halting with a reset should be attempted. the failure was ignored previously. Change-Id: Ibec08e2e97f962d164a110c21aaa80bfc17b7f1a Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/221 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - separate debug from haltrodrigo_l_rosa1-428/+539
i had assumed two possible halt/debug states: - halted + debug mode - running + not debug mode turns out this one also exists - halted + NOT in debug mode added code to handle this in an appropiate way. Change-Id: Ia0ddcd55d1890c90d100a9e6f5e84ed8dda812a3 Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/220 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - fix - flashing algorithm checkrodrigo_l_rosa1-22/+32
now the flash algorithm running on the 568013 checks the buffer_empty bit (instead of the command_finished bit) before trying to write a new word to the flash mem. this should speed up the flashing procedure. since it is open loop, this change may reduce the risk of failure. flashing will fail if JTAG speed is such that the flash module cannot keep up. also, the USTAT register is only read once, as suggested in the flow chart provided by freescale (per. ref. manual @ 6-11) the last step of the flow chart, exiting after commands are complete, is not implemented. the algorithm will stay waiting for more data. it is up to the PC side to *not* send more data. Change-Id: I47fe4b50de7da85f80868f5986a89a7e2152616c Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/219 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - relocating coderodrigo_l_rosa1-16/+17
moved reset_jtag to the top, since it will be needed in future changes. also send a define to the .h Change-Id: I53ef9c02ffa70e7d0416364525a6fbfef855e222 Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/216 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-24dsp5680xx - error codesrodrigo_l_rosa1-69/+80
added logging of target error codes to enable automatic error handling from tcl. the plan is to use a computer to execute a series of tcl commands, the changes allow simple parsing of return messages to detect errors. Change-Id: Ia98d3bd036e1b6065b475ffff6c1d30baeaf7417 Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/215 Tested-by: jenkins Tested-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2011-11-07dsp5680xx: fix warningsØyvind Harboe1-1/+1
- propagate error - remove dead assignment Change-Id: I0d7078f531d96e421e95f08bfd908e818500d74c Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/170 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-04dsp5680xx: add missing and broken error propagationØyvind Harboe1-2/+5
found by clang. Change-Id: Ie7e2ecad71bf0838ece93727e4778ad368b890ef Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/156 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-08-31usleep to jtag_sleepRodrigo L. Rosa1-16/+16
this will help avoid platform specific timing issues
2011-08-31static for some functionsRodrigo L. Rosa1-2/+2
made two functions into static, since they are not required by anything external
2011-08-31speed up, relocate functionRodrigo L. Rosa1-46/+51
added an attempt to use the non-reseting halting sequence. if it fails, then the full sequence will be attempted. this makes things a bit faster most of the time. changed the location of a function, avoiding a forward def
2011-08-30removed trailing whitespacesRodrigo L. Rosa1-96/+96
emacs is awesome. replace-regexp RET [ ]+$ RET RET and it's done
2011-08-30fix enter debug mode for lockingRodrigo L. Rosa1-13/+55
added an alternative way to enter debug mode, which does not require restarting the chip. this will not always work, but in general it will (failure 0.3%), and failure is not a dramatic issue, simply have to use the full sequence. the user can only access "halt", which uses the full sequence, so the user should not have any problems. restarting the chip requires reconfiguring the flash module. the doc is very poor, so i'd rather have the two methods, and live with the 0.3%.
2011-08-30fix irlen handlingRodrigo L. Rosa1-5/+10
sometimes the master tap will be enabled, since tap switching is required during halt/lock/unlocking procedures. now irscan handles this, avoiding unnecessary warnings and preventing errors.
2011-08-30fix debug mode,lock,unlockRodrigo L. Rosa1-13/+210
got new info regarding setting the chip to debug mode, and locking/unlocking flash memory. the newer implementation is a bit slower, but always works. the previous implementation would randomly (as once every 25k-70k times) get the chip into a state where the freescale tool would be necessary. this is fixed now. added functions to play around with the jtag state machine. they are not the happiest, but are necessary to be able to execute the halting/locking/unlocking sequences. Conflicts: src/target/dsp5680xx.c
2011-08-30fix error handling during haltRodrigo L. Rosa1-4/+4
the user can execute halt, but no enter_debug_mode. modified the error handling to suite this. the new implementation of unlocking will use enter_debug_mode, and should not get the same errors as the user would, because not being able to enter debug mode is actually success when checking for locked flash.
2011-08-30optional crc for flash writingRodrigo L. Rosa1-17/+36
crc check was always performed on newly flashed data, now it is optional flash mem can be locked by writing a specific word to a specific address in flash. to verify flash, target must be halted, and this will (when the new halt sequence is implemented) require reseting the chip. if the target is reset after writing the lock words, then it will lock, hence the CRC will fail because it is not possible to read stuff from the target. also added a function that resets the jtag state machine. this is not used yet, but will be soon. it is implemented to allow strict control over JTAG state machine, necessary to implement to halt and unlocking sequences.
2011-08-10fix return code from dsp5680xx_readRodrigo L. Rosa1-1/+1
it returned ERROR_OK even though it actually failed. this made the Tcl interface report success, though it had not succeeded.
2011-08-10renamed for clarityRodrigo L. Rosa1-142/+140
i had started my code from dsp5683xx, i renamed a bunch of stuff to names i consider to be better. i believe no one is using this code, so nobody should be affected. (it's not too late to do this change)
2011-08-09dsp5680xx fix constante refRodrigo L. Rosa1-1/+1
a counter was incorrectly set when i added the macros i incorrectly called them. fixed that.
2011-08-09dsp5680xx fix FM clkRodrigo L. Rosa1-0/+2
before doing anything with the flash module (FM) the clock divider must be set. if erase_check was the first thing done with the FM after reset then an error would be generated because the clk divider was not set. now erase_check sets the clk divider.
2011-08-09dps5680xx fix warningsRodrigo L. Rosa1-63/+55
reorganized code to get rid of compiler warnings the warning were related to allignment, i do not get these warning on my build system (i've tried setting the compiler flag but it doesn't work, still working on why) so i cannot detect them (yet.)
2011-06-28dsp5680xx: fix compilation problemsØyvind Harboe1-30/+33
use a more specific global variable name than "context", which can easily conflict with other things.
2011-06-12doxy & cleanupRodrigo L. Rosa1-315/+453
2011-06-12cleanup trailing whitespacesRodrigo L. Rosa1-5/+5
2011-06-12flash speed improvedRodrigo L. Rosa1-0/+8
2011-06-12removed unnecessary actions/controlsRodrigo L. Rosa1-38/+8
2011-06-12cleanup flash module commandRodrigo L. Rosa1-8/+12
2011-06-12fix read for verify_imageRodrigo L. Rosa1-26/+4
2011-06-12fix read speed improved by queueing commandsRodrigo L. Rosa1-0/+13
2011-06-12fix flash driver size, sector eraseRodrigo L. Rosa1-126/+48
2011-06-04crc check on flashed dataRodrigo L. Rosa1-10/+71
2011-06-04code cleanupRodrigo L. Rosa1-21/+11
2011-05-23dsp5680xx: whitespace cleanupSpencer Oliver1-43/+43
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-05-23Fix build issue under cygwinSpencer Oliver1-1/+1
cygwin does not define sleep, so use our internal win32 version. caused by commit 9d4aec6bda90ad39a140747ea270c6a09dd26440 Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-05-19flashing speed improved using queued jtag. error propagation improved.Rodrigo L. Rosa1-275/+342
2011-05-18partial support for 568013 and 568037, target integration.Rodrigo L. Rosa1-0/+1351
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