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path: root/src/target/cortex_a8.c
AgeCommit message (Expand)AuthorFilesLines
2009-11-17target: remove some more duplicate includesDavid Brownell1-1/+0
2009-11-16Cortex-A8: no exit() calls, add missing v7-A initDavid Brownell1-31/+16
2009-11-16target: no implicit #includes of "register.h"David Brownell1-2/+1
2009-11-16target: don't implicitly include "breakpoint.h"David Brownell1-0/+1
2009-11-15ARM: memory utils aren't ARM7/ARM9 dependentDavid Brownell1-2/+3
2009-11-15target: make "examined" flag be per-targetDavid Brownell1-3/+3
2009-11-13command_t -> struct commandZachary T Welch1-1/+1
2009-11-13command_context_t -> struct command_contextZachary T Welch1-2/+2
2009-11-13target_t -> struct targetZachary T Welch1-47/+47
2009-11-13target_type_t -> struct target_typeZachary T Welch1-1/+1
2009-11-13armv4_5_common_t -> struct armZachary T Welch1-1/+1
2009-11-13cortex_a8_wrp_t -> struct cortex_a8_wrpZachary T Welch1-1/+1
2009-11-13cortex_a8_brp_t -> struct cortex_a8_brpZachary T Welch1-3/+3
2009-11-13breakpoint_t -> struct breakpointZachary T Welch1-9/+9
2009-11-13working_area_t -> struct working_areaZachary T Welch1-1/+1
2009-11-13reg_cache_t -> struct reg_cacheZachary T Welch1-1/+1
2009-11-13cortex_a8_common_t -> struct cortex_a8_commonZachary T Welch1-11/+11
2009-11-13armv7a_common_t -> struct armv7a_commonZachary T Welch1-23/+23
2009-11-13swjdp_common_t -> struct swjdp_commonZachary T Welch1-18/+18
2009-11-13jtag_tap_t -> struct jtag_tapZachary T Welch1-1/+1
2009-11-13use COMMAND_HANDLER macro to define all commandsZachary T Welch1-4/+2
2009-11-13Cortex-A8: fix indentDavid Brownell1-28/+28
2009-11-11cortex_a8: remove declarations, use static keywordZachary T Welch1-106/+82
2009-11-05Cortex-A8: use the new inheritance/nesting schemeDavid Brownell1-105/+41
2009-11-05cortex_a8: add mrc mcr interface.Øyvind Harboe1-0/+29
2009-11-05target: remove unused interface fn that clutters codeØyvind Harboe1-1/+0
2009-11-05debug interface: get rid of unused pre_debug fnØyvind Harboe1-4/+0
2009-10-13Cleanup: nuke trailling whitespacesYauheni Kaliuta1-10/+10
2009-10-02It is not possible to invalidate I-Cache on memory writes while the target is...mlu1-0/+3
2009-10-02Make sure that DSCR_DTR_RX is not full before writingmlu1-0/+27
2009-10-02More error reporting in Cortex_a8 execute_opcodemlu1-0/+6
2009-10-02Added asser_reset and deassert_reset for cortex_a8mlu1-2/+2
2009-10-02Added asser_reset and deassert_reset for cortex_a8mlu1-22/+56
2009-09-21Remove annoying end-of-line whitespace from most src/*dbrownell1-4/+4
2009-09-19Avoid cache invalidation when writing to hardware debug registersmlu1-4/+19
2009-09-18Move Cortex A8 debug access initialisation from omap3530.cfg to cortex_a8.cmlu1-28/+39
2009-09-16Use a variable armv7a->debug_base instead of hardedcoded OMAP3530_DEBUG_BASEmlu1-28/+31
2009-09-14Check return values to avoid infinite wait in loop on error.mlu1-4/+8
2009-09-14Cache invalidation when writing to memorymlu1-0/+18
2009-09-13Fix argument passing in cortex_a8_write_cp.mlu1-2/+1
2009-09-08Load PC with bit 0 set to 1 when resuming to say in Thumb instruction state.mlu1-2/+7
2009-09-07Improved handling of instruction set state, helps for debugging Thumb state.mlu1-7/+5
2009-09-04Matt Hsu <matt@0xlab.org> This patch simply enables the halting debug mode.oharboe1-0/+7
2009-09-04Matt Hsu <matt@0xlab.org> Tidy up the bit-offset operation for DSCR registeroharboe1-6/+6
2009-08-26Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ...oharboe1-5/+23
2009-08-26Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ...oharboe1-1/+1
2009-08-26Matt Hsu <matt@0xlab.org> cortex_a8_exec_opcode is writing the ARM instructio...oharboe1-1/+9
2009-08-26Matt Hsu <matt@0xlab.org> Wait for the DTRRX to be full before reading it. Re...oharboe1-4/+9
2009-08-26Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ...oharboe1-0/+8
2009-08-25- fix build warningsntfreak1-16/+16
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