aboutsummaryrefslogtreecommitdiff
path: root/src/target/armv7a.h
AgeCommit message (Expand)AuthorFilesLines
2018-11-06target/cortex_a: remove buggy memory AP accessesAntonio Borneo1-2/+0
2018-07-22armv7a: read ttbcr and ttb0/1 at every entry in debug stateAntonio Borneo1-0/+1
2018-03-11armv7a: cache ttbcr and ttb0/1 on debug state entryMatthias Welwarsky1-0/+1
2017-02-10target: Add 64-bit target address supportDongxue Zhang1-1/+1
2016-12-25target: armv7a: remove unused level_num field from armv7a_cachesizePaul Fertser1-1/+0
2016-11-04semihosting armv7a: Add support for ARMv7-AAndrey Smirnov1-0/+13
2016-05-24Make #include guard naming consistentMarc Schink1-3/+3
2016-05-24Remove FSF address from GPL noticesMarc Schink1-3/+1
2015-12-29arm_adi_v5: Convert the AP references from numbers to pointersAndreas Fritiofson1-2/+2
2015-12-29arm_debug: Support multiple APs per DAP and remove DAP from armv7* structsPatrick Stewart1-2/+0
2015-11-30cortex_a: replace cortex_a_check_address functionMatthias Welwarsky1-1/+0
2015-11-30cortex_a: force cache and tlb bypass when cpu is in debug stateMatthias Welwarsky1-0/+1
2015-11-30armv7a: remove indirection for cache info handlerMatthias Welwarsky1-2/+0
2015-11-30armv7a: fix handling of inner cachesMatthias Welwarsky1-2/+10
2015-11-30armv7a: rename l2_cache to outer_cacheMatthias Welwarsky1-2/+2
2015-11-30add armv7a_cache handlersOleksij Rempel1-0/+5
2015-11-05armv7a: correct calculation of ttbr0_maskMatthias Welwarsky1-4/+4
2015-11-05armv7a: re-read ttb information if ttbcr changesMatthias Welwarsky1-0/+1
2015-01-10cortex_a: Add support for A15 MPCoreKamal Dasu1-0/+6
2013-06-05update files to correct FSF addressSpencer Oliver1-1/+1
2013-03-15arch: Added ARMv7R and Cortex-R4 supportEvan Hunter1-0/+1
2013-03-15adi_v5: search for Debug and Memory AP supportEvan Hunter1-0/+1
2012-02-06build: cleanup src/target directorySpencer Oliver1-24/+15
2012-01-23cleanup: rename armv4_5 to arm for readabilitySpencer Oliver1-2/+2
2011-10-25armv7a: make local functions staticAndreas Fritiofson1-2/+0
2011-09-30armv7a ,cortex a : add L1, L2 cache support, va to pa supportMichel Jaouen1-2/+63
2010-07-19debug: debug entry error propagationØyvind Harboe1-1/+1
2010-03-17arm7/9: remove unused post_restore_contextØyvind Harboe1-2/+0
2010-03-05ADIv5 share DAP command supportDavid Brownell1-2/+1
2010-03-04rename "swjdp_common" as "adiv5_dap"David Brownell1-1/+1
2009-12-13target files shouldn't #include <target/...h>David Brownell1-5/+5
2009-12-07ARM: use <target/arm.h> not armv4_5.hDavid Brownell1-17/+1
2009-12-04ARM: rename armv4_5_state_* as arm_state_*David Brownell1-1/+1
2009-12-04ARM: rename armv4_5_mode_* AS arm_mode_*David Brownell1-2/+2
2009-12-03ARM DPM: make DSCR bit defs sharableDavid Brownell1-10/+0
2009-12-03change #include "armv4_5_mmu.h" to <target/armv4_5_mmu.h>Zachary T Welch1-1/+1
2009-12-03change #include "armv4_5_cache.h" to <target/armv4_5_cache.h>Zachary T Welch1-1/+1
2009-12-03change #include "armv4_5.h" to <target/armv4_5.h>Zachary T Welch1-1/+1
2009-12-03change #include "arm_dpm.h" to <target/arm_dpm.h>Zachary T Welch1-1/+1
2009-12-03change #include "arm_adi_v5.h" to <target/arm_adi_v5.h>Zachary T Welch1-1/+1
2009-12-01ARMv7a: move constants out of Cortex-A8 headerDavid Brownell1-0/+47
2009-12-01Cortex-A8: remove previous mcr()/mrc() methodsDavid Brownell1-7/+0
2009-11-24remove target_type register_command callbackZachary T Welch1-1/+2
2009-11-24Cortex-A8: implement DPMDavid Brownell1-0/+2
2009-11-22ARM: simplify CPSR handlingDavid Brownell1-10/+0
2009-11-19ARMv7-A: use standard ARM core statesDavid Brownell1-12/+2
2009-11-19ARMv7-A: use standard ARM core_mode symbolsDavid Brownell1-15/+2
2009-11-18ARM: simplify ARMv7-A register handlingDavid Brownell1-52/+0
2009-11-17ARM: add arm_mode_name()David Brownell1-2/+0
2009-11-16ARMv7-A: no exit() callsDavid Brownell1-1/+0
generated by cgit v1.1 at 2024-07-10 09:23:38 +0000