aboutsummaryrefslogtreecommitdiff
path: root/src/target/aarch64.c
AgeCommit message (Collapse)AuthorFilesLines
2023-05-13openocd: trivial replace of jim-nvp with new nvpAntonio Borneo1-4/+5
For some trivial case only, replace calls to jim-nvp with calls to the new OpenOCD nvp. Change-Id: Ifd9aff32b67748af8ab808e6a6b6e64f5271b888 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7553 Tested-by: jenkins
2023-05-05target: use 'ULL' suffix for long constantsAntonio Borneo1-13/+13
On 32 bit hosts, gcc should consider constants without suffix as 32 bits values. Use the suffix 'ULL' to guarantee it is a 64 bit. Detected through 'sparse' tool. Change-Id: I205ca986968fef9a536f87492d1f6c80e41829f3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7601 Tested-by: jenkins
2023-04-30aarch64: Add support for ARMv8-RJulien Massot1-4/+68
ARMv8-R platforms are similar to ARMv8-A regarding JTAG and most cpu registers. ARMv8-R doesn't has MMU but has MPU instead. ARMv8-R platforms can be AArch32 only such as Cortex-R52, or AArch64 capable like Cortex-R82. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Change-Id: Ib086f71685d1e3704b396d478ae9399dd8a391e1 Reviewed-on: https://review.openocd.org/c/openocd/+/6843 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-03-25target: aarch64: rewrite commands 'aarch64 mcr/mrc' as COMMAND_HANDLERAntonio Borneo1-83/+46
This also fixes an incorrect return ERROR_TARGET_NOT_HALTED from a jim command. Change-Id: I99a02a21bedb64e60944e295c7cf24356e07be60 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7490 Tested-by: jenkins
2022-12-17arm_adi_v5: fix SIGSEGV due to failing re-examineAntonio Borneo1-17/+14
Commit 35a503b08d14 ("arm_adi_v5: add ap refcount and add get/put around ap use") modifies the examine functions of mem_ap, cortex_m, cortex_a and aarch64 by calling dap_put_ap() and then looking again for the mem-ap and calling dap_get_ap(). This causes an issue if the system is irresponsive and the examine fails and left the AP pointer to NULL. If the system was already examined the NULL pointer will cause a SIGSEGV. Commit b6dad912b85d ("target/cortex_m: prevent segmentation fault in cortex_m_poll()") proposes a fix for one specific case and only on cortex_m. Modify all the examine functions by skipping look-up for the AP if it was already set in a previous examine; the target's AP is not supposed to change during runtime. Remove the partial fix for cortex_m as it is not needed anymore. Change-Id: I806ec3b1b02fcc76e141c8dd3a65044febbf0a8c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 35a503b08d14 ("arm_adi_v5: add ap refcount and add get/put around ap use") Reviewed-on: https://review.openocd.org/c/openocd/+/7392 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-09-18openocd: fix SPDX tag format for files .cAntonio Borneo1-1/+1
With the old checkpatch we cannot use the correct format for the SPDX tags in the file .c, in fact the C99 comments are not allowed and we had to use the block comment. With the new checkpatch, let's switch to the correct SPDX format. Change created automatically through the command: sed -i \ 's,^/\* *\(SPDX-License-Identifier: .*[^ ]\) *\*/$,// \1,' \ $(find src/ contrib/ -name \*.c) Change-Id: I6da16506baa7af718947562505dd49606d124171 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7153 Tested-by: jenkins
2022-09-13target: make local symbols staticAntonio Borneo1-1/+1
Symbols that are not exported should be declared as static. Change-Id: I2475524f4c14520e3163572560f4a9f276356ed5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7168 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-07-23target/semihosting: export semihosting_common_handlers[] from header fileErhan Kurubas1-2/+0
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I4add0c1dc7888497ee90fd02754607a16434b66f Reviewed-on: https://review.openocd.org/c/openocd/+/7075 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-07-23openocd: src/target: replace the GPL-2.0-or-later license tagAntonio Borneo1-14/+2
Replace the FSF boilerplate with the SPDX tag. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: I255ad17235ff1e01bf0aa4deed4d944e1d693ddb Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7071 Tested-by: jenkins
2022-06-24aarch64: fix handling of 'reset halt'Antonio Borneo1-5/+5
Commit 6c0151623cb0 ("aarch64: add support for "reset halt"") introduces the register setting to halt at reset vector, but: - does not consider the case 'srst_pulls_trst' that makes useless setting the registers as they will be erased by the pulled trst; - does not clean sticky errors in case of 'srst_gates_jtag'. Avoid any register initialization on 'srst_pulls_trst' and move the cleaning of sticky errors in the common block. Change-Id: I6f839f06f7b091e234ede31ec18096e51f017bcd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 6c0151623cb0 ("aarch64: add support for "reset halt"") Reviewed-on: https://review.openocd.org/c/openocd/+/7034 Tested-by: jenkins Reviewed-by: Christian Hoff <christian.hoff@advantest.com>
2022-06-24arm_adi_v5: add ap refcount and add get/put around ap useAntonio Borneo1-2/+14
While an ADIv5 DAP can only have 256 AP, ADIv6 can provide till 2**40 (1,099,511,627,776) AP per DAP. The actual trivial code implementation for ADIv5 (that uses an array of 256 ap in the struct adiv5_dap) cannot be extended as-is to handle ADIv6. The simple array of 256 AP can be reused as a dynamic storage for ADIv6 ap: - the ADIv5 AP number is replaced by the ADIv6 base address; - the index of the array (equal to ADIv5 AP number) has no link to any ADIv6 property; - the ADIv6 base_address has to be searched in the array of AP. The 256 elements in the AP array should be enough for any device available today. In future it can be easily increased, if needed. To efficiently use the 256 elements in the AP array, the code should associate one element of the array to an ADIv6 AP (through the AP base address), then cancel the association when the AP is not anymore needed. This is important to avoid saturating the AP array while exploring the device through 'dap apreg' commands. Add a reference counter in the struct adiv5_ap to track how many times the struct has been associated with the same base address. Introduce the function dap_get_ap() to associate and return the struct, and dap_put_ap() to release the struct. For the moment the code covers ADIv5 only, so the association is through the index. Use the two functions above and dap_find_get_ap() throughout the code. Check the return value of dap_get_ap(). It is always not NULL in the current ADIv5-only implementation, but can be NULL for ADIv6 when there are no more available AP in the array. Instrument dap_queue_ap_read() and dap_queue_ap_write() to log an error message if the AP has reference counter zero, meaning that the AP has not been 'get' yet. This helps identifying AP used without get/put, e.g. code missed by this patch, or merged later. Instrument dap_cleanup_all() to log an error message if an AP has reference counter not zero at openocd exit, meaning that the AP has not been 'put' yet. Change-Id: I98316eb42b9f3d9c9bbbb6c73b1091b53f629092 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6455 Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Tested-by: jenkins
2022-05-14aarch64: don't wait for smp targets halted in deassert resetAntonio Borneo1-3/+7
The function target_type::deassert_reset() is called for every target after reset is deasserted. If the target fails to get halted, we log a warning and issue a halt request for the target itself. Current code calls the generic target_halt() that: - extends the halt to all the targets in the SMP node; - waits for targets to halt. This breaks the logic of running target_type::deassert_reset() per target. Plus, waiting for targets to halt delays the call of target_type::deassert_reset() for the next targets. Replace the call to target_halt() with the aarch64 specific function to halt the single target. Pass the parameter HALT_LAZY to prevent the wait for target halted. Similar solution is already implemented for cortex_a. Change-Id: I446dc03cb91524c6d388db485bc2388177af77b6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6947 Tested-by: jenkins
2022-05-14arm_adi_v5: let dap_lookup_cs_component() to get AP dbgbaseAntonio Borneo1-11/+4
Simplify the code in cortex_a and aarch64 by moving the call to dap_get_debugbase() inside dap_lookup_cs_component(). This has the further effects: - dap_get_debugbase() is not referenced outside arm_adi_v5.c and becomes static; - dap_lookup_cs_component() looses one parameter; - the coreid parameter 'idx' is passed as value; - the caller in aarch64 don't have and don't print the irrelevant value of AP register APID; - fixes the debug message in the caller in aarch64 to print the coreid value instead of always zero. Change-Id: Ic7f0f643fdf067c059c8f2455a02ff18a3fed054 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6823 Tested-by: jenkins
2022-03-19target: Rework 'set' variable of break-/watchpointsMarc Schink1-24/+24
The 'set' variable name suggests a boolean data type which determines whether a breakpoint (or watchpoint) is active. However, it is also used to store the number of the breakpoint. This encoding leads to inconsistent value assignments: boolean and integer values are mixed. Also, associated hardware comparator numbers, which are usually numbered from 0, cannot be used directly. An additional offset is required to store the comparator numbers. In order to make the code more readable and the value assignment more consistent, change the variable name to 'is_set', its data type to 'bool' and introduce a dedicated variable for the break-/watchpoint number. In order to make the review easier, the data types of various related variables (e.g. number of breakpoints) are not changed. While at it, fix a few coding style issues. Change-Id: I2193f5639247cce6b80580d4c1c6afee916aeb82 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/6319 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-14target/smp: use a struct list_head to hold the smp targetsAntonio Borneo1-8/+7
Instead of reinventing a simply linked list, reuse the list helper for the list of targets in a smp cluster. Using the existing helper, that implements a double linked list, makes trivial going through the list in reverse order. Change-Id: Ib36ad2955f15cd2a601b0b9e36ca6d948b12d00f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6783 Tested-by: jenkins
2022-01-29aarch64: support for aarch32 ARM_MODE_UNDJulien Massot1-0/+3
Fix: unrecognized psr mode: 0x1b cannot read system control register in this mode: (UNRECOGNIZED : 0x1b) Change-Id: I4dc3e72f90d57e52c0fe63cb59a7529a398757b3 Signed-off-by: Julien Massot <julien.massot@iot.bzh> Change-Id: Ifa5d21ae97492fde9e8c79ee7d99d8a2a871b1b5 Reviewed-on: https://review.openocd.org/c/openocd/+/6808 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-01-22aarch64: dump a message when CTI is missingAntonio Borneo1-1/+3
If the CTI is not specified OpenOCD fails target's examination without indicating the reason. Drop an error message about the missing CTI. Change-Id: I344537fb21cf38785796ba938e71890e04135509 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6788 Tested-by: jenkins
2021-09-25arm_coresight: add include file and use itAntonio Borneo1-2/+3
Several magic numbers related to ARM CoreSight specification IHI0029E are spread around OpenOCD code. Define through macros the ARM CoreSight magic numbers and collect them in a single include file. Use the new macros wherever possible. Change-Id: I9b0c1c651ce4ffbaf08d31791ef16e95983ee4cb Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6446 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
2021-07-24openocd: remove NULL comparisons with checkpatch [1/2]Antonio Borneo1-2/+2
Patch generated automatically through the new checkpatch with flags "--types COMPARISON_TO_NULL --fix-inplace". This only fixes the comparisons if (symbol == NULL) if (symbol != NULL) The case of NULL on the left side of the comparison is not tested. Some automatic fix is incorrect and has been massaged by hands: - if (*psig == NULL) + if (*!psig) changed as + if (!*psig) Change-Id: If4a1e2b4e547e223532e8e3d9da89bf9cb382ce6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6351 Tested-by: jenkins
2021-07-24openocd: fix simple cases of NULL comparisonAntonio Borneo1-14/+14
There are more than 1000 NULL comparisons to be aligned to the coding style. For recurrent NULL comparison it's preferable using trivial scripts in order to minimize the review effort. Patch generated automatically with the command: sed -i PATTERN $(find src/ -type f) where PATTERN is in the list: 's/(\([a-z][a-z0-9_]*\) == NULL)/(!\1)/g' 's/(\([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\) == NULL)/(!\1)/g' 's/(\([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\) == NULL)/(!\1)/g' 's/(\([a-z][a-z0-9_]*\) != NULL)/(\1)/g' 's/(\([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\) != NULL)/(\1)/g' 's/(\([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\) != NULL)/(\1)/g' 's/(NULL == \([a-z][a-z0-9_]*\))/(!\1)/g' 's/(NULL == \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(!\1)/g' 's/(NULL == \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(!\1)/g' 's/(NULL != \([a-z][a-z0-9_]*\))/(\1)/g' 's/(NULL != \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(\1)/g' 's/(NULL != \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(\1)/g' Change-Id: Ida103e325d6d0600fb69c0b7a1557ee969db4417 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6350 Tested-by: jenkins
2021-07-20target/arm: rename CamelCase symbolsAntonio Borneo1-46/+46
No major cross dependencies, mostly changes internal to each file/function. Change-Id: I3f0879f0f33c6badc36a0dc60229323978a7e280 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6338 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Xiang W <wxjstz@126.com>
2021-07-02target/aarch64: Replace printf() with LOG_DEBUG()Marc Schink1-2/+2
Change-Id: If32bc320c48259dec4b81d457b848e972bcda784 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/6335 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-07-02target/adiv5: Large Physical Address ExtensionKevin Burke1-3/+3
Provides ARM LPAE support to allow 64-bit TAR setting on MEM AP accesses. Tested on a 4-core ARM ARES Processor system using an AXI Access Port. Change-Id: I88f7a0a57a6abb58665032929194a41dd8729f6b Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com> Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Reviewed-on: http://openocd.zylin.com/5576 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-06-18target: Rename 'linked_BRP' to 'linked_brp'Marc Schink1-3/+3
Change-Id: I9dd67ac3e8cd5dd9cdeffce56020b387a8f298fa Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/6316 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-06-04helper/jim-nvp: comply with coding style [2/2]Antonio Borneo1-10/+10
With the API fixed to comply with OpenOCD coding style, fix all the references in the code. Patch generated automatically with the script below. The list is in reverse order to replace a common prefix after the replacement of the symbols with the same prefix. %<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<--- (cat << EOF Jim_SetResult_NvpUnknown jim_set_result_nvp_unknown Jim_Nvp_value2name_simple jim_nvp_value2name_simple Jim_Nvp_value2name_obj jim_nvp_value2name_obj Jim_Nvp_value2name jim_nvp_value2name Jim_Nvp_name2value_simple jim_nvp_name2value_simple Jim_Nvp_name2value_obj_nocase jim_nvp_name2value_obj_nocase Jim_Nvp_name2value_obj jim_nvp_name2value_obj Jim_Nvp_name2value_nocase_simple jim_nvp_name2value_nocase_simple Jim_Nvp_name2value_nocase jim_nvp_name2value_nocase Jim_Nvp_name2value jim_nvp_name2value Jim_Nvp struct jim_nvp Jim_GetOpt_Wide jim_getopt_wide Jim_GetOpt_String jim_getopt_string Jim_GetOpt_Setup jim_getopt_setup Jim_GetOpt_Obj jim_getopt_obj Jim_GetOpt_NvpUnknown jim_getopt_nvp_unknown Jim_GetOpt_Nvp jim_getopt_nvp Jim_GetOpt_Enum jim_getopt_enum Jim_GetOpt_Double jim_getopt_double Jim_GetOpt_Debug jim_getopt_debug Jim_GetOptInfo struct jim_getopt_info Jim_GetNvp jim_get_nvp Jim_Debug_ArgvString jim_debug_argv_string EOF ) | while read a b; do sed -i "s/$a/$b/g" $(find src -type f ! -name jim-nvp.\? ) done %<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<--- Change-Id: I10a12bd64bb8b17575fd9150482c989c92b298a2 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6184 Reviewed-by: Marc Schink <dev@zapb.de> Tested-by: jenkins
2021-05-22target/aarch64: fix watchpoint managementAntonio Borneo1-30/+19
The early documentation for armv8a report the debug register WFAR as containing the address of the instruction that triggered the watchpoint. More recent documentation report the register EDWAR as containing the data memory address that triggered the watchpoint. The name of macros CPUV8_DBG_WFAR0 and CPUV8_DBG_WFAR1 is not correct as they point to the debug register EDWAR, so reading such register returns directly the data memory address that triggered the watchpoint. The code incorrectly passes this address value to the function armv8_dpm_report_wfar(); this function is supposed to adjust the PC value, decrementing it to remove the effects of the CPU pipeline. This pipeline offset, that has no meaning on the value in EDWAR, caused commit 651b861d5d5f ("target/aarch64: Add watchpoint support") to add back the offset while comparing the address with the watchpoint enabled. The upper 32 bits of EDWAR are not valid in aarch32 mode and have to be ignored. Rename CPUV8_DBG_WFAR0/1 as CPUV8_DBG_EDWAR0/1. Remove the function armv8_dpm_report_wfar(). Remove the offset while searching the matching watchpoint. Ignore the upper 32 bits of EDWAR in aarch32 mode. Fix a comment and the LOG text. Change-Id: I7cbdbeb766fa18e31cc72be098ca2bc501877ed1 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6205 Tested-by: jenkins Reviewed-by: Liming Sun <limings@nvidia.com>
2021-05-22target/arm_dpm: rename 'wp_pc' as 'wp_addr'Antonio Borneo1-3/+3
The field 'wp_pc' was originally introduced in commit 55eeea7fceb6 ("ARMv7a/Cortex-A8: report watchpoint trigger insn") in end 2009 to contain the address of the instruction which triggered a watchpoint. Later on with commit 651b861d5d5f ("target/aarch64: Add watchpoint support") it has been reused in to hold directly the memory address that triggered a watchpoint. Rename 'wp_pc' as 'wp_addr' and change its doxygen description. While there, fix the format string to print the field. Change-Id: I2e5ced1497e4a6fb6b38f91e881807512e8d8c47 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6204 Tested-by: jenkins Reviewed-by: Liming Sun <limings@nvidia.com>
2021-04-18helper/command: register full-name commands in jimAntonio Borneo1-1/+2
While still keeping the tree of struct command, stop registering commands in jim by the root "word" only. Register the full-name of the command and pass as private data the struct command of the command itself. Still use the tree of struct command to un-register the commands. Some "native" commands (.jim_handler) share the same handler, then the handler checks the command name to run the right code. Now argv[0] returns the full-name of the command, so check the name by looking in the struct command passed as private data. Change-Id: I5623c61cceee8a75f5d5a551ef3fbf5a303af6be Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5671 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-04-18Aarch64:Switch to EL1 from EL0 before manipulate MMUCheng-Shiun Tsai1-0/+9
If current core is in EL0, it cannot use 'msr sctlr_el1, x0' Change-Id: I04e60e39e4c84f9d9de7cc87a8e438f5d2737dc3 Signed-off-by: Cheng-Shiun Tsai <cheng.shiun.tsai@gmail.com> Reviewed-on: http://openocd.zylin.com/6051 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2021-04-11target/aarch64: Add watchpoint supportLiming Sun1-4/+218
There are some breakpoint/watchpoint related code in armv8_dpm.c, but seems not working for aarch64. Target aarch64 has its own breakpoint implementation in aarch64.c. This commit follows the same logic to add watchpoint support for target aarch64. This commit also increases the size of stop_reason[] in function gdb_signal_reply() since the old size is too small to fit in a 64-bit address, such as ffff8000115e6980. Change-Id: I907dc0e648130e36b434220f570c37d0e8eb5ce1 Signed-off-by: Liming Sun <lsun@mellanox.com> Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Reviewed-on: http://openocd.zylin.com/4761 Tested-by: jenkins Reviewed-by: Liming Sun <limings@nvidia.com> Reviewed-by: Kevin Burke <kevinb@os.amperecomputing.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-19aarch64: add support for "reset halt"Christian Hoff1-7/+101
Support halting the CPU directly after a reset. If halt is requested, the CPU stops directly at the reset vector, before any code is executed. This functionality was implemented using the Reset Catch debug event. Change-Id: If90d54c088442340376f0b588ba10267ea8e7327 Signed-off-by: Christian Hoff <christian.hoff@advantest.com> Reviewed-on: http://openocd.zylin.com/5947 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-10-11target/aarch64: fix use of 'target->private_config'Antonio Borneo1-0/+5
The function adiv5_jim_configure() casts the void pointer 'target->private_config' to a struct adiv5_private_config pointer. This is tricky in case of aarch64, where the private data are in a struct aarch64_private_config that has as first element the struct adiv5_private_config. While the current solution is working fine, it's not clean and requires special attention for any further code development. Override 'target->private_config' to the correct pointer while calling adiv5_jim_configure(). Change-Id: Ic2fc047dd1e57013943d96e6d5879a919d1eb7b3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5847 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-10-11target/aarch64: Use apnum settingKevin Yang1-10/+14
Change aarch64 to use ap-num setting if provided. Fall back to original behavior of using first AP when ap-num is invalid. Change-Id: I0d3624f75c86ba5fd5a322ac60856dbbb6e71eaf Signed-off-by: Kevin Yang <kangyang@google.com> Reviewed-on: http://openocd.zylin.com/5831 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03target/aarch64: a64 disassemblerMete Balci1-1/+41
Add A64 (AArch64) Disassembler using Capstone framework. Change-Id: Ia92b57001843b11a818af940a468b131e42a03fd Signed-off-by: Mete Balci <metebalci@gmail.com> [Antonio Borneo: Rebased on current HEAD] Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5004 Tested-by: jenkins
2020-09-05target: use proper format with uint32_tAntonio Borneo1-3/+3
Modify the format strings to properly handle uint32_t data types. While there, fix prototype mismatch between header and C file of the function armv7a_l1_d_cache_inval_virt(). Change-Id: I434bd241fa5c38e0c15d22cda2295097050067f5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5818 Tested-by: jenkins
2020-07-26target: fix minor typos and duplicated wordsAntonio Borneo1-1/+1
Change-Id: I8deb0017dc66a243e3dd51e285aa086db500decd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5766 Tested-by: jenkins
2020-06-27aarch64: Add support for debugging in HYP mode on ARMv8-A coresLucas1-2/+7
When debugging an ARMv8-A/AArch32 target running HYP mode, OpenOCD would throw the following error to GDB on most operations (step, set breakpoint): cannot read system control register in this mode The mode in question is 0x1A, a privilege level 2 mode available on cores that have the virtualization extensions (such as the Raspi 3). Note: this mode is only used when running in AArch32 compatibility mode. Signed-off-by: Lucas Jenss <public@x3ro.de> Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Change-Id: Ia8673ff34c5b3eed60e24d8da57c3ca8197a60c2 Reviewed-on: http://openocd.zylin.com/5255 Tested-by: jenkins Reviewed-by: Lucas Jenß <lucas.jenss@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12semihosting: add semihosting handlers to AArch64Tarek BOCHKATI1-0/+9
note: this works only when the PE is in AArch64 state Change-Id: Id6a336ca7d201df72bd1aaaeccce4185473fc1bd Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5474 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12target/aarch64: fix soft breakpoint when PE is in AArch32 stateTarek BOCHKATI1-1/+24
Before this patch aarch64_set_breakpoint was using either A64, or A32 HLT opcode by relying on armv8_opcode helper. This behaviors ignores the fact that in AArch32 state the core could execute Thumb-2 instructions, and gdb could request to insert a soft bkpt in a Thumb-2 code chunk. In this change, we check the core_state and bkpt length to know the correct opcode to use. Note: based on https://sourceware.org/gdb/current/onlinedocs/gdb/ARM-Breakpoint-Kinds.html if bkpt length/kind == 3, we should replace a 32-bit Thumb-2 opcode, then we use twice the 16 bits Thumb-2 bkpt opcode and we fix-up the length to 4 bytes, in order to set correctly the bpkt. Change-Id: I8f3551124412c61d155eae87761767e9937f917d Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5355 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12target/aarch64: fix minor stepping issue with gdbTarek BOCHKATI1-1/+1
when using step command from gdb the step happens without any issue, but aarch64_step call explicitly aarch64_poll which consumes the status change to HALTED, so it does not inform gdb that the step has finished. by removing this call, all is back to normal and openocd could inform gdb that the step has finished. Change-Id: I9366aecd20f7d52259b050b8653189b67d9299d0 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5354 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-06-14target/aarch64: remove dependency from jtag queueAntonio Borneo1-2/+3
Replace jtag specific API jtag_add_reset() with transport independent API adapter_{de}assert_reset(). Change-Id: I32c43e2e47366363521fa3f387de9e2fb1c20852 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4943 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-14helper/command: change prototype of command_print/command_print_samelineAntonio Borneo1-1/+1
To prepare for handling TCL return values consistently, all calls to command_print/command_print_sameline should switch to CMD as first parameter. Change prototype of command_print() and command_print_sameline() to pass CMD instead of CMD_CTX. Since the first parameter is currently not used, the change can be done though scripts without manual coding. This patch is created using the command: sed -i PATTERN $(find src/ doc/ -type f) with all the following patters: 's/\(command_print(cmd\)->ctx,/\1,/' 's/\(command_print(CMD\)_CTX,/\1,/' 's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/' 's/\(command_print_sameline(cmd\)->ctx,/\1,/' 's/\(command_print_sameline(CMD\)_CTX,/\1,/' 's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/' This change is inspired by http://openocd.zylin.com/1815 from Paul Fertser but is now done through scripting. Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/5081 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14target/armv8: change prototype of display_cache_info()Paul Fertser1-1/+1
To prepare for handling TCL return values consistently, all calls to command_print/command_print_sameline should be ready to switch to CMD as first parameter. Change prototype of display_cache_info(), armv8_handle_inner_cache_info_command() and armv8_handle_cache_info_command() to pass CMD instead of CMD_CTX. This change was part of http://openocd.zylin.com/1815 from Paul Fertser and has been extracted and rebased to simplify the review. Change-Id: I13519c79af82cdba57d5205ba84a5a27fce65a36 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5066 Tested-by: jenkins
2019-03-27smp: replace commands smp_on/smp_off with "smp [on|off]"Antonio Borneo1-52/+4
Seams over-engineered having two separate commands to turn SMP on/off. Plus it is missing the possibility to dump the current status of SMP and would be weird adding an additional command for it. Moreover, such commands are replicated in few targets so it would make sense centralizing them. - Deprecate the commands "smp_on" and "smp_off". - Add a new command "smp" that accepts optional parameters "[on|off]" and prints the SMP status when run without parameters. This replaces the two commands above. - Put the deprecated and the new command handlers in smp.c - Update the documentation, except for mips_m4k, since it is not available yet. - Promote the macro foreach_smp_target to global context and use it where possible. Change-Id: Ia72841c1a3bd6edd4db4cc809046322f498617e6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4615 Tested-by: jenkins Reviewed-by: Graham Sanderson <graham.sanderson@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-06target/aarch64: Use 'bool' data typeMarc Schink1-2/+2
Change-Id: Ibfe4413b88ed0759a556a8777dac40f0c2c64922 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/4957 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-01Use enum for target_register_timer_callback()Marc Schink1-1/+2
Change-Id: I268e8c5d783914aa97cbde301448b2c5bc3cb9e6 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/4921 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-25aarch64: fix a potential memory leak in aarch64_target_create()Antonio Borneo1-1/+7
If the function aarch64_target_create() exits for an error, the value of pointer aarch64 get lost, causing a memory leak. Move the allocation of aarch64 after the check on the parameters. While there, add a check on the value returned by calloc(). Issue highlighted by clang 7.0.0. Change-Id: Ib9ad27f4acd940da308c01fdbf33cfe51ab0c639 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4924 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-30aarch64: support for aarch32 ARM_MODE_SYSMatthias Welwarsky1-0/+3
Treat ARM_MODE_SYS like all other Aarch32 processor modes, except for the special case of missing SPSR. Change-Id: I60b21703659b264f552884cdc0f85fd45f7836de Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4494 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-01-08target/aarch64: add support for multi-architecture gdbAntonio Borneo1-0/+1
GDB can be built for multi-architecture through the command ./configure --enable-targets=all && make Such multi-architecture GDB requires the target's architecture to be selected either manually by the user through the GDB command "set architecture" or automatically by the target description sent by the remote target (i.e. OpenOCD). Commit e65acd889c61a424c7bd72fdee5d6a3aee1d8504 ("gdb_server: add support for architecture element") already provides the required infrastructure to support multi-architecture gdb. aarch64-linux-gnu-gdb 8.2 uses "aarch64" as default architecture, but also supports the value "aarch64:ilp32" and all the values supported by arm-none-eabi-gdb. These values can be displayed on arm gdb prompt by typing "set architecture " followed by a TAB for autocompletion. Set the gdb architecture value for aarch64 target to "aarch64". Change-Id: I63e9769f47d8e73f048eb84fa73e082dd1c8e52c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4755 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-07-20target/aarch64: Call aarch64_init_debug_access() earlier in ↵Dennis Ostermann1-3/+5
aarch64_deassert_reset() On Renesas R-Car, calling 'reset halt' and 'reset init' always made DAP inaccessible. Calling 'reset' and 'halt' seperatly worked fine. The only differences seems to be the point in time when aarch64_init_debug_access() is called. This patch aligns the behaviour. Change-Id: I2296c65e48414a7d9846f12a395e5eca315b49ca Signed-off-by: Dennis Ostermann <dennis.ostermann@renesas.com> Reviewed-on: http://openocd.zylin.com/4607 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
generated by cgit v1.1 at 2024-10-19 19:33:18 +0000