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2019-04-03Merge branch 'master' into from_upstreamTim Newsome65-271/+465
Conflicts: src/flash/nor/at91sam4.c src/flash/nor/at91sam4l.c src/flash/nor/at91samd.c src/flash/nor/ath79.c src/flash/nor/atsame5.c src/flash/nor/cfi.c src/flash/nor/core.c src/flash/nor/fespi.c src/flash/nor/kinetis.c src/flash/nor/kinetis_ke.c src/flash/nor/lpc2000.c src/flash/nor/niietcm4.c src/flash/nor/nrf5.c src/flash/nor/numicro.c src/flash/nor/pic32mx.c src/flash/nor/stm32h7x.c src/flash/nor/stm32lx.c src/flash/nor/stmsmi.c src/flash/nor/tcl.c src/flash/nor/tms470.c src/flash/nor/virtual.c src/flash/nor/xmc4xxx.c src/rtos/hwthread.c src/rtos/rtos.c src/server/gdb_server.c src/target/riscv/riscv-011.c src/target/riscv/riscv-013.c src/target/riscv/riscv.c src/target/riscv/riscv.h Change-Id: I9f0f373d45a9e5845bca83ca52e977f727ea4425
2019-03-27Constify struct flash_driver instancesChristopher Head64-135/+135
Instances of struct flash_driver are never written to at runtime. For a small amount of memory saving and also robustness (fewer things for stray pointer writes to hit), mark them const. Change-Id: Iadbbbc2fac0976d892699200000c5f02856729f3 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4803 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-27flash/nor/core: adjust flash_iterate_address_range_inner() for 64-bitTomas Vanek1-19/+17
Use target_addr_t exclusively for comparison of sector boudaries and address range. Use the last addres for both address range end and sector end. It avoids problems with a flash bank mapped at the very end of target address space. Change-Id: Idf97c837453d97cbc4cf8a1c76ad799f4142f19e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4985 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-14flash/stm32h7x: remove IWDG1_SW separate variableChristopher Head1-14/+0
Bit 4 in OPTSR is IWDG1_SW (the code originally called it IWDG1_HW, but the reference manual refers to it as IWDG1_SW). This is broken out into a separate variable, independent_watchdog_selection, in stm32x_options. However, this is not necessary: bit 4 is included in the user_options field, which includes all of bits 2 through 7, and independent_watchdog_selection is not referenced anywhere else. Delete the field and just rely on user_options to transport that bit, along with all the other bits it contains, between stm32x_read_options and stm32x_write_options. Change-Id: I4da63df9272cf091267b956c412b95671ea1d3c9 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4744 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-03-12flash/nor/tcl.c: use COMMAND_PARSE_ADDRESSTomas Vanek1-5/+1
instead of conditional compilation #if BUILD_TARGET64 Change-Id: I005ae0b3a4ed127c0f59219b1c6b185a2c76c76e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4977 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com>
2019-03-11Fix FESPI address parsing. (#355)Tim Newsome1-3/+1
Change-Id: Ib4bf9fb5a47121ab719395537cd97d848e177262
2019-03-08flash/nor: use target_addr_t for flash bank baseTim Newsome28-98/+121
This should allow users to configure flash at >32-bit addresses. Change-Id: I7c9d3c5762579011a2d9708e5317e5765349845c Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4919 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-27flash: stm32f2/f4/f7: Add One-Time-Porgrammable (OTP) supportMoritz Fischer1-10/+211
The OTP is part of the flash memory. It has 512 (1024 for F7) bytes and is organized in 16 sectors with 32 (64 for F7) bytes each. The OTP is exposed as separate flash bank 1 and can be used with the usual flash commands. Writing the OTP can be done as follows: > stm32f2x otp 1 enable > flash write bank 1 foo.bin 0 > mdw 0x1fff7800 4 > verify_image foo.bin 0x1fff7800 > stm32f2x otp 1 disable Note: This patch is largely a rebase/cleanup of a patch from 2012 by Laurent Charpentier and he did most of the work. No new Clang-Analyzer warnings. Change-Id: I5e6371f6a7c7a9929c1d7907d6ba4724f9d20d97 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-on: http://openocd.zylin.com/829 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-21Fix support for single-bank stm32l4 processorsArmin van der Togt1-2/+13
Recent patches for STM32L4+ assumed all STM32L4 processors have a dual- bank option. This is not the case for STM32L4{3,4,5,6}xx processors and therefore, these processors (like STM32L433) failed when attempting to flash the second half of the flash memory. This patch fixed this issue. Tested on STM32L433xC, STM32L476xG and STM32L471xG. Change-Id: I8262ba4f05190802c5868d753f3e7af50e581811 Signed-off-by: Armin van der Togt <armin@otheruse.nl> Reviewed-on: http://openocd.zylin.com/4913 Tested-by: jenkins Reviewed-by: Peter Tettelaar <peter@float-iot.nl> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Mark Schulte <mschulte@lyft.com>
2019-02-08Fix build.Tim Newsome1-3/+2
Change-Id: Ifed3d69135c349898733943bedbd9e5c9daccf2c
2019-02-08Merge branch 'master' into from_upstreamTim Newsome41-514/+1918
Conflicts: README contrib/loaders/flash/fespi/Makefile src/flash/nor/fespi.c src/flash/nor/spi.c Change-Id: I78a4e73685cc95daace95e9d16066a6fb51034fb
2019-02-07at91samd: Add flash programming support for SAMC2?N* partsKevin Vermilion1-0/+4
Added id, name, flash size and RAM size for following parts to samc20_parts[]: SAMC20N18A SAMC20N17A And the following to samc21_parts[]: SAMC21N18A SAMC21N17A Change-Id: Ie8cf1c531a60bfaed6e814d436d232afb89dae3f Signed-off-by: Kevin Vermilion <kevin.vermilion@gmail.com> Reviewed-on: http://openocd.zylin.com/4880 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07flash/nor/stm32f1x: Ability to change user option bytes.Jan Vojtech1-2/+12
Adds ability to change the user data in STM32F1x/STM32F3x MCU's option byte. Since OpenOCD prints the content of user data in option byte registers, it is seems logical to also provide a way how to change this data. Change-Id: Ie6cb756b4f11b5c6dabd34bc89434a358eb758ff Signed-off-by: Jan Vojtech <honza.vojtech@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4663 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-02-07target algo: do not write reg_param if direction is PARAM_INTomas Vanek1-1/+1
Without this change xxx_start_algorithm() writes all register parameters no matter of their direction. It usually results in writing of uninitialized reg_params[].value - possibly reported by valgrind. While on it fix the wrong parameter direction in kinetis_disable_wdog_algo(). This bug did not have any impact because of unconditional write of reg_params. Change-Id: Ia9c6a7b37f77d5eb6e5f5463012dddd50471742b Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4813 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-05flash/nor: flash driver and cfg for SAM E54, E53, E51 and D51Tomas Vanek3-0/+958
The new Microchip (former Atmel) series powered by Cortex-M4 looks very similar to older M0+ powered SAM D2x at the first sight. Unfortunately the new series differs a lot in important details. NVMCTRL has different register addresses, moved important bits and even changed binary command set. An universal driver for all SAM D/E would be very complicated. That's why a new driver was derived. Tested on Microchip SAM E54 Xplained Pro kit (board cfg included). Adjusted for the restructured dap support. Checked by valgrind and clang static analyzer. Change-Id: I26c67047a552076f4b207b9b89285a53d69b4ca4 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4272 Tested-by: jenkins Reviewed-by: Andres Vahter <andres.vahter@gmail.com>
2019-02-04flash/nor/stm32f1x: use address instead of offset in stm32x_write_block()Tomas Vanek1-6/+4
stm32x_write_options() uses stm32x_write_block() at STM32_OB_RDP address. The change eliminates subtracting bank->base (and later adding it back). Change-Id: Icdd24afc7178b814be58e6033d4b93fdfb2d2a16 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4859 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
2019-02-04flash/nor/stm32f1x: fix minor error messagesTomas Vanek1-3/+5
Change-Id: I1e9e62979c4629c8ba1d5ae89ca7392259969eb6 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4858 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com>
2019-02-04flash/nor/at91samd: add samr34j18.Guillaume Revaillot1-0/+3
samr34/r35 combine SAML21 and SX1276 (lora transceiver). This one was found on xplaned pro evaluation kit. Ids for other r34/r35 chips are apparently not yet documented. Change-Id: I4054dd56ea53c9bae8d17abd5a3e4e65e1b9c8b1 Signed-off-by: Guillaume Revaillot <g.revaillot@gmail.com> Reviewed-on: http://openocd.zylin.com/4872 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-31Fix sending memory-map for 64-bit targets. (#348)Tim Newsome22-57/+79
See #202. I don't have a proper target with >32-bit flash and memory location, so I've been unable to properly test this. However, if I hack the fespi driver to not do anything and run the 64-bit spike tests I can see that the memory map OpenOCD sends now includes the full 64-bit address space: Debug: 3443 975 gdb_server.c:400 gdb_put_packet_inner(): sending packet '$l<memory-map> <memory type="ram" start="0x00000000" length="0x20000000"/> <memory type="ram" start="0x20000000" length="0xffffffffe0000000"/> </memory-map> It will also do this when the target is 32-bit, but that doesn't seem to have any ill effects on gdb. Change-Id: I0fd070ab7366188ff0259d90386f5e1f6985ce21
2019-01-30arm_adi_v5: rewrite dap_to_jtag and dap_to_swdAntonio Borneo1-2/+4
The functions dap_to_jtag() and dap_to_swd() have been introduced by 3ef9beb52cd0 ("ADIv5 DAP ops switching to JTAG or SWD modes") in arm_adi_v5.c by using the JTAG queue only. Later, in 6f8b8593d63b ("ADIv5 transport support moves to separate files") the functions has been moved in adi_v5_swd.c and adi_v5_jtag.c but keeping the dependency from JTAG queue. The functions does not work if the current transport is not JTAG. Move back the functions in arm_adi_v5.c, replace the input parameter "target" with "dap", use the transport to detect if the JTAG queue is present, in case of SWD transport use the proper method, for other transports report error. Reuse the ADI v5 sequences already present in jtag/swd.h. Also, OpenOCD does not support switching to another transport after the initial selection, so do not change DAP's ops vector. Change-Id: Ib681fbaa60cb342f732bc831eb92de25afa4e4db Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4852 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-27command: initialize the command mode for every commandAntonio Borneo1-0/+1
All the commands in OpenOCD have been inspected and have the command mode initialize, apart for two of them. This is not critical, because the uninitialized value (0) is equivalent to the enum COMMAND_EXEC, that is also the correct value for the two mentioned commands. To keep the code consistent, initialize the command mode to COMMAND_EXEC. Change-Id: Iaf043364cbd1005418d787ed045a3ec653612382 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4861 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-21nrf5: add nrf5 device definition for HWID 0x00E3Mirko Vogt1-0/+1
This hardware id is e.g. used by the Insight SiP ISP1507-AX. Change-Id: I82568d292f9882372ab061d8e3e36906b0cc5882 Signed-off-by: Mirko Vogt <mirko.vogt@sensorberg.com> Reviewed-on: http://openocd.zylin.com/4845 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2019-01-16at91samd: added SAM-DA1 partsSeverin Junker1-0/+22
Change-Id: I1b206461052ee1897432e379505fdf95372a9e24 Signed-off-by: Severin Junker <s.junker@cartelsol.com> Reviewed-on: http://openocd.zylin.com/4835 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-11Add flash support for SiFive's Freedom E platformsTim Newsome3-0/+1056
Valgrind and Clang Static Analyzer have no complaints about this change. Change-Id: I7757615ec52448372bdc57729cdf97c7016d97e8 Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4656 Tested-by: jenkins Reviewed-by: Philipp Guehring <pg@futureware.at> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02NOR: lpc2000 Add support for LPC84x devicesRod Boyce1-0/+31
These devices differ from LPC8xx devices in that they have a different IAP entry point, but everything else is the same. Using Tcl to pass different IAP entry point. no new Clang analyser warnings and no new build sanitizers issues. Change-Id: I2d654dd250f416e74262c0228cad8713a283402f Signed-off-by: Rod Boyce <developer@teamboyce.co.uk> Reviewed-on: http://openocd.zylin.com/4684 Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02flash: nor: ath79: remove base calculationOleksij Rempel1-14/+0
Currently it is impossible to flash ELF with correct offsets. The reason is a bogus offset calculation extracted from base. Since any other spi drivers do not care about base, do the same for ath79 as well. Change-Id: I9e46e01c9e7a709c2d07da9203c634f302603afd Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4821 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02flash/nor/nrf5: set correct timeout for nvmc operationsJānis Skujenieks1-1/+1
Longest erase all FLASH for nRF5 series is 295.3 ms for nRF52832. Timeout period now is set to 340 ms (295.3 + 15%) Change-Id: Iae00ed7b634f111b9798db11e35e4e066d4aaa95 Signed-off-by: Jānis Skujenieks <janis.skujenieks@gmail.com> Reviewed-on: http://openocd.zylin.com/4822 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-23Add LPC8Nxx and NHS3xx support.Jean-Christian de Rivaz1-1/+25
Change-Id: I0bdbca8dd9b234aca355230af7269463c9f70bd1 Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Reviewed-on: http://openocd.zylin.com/4515 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-21add w600 supportSimon Qian3-0/+393
w600 is a wifi soc from winner micro(www.winnermicro.com). Change-Id: Ib8ccd6e52baefca6547fb97d29db75db0ee73948 Signed-off-by: Simon Qian <versaloon@simonqian.com> Reviewed-on: http://openocd.zylin.com/4801 Tested-by: jenkins Reviewed-by: yichen <wdyichen@wdyichen.cn> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-19flash/nor/spi: add adesto AT25DF081ATomas Vanek1-0/+1
8Mbit SPI flash on SAM D21 Xplained board Change-Id: Iec087f5d889c1cbdd4fed90863e73511f6101cec Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4802 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-12flash/nor/core: Fix chunk size calculation in default_flash_mem_blank_checkBohdan Tymkiv1-2/+2
Slow version of blank check procedure reads target memory sector-by-sector using 1 KB chunks. Due to bug in chunk size calculation algorithm the actual size of the chunk is always 1 KB even if sector size is smaller. This causes out-of-boundary read of the last sector. Steps to reproduce: 1) Use target with small sectors (e.g. psoc6 with 512-byte sectors) 2) set WORKAREASIZE_CM0 0 3) flash erase_check 1 Running slow fallback erase check - add working memory Info : SWD DPIDR 0x6ba02477 Error: Failed to read memory at 0x14008000 unknown error when checking erase state of flash bank #1 at 0x14000000 Bank is erased Change-Id: I03d0d5fb3a1950ae6aac425f5e24c7fd94b38325 Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com> Reviewed-on: http://openocd.zylin.com/4785 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-12flash/esirisc: refactor register write protectionSteven Stallion1-53/+12
This patch removes use of register write protection in protect() and protect_check() now that Change 4765 has merged. Change-Id: I42c429dc283c5b53989a6b98ebfc58214274ff16 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4791 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-12esirisc: support eSi-TraceSteven Stallion1-11/+18
This patch adds support for instruction tracing to eSi-RISC targets. The command interface is borrowed heavily from ETM; eSi-Trace uses a less sophisticated model for tracing, however the setup and usage is similar. This patch also cleans up the command interfaces of the other esirisc command groups and adds additional debugging information to log messages when dealing with CSRs. This patch "finalizes" support for 32-bit eSi-RISC targets. Change-Id: Ia2a9de79a3c7c066240b5212721fb1b7584a9a45 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4780 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11flash/nor: Add support for sector erase in stm32l4x.c for L4+ familybob1-27/+78
Updates support for L4+ device id: 0x470 added by #4310 Extends #4641 to account for L4+ use of multiple DBANK option bits Enables L4+ 1M and 2M devices to be programmed using sector erase Change-Id: I42bb379d7d97986f4506423e3da503d07c787c6b Signed-off-by: bob <rea952@gmail.com> Reviewed-on: http://openocd.zylin.com/4777 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11flash/nor: update cc3220sf for issue found in code reviewEdward Fewell1-16/+3
Remove inappropriate use of bank_number. Change-Id: I11be1f2540cb09a3ccede35312f90bc8276af338 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4788 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11flash/nor: update CC26xx/CC13xx supportEdward Fewell1-5/+0
Added fixes found in additional code reviews. Remove inappropriate use of bank_number field and updated documentation to reflect the change. Restored functionality to cc2538.cfg file because previous change removed the cc26xx.cfg file because the flash support changes made it obsolete. Rolled the previous cc26xx.cfg file into cc2538.cfg and updated it to work with other recent changes. Tested using a SmartRF06 Evaluation board with embedded XDS100v3 and external XDs110. Change-Id: Ia19d00cf8055c5c0f1acc53aa23fd06a80fd2ebc Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4787 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-06flash/stmsmi: fix byte order for big-endian hostAntonio Borneo1-11/+8
The original code was written for and tested on little-endian host only. Rewrite it to be independent by host endianess. Not tested on real HW; I don't own anymore a SPEAr device. Change-Id: I2f427a804693f56cb9dea4936c525eb814c48c28 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reported-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4778 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-05flash/nor: use default_flash_blank_check() instead of dummyTomas Vanek3-41/+3
Some flash drivers had a dummy method for erase_check. Use default_flash_blank_check() instead if possible. Change-Id: Iddfeff45ce477007328d061fcb5c553d93c3be98 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4766 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com>
2018-11-29SPI table updates (some new devices and new info)Andreas Bolsch7-96/+277
read_cmd, qread_cmd, pprog_cmd added as some recent high densities devices use variants for 4-byte addressing. Some new flash and FRAM device ids added. FRAMs don't have write pages nor erase commands or sector sizes. The corresponding entries are marked as "not used" (i. e. zero). Checks in existing SPI flash drivers added to handle these cases gracefully. Change-Id: I5104bce7c815ac22f98bc32c1bb6db66b984404a Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-on: http://openocd.zylin.com/4773 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-26flash/nor: consolidate flash protect/protect_checkTomas Vanek21-213/+31
Make flash_driver methods protect() and protect_check() optional. Remove dummy definitions of these methods from the drivers which do not implement protection handling. Some drivers did not define protect method. It raised segfault before this change and now it is handled properly. Lot of drivers returned ERROR_OK from dummy protect() - now flash_driver_protect() returns an error if not handled by the driver. Change-Id: I2d4a0da316bf03c6379791b1b1c6198fbf22e66c Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4765 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
2018-11-26stm32l4x: Fix stm32l4x dual bank supportAlex J Lennon1-7/+7
The dual bank option was being incorrectly read and the bank b base incorrectly set. This is tested with 512kB dual bank configuration but needs checking with other configurations (e.g. 256kb). This fix should remove the need to use a mass_erase command prior to programming with OpenOCD Change-Id: I6e920f11b794c4c1fd34c0e44fb8fa01e7fe8f85 Signed-off-by: Alex J Lennon <alex.lennon@s19.tech> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4641 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Thomas Søhus <soehus@gmail.com>
2018-11-19From upstream (#331)Tim Newsome10-420/+2119
* flash/nor: Add support for TI CC26xx/CC13xx flash Added cc26xx flash driver to support the TI CC26xx and CC13xx microcontrollers. Driver is capable of determining which MCU is connected and configures itself accordingly. Added config files for four specific variants: CC26x0, CC13x0, CC26x2, and CC13x2. Note that the flash loader code is based on the sources used to support flash in Code Composer Studio and Uniflash from TI. Removed cc26xx.cfg file made obsolete by this patch. Change-Id: Ie2b0f74f8af7517a9184704b839677d1c9787862 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4358 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com> * flash/nor/nrf5: remove is_erased setting and autoerase before write Cached flash erase state in sectors[].is_erased is not reliable as running target can change the flash. Autoerase was issued before flash write on condition is_erased != 1 Remove autoerase completely as it is a quite non-standard feature. Change-Id: I19bef459e6afdc4c5fcaa2ccd194cf05be8a42b6 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4400 Tested-by: jenkins * src/flash/tms470: remove testing of sectors[].is_erased state The erase check routine checked sectors only if is_erased != 1 Check sector unconditionally. While on it fix clang static analyzer warnings. Change-Id: I9988615fd8530c55a9b0c54b1900f89b550345e9 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4401 Tested-by: jenkins * tcl/target/stm32f7x: configure faster system clock in reset-init STM32F7xx devices need faster clock for flash programming over JTAG transport. Using reset default 16 MHz clock resulted in lot of DAP WAITs and substantial decrease of flashing performance. Adapted to the restructured dap support (see 2231da8ec4e7d7ae9b652f3dd1a7104f5a110f3f). Change-Id: Ida6915331dd924c9c0d08822fd94c04ad408cdc5 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4464 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> * flash/nor/psoc5lp: fix compile issue on GCC 8.1.0 Issue already identified by Alex https://sourceforge.net/u/alexbour/ in ticket #191 https://sourceforge.net/p/openocd/tickets/191/ src/flash/nor/psoc5lp.c:237:2: error: ‘strncpy’ output truncated before terminating nul copying 2 bytes from a string of the same length [-Werror=stringop-truncation] Fix it by assigning the value to the array elements. Change-Id: I22468e5700efa64ea48ae8cdec930c48b4a7d8fb Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4563 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/arm: Add PLD command to ARM disassembler. Updates the ARM disassembler to handle PLD (PreLoad Data) commands. Previously handled by printing a TODO message. There are three forms of the command: literal, register, and immediate. Simply decode based off of the A1 encoding for the instructions in the ARM ARM. Also fixes mask to handle PLDW commands. Change-Id: I63bf97f16af254e838462c7cfac80f6c4681c556 Signed-off-by: James Marshall <jcmarsh@gwmail.gwu.edu> Reviewed-on: http://openocd.zylin.com/4348 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> * mips_m4k.c: Fix build with --disable-target64 Replace PRIx64 with TARGET_PRIxADDR to avoid build problems when --disable-target64 is used during configure. Change-Id: I054a27a491e86c42c9386a0488194320b808ba96 Signed-off-by: Liviu Ionescu <ilg@livius.net> Reviewed-on: http://openocd.zylin.com/4566 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Tim Newsome <tim@sifive.com> * target/arm_adi_v5: sync CSW and TAR cache on apreg write When using apreg to change AP registers CSW or TAR we get internal cached value not valid anymore. Reuse the setup functions for CSW and TAR to write them. Invalidate the cached value before the call to force the write, thus keeping original apreg behaviour. Change-Id: Ib14fafd5e584345de94f2e983de55406c588ac1c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4565 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/arm_adi_v5: keep CSW and TAR cache updated The call to dap_queue_ap_write() can fail and the value in CSW and TAR becomes unknown. Invalidate the OpenOCD cache if dap_queue_ap_write() fails. Change-Id: Id6ec370b4c5ad07e454464780c1a1c8ae34ac870 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4564 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * tcl/target: Add Renesas R-Car R8A7794 E2 target Add configuration for the Renesas R-Car R8A7794 E2 target. This is an SoC with two Cortex A7 ARMv7a cores, both A7 cores are supported. Change-Id: Ic1c81840e3bfcef8ee1de5acedffae5c83612a5e Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/4531 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * tcl/board: Add Renesas R-Car R8A7790 H2 Stout board Add configuration for the Renesas R-Car R8A7790 H2 based Stout ADAS board. Change-Id: Ib880b5d2e1fab5c8c0bc0dbcedcdce8055463fe2 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/4497 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * tcl/board: Add Renesas R-Car R8A7791 M2W Porter board Add configuration for the Renesas R-Car R8A7791 M2W based Porter evaluation board. Change-Id: Iaadb18f29748f890ebb68519ea9ddbd18e7649af Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/4498 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * tcl/board: Add Renesas R-Car R8A7794 E2 Silk board Add configuration for the Renesas R-Car R8A7794 E2 based Silk evaluation board. Change-Id: I504b5630b1a2791ed6967c6c2af8851ceef9723f Signed-off-by: Marek Vasut <marek.vasut@gmail.com> --- NOTE: This requires SW7[1] in position 1 (default is 0) Reviewed-on: http://openocd.zylin.com/4532 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * tcl/board: Factor out common R-Car Gen2 code Factor out the code shared by all R-Car Gen2 boards into a single file to get rid of the duplication. Change-Id: I70b302c2e71f4e6fdccb2817dd65a5493bb393d8 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/4533 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * jtag/drivers/cmsis-dap: fix connect in cmsis_dap_swd_switch_seq() The proc cmsis_dap_swd_switch_seq() is part of the SWD API for this interface driver. It is valid only when the interface is used in SWD mode. In this proc there is the need to call, in sequence, first cmsis_dap_cmd_DAP_Disconnect() then cmsis_dap_cmd_DAP_Connect(). The latter call requires the connection mode as parameter, that inside cmsis_dap_swd_switch_seq() can only be CONNECT_SWD. The current implementation is not correct and in some cases can pass mode CONNECT_JTAG. Moreover, JTAG is optional in CMSIS-DAP and passing mode CONNECT_JTAG triggers an error with SWD-only interfaces. Use mode CONNECT_SWD in SWD specific cmsis_dap_swd_switch_seq(). Change-Id: Ib455bf5b69cb2a2d146a6c8875387b00c27a5690 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4571 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/cortex_m: return error if breakpoint address is out of range If the "Flash Patch and Breakpoint" unit is rev.1 then it can only accept breakpoint addresses below 0x1FFFFFFF. Detailed info in "ARM v7-M Architecture Reference Manual", DDI0403E at chapter "C1.11 Flash Patch and Breakpoint unit". Print a message and return error if the address of hardware breakpoint cannot be handled by the breakpoint unit. Change-Id: I95c92b1f058f0dfc568bf03015f99e439b27c59b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4535 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Christopher Head <chead@zaber.com> * flash/nor/stm32: Report errors in wait_status_busy Flash operation errors that occur during algorithm programming are reported via the algorithm return value. However, Flash operation errors that occur during non-algorithm work (erasing, programming without a work area, programming the last non-multiple-of-32-bytes on an H7, etc.) generally end with a call to stm32x_wait_status_busy, which reads the status register and clears the error flags but fails to actually report that something went wrong should an error flag (other than WRPERR) be set. Return an error status from stm32x_wait_status_busy in those cases. Correct a log message accordingly. Change-Id: I09369ea5f924fe58833aec1f45e52320ab4aaf43 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4519 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * flash/nor/stm32: Eliminate working area leak On a specific early-return path, an allocated working area was not freed. Free it. Change-Id: I7c8fe51ff475f191624086996be1c77251780b77 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4520 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * flash/nor/stm32h7: Fix incorrect comment The name of the bit according to the reference manual is inconsistency error, not increment error. Change-Id: Ie3b73c0312db586e35519e03fd1a5cb225673d97 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4521 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> * target: fix 'bp' command help message "asid" and "length" are separate arguments of the command. Put space between them. Change-Id: I36cfc1e3a01caafef4fc3b26972a0cc192b0b963 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4511 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * Add ARM v8 AArch64 semihosting support This patch implements semihosting support for AArch64. This picks code from previously submitted AArch64 semihosting support patch and rebases on top of reworked semihosting code. Tested in AArch64 mode on a Lemaker Hikey Board with NewLib and GDB. Change-Id: I228a38f1de24f79e49ba99d8514d822a28c2950b Signed-off-by: Omair Javaid <omair.javaid@linaro.org> Reviewed-on: http://openocd.zylin.com/4537 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * GDB fileIO stdout support This patch fixes gdb fileio support to allow gdb console to be used as stdout. Now we can do something like gdb <inferior file> (gdb) tar ext :3333 (gdb) load (gdb) monitor arm semihosting enable (gdb) monitor arm semihosting_fileio enable (gdb) continue Here: Output from inferior using puts, printf etc will be routed to gdb console. Change-Id: I9cb0dddda1de58038c84f5b035c38229828cd744 Signed-off-by: Omair Javaid <omair.javaid@linaro.org> Reviewed-on: http://openocd.zylin.com/4538 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * target: armv8: Avoid semihosting segfault on halt Avoid a NULL pointer dereference when halting an aarch64 core. Change-Id: I333d40475ab26e2f0dca5c27302a5fa4d817a12f Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/4593 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * tcl: target: Add NXP LS1012A config As seen on the FRDM-LS1012A board. Change-Id: Ifc9074b3f7535167b9ded5f544501ec2879f5db7 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/4594 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * tcl: board: Add NXP Freedom FRDM-LS1012A config An update for the K20 CMSIS-DAP firmware can be found here: https://community.nxp.com/thread/387080?commentID=840141#comment-840141 Change-Id: I149d7f8610aa56daf1aeb95f14ee1bf88f7cb647 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/4595 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * gdb_server: only trigger once the event gdb-detach at gdb quit When GDB quits (e.g. with "quit" command) we first execute gdb_detach() to reply "OK" then, at GDB disconnect (either TCP or pipe connection type), we execute gdb_connection_closed(). In case GDB is killed or it crashes, OpenOCD only executes the latter when detects the disconnection. Both gdb_detach() and gdb_connection_closed() trigger the event TARGET_EVENT_GDB_DETACH thus getting it triggered twice on clean GDB quit. Do not trigger the event TARGET_EVENT_GDB_DETACH in gdb_detach() and let only gdb_connection_closed() to handle it. Change-Id: Iacf035c855b8b3e2239c1c0e259c279688b418ee Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4585 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * gdb_server: set current_target from connection's one In a multi-target environment we are supposed to have a single gdb server for each target (or for each group of targets within a SMP node). By default, the gdb attached to a server sends its command to the target (or to the SMP node targets) linked to that server. This is working fine for the normal gdb commands, but it is broken for the native OpenOCD commands executed through gdb "monitor" command. In the latter case, gdb "monitor" commands will be executed on the current target of OpenOCD configuration script (that is either the last target created or the target specified in a "targets" command). Fixed in gdb_new_connection() by replacing the current target in the connection's copy of command context. Change-Id: If7c8f2dce4a3138f0907d3000dd0b15e670cfa80 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4586 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Christopher Head <chead@zaber.com> * target/image: make i/j unsigned to avoid ubsan runtime error src/target/image.c:1055:15: runtime error: left shift of 128 by 24 places cannot be represented in type 'int' Change-Id: I322fd391cf3f242beffc8a274824763c8c5e69a4 Signed-off-by: Cody Schafer <openocd@codyps.com> Reviewed-on: http://openocd.zylin.com/4584 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Christopher Head <chead@zaber.com> * target/stm32f7x: Clear stuck HSE clock with CSS Change-Id: Ica0025ea465910dd664ab546b66f4f25b271f1f5 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4570 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> * psoc5lp: fix erase check, add free_driver_priv psoc5lp_erase_check() was not properly adapted to the new armv7m_blank_check_memory() in the hot fix 53376dbbede4f0bf42e724ff This change fixes handling of num_sectors in dependecy of ecc_enabled. Also add comments how ecc_enabled influences num_sectors. Add pointer to default_flash_free_driver_priv() to all psoc5lp flash drivers to keep valgrind happy. Change-Id: Ie1806538becd364fe0efb7a414f0fe6a84b2055b Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4569 Tested-by: jenkins * target: atmel samd10 xplained mini cortex m0+ on a tiny board, with an mEDBG (CMSIS-DAP) debug interface. Change-Id: Iaedfab578b4eb4aa2d923bd80f220f59b34e6ef9 Signed-off-by: Karl Palsson <karlp@tweak.net.au> Reviewed-on: http://openocd.zylin.com/3402 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * tcl/board: add SAMD11 Xplained Pro evaluation board Change-Id: Id996c4de6dc9f25f71424017bf07689fea7bd3af Signed-off-by: Peter Lawrence <majbthrd@gmail.com> Reviewed-on: http://openocd.zylin.com/4507 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * Adds SAMD11D14AU flash support. Corrects names of SAMD11D14AM and SAMD11D14ASS per datasheet. Change-Id: I8beb15d5376966a4f8d7de76bfb2cbda2db440dc Signed-off-by: Christopher Hoover <ch@murgatroid.com> Reviewed-on: http://openocd.zylin.com/4597 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * nds32: Avoid detected JTAG clock AICE2 doesn't support scan for the maximum clock frequency of JTAG chain. It will cause USB command timeout. Change-Id: I41d1e3be387b6ed5a4dd0be663385a5f053fbcf9 Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com> Reviewed-on: http://openocd.zylin.com/4292 Tested-by: jenkins Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * flash/nor/tcl: Distinguish between sectors and blocks in status messages Use the right word in flash protect command status messages based on whether the target bank defines num_prot_blocks. Minor message style tidy-up. Change-Id: I5f40fb5627422536ce737f242fbf80feafe7a1fc Signed-off-by: Dominik Peklo <dom.peklo@gmail.com> Reviewed-on: http://openocd.zylin.com/4573 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Christopher Head <chead@zaber.com> * drivers: cmsis-dap: pull up common connect code Just a minor deduplication Change-Id: Idd256883e5f6d4bd4dcc18462dd5468991f507b3 Signed-off-by: Karl Palsson <karlp@tweak.net.au> Reviewed-on: http://openocd.zylin.com/3403 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * drivers: cmsis-dap: Print version info when available No need to wait until after connecting, might help diagnose part information by printing earlier. Change-Id: I51eb0d584be306baa811fbeb1ad6a604773e602c Signed-off-by: Karl Palsson <karlp@tweak.net.au> Reviewed-on: http://openocd.zylin.com/3404 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * flash/nor: add support for TI MSP432 devices Added msp432 flash driver to support the TI MSP432P4x and MSP432E4x microcontrollers. Implemented the flash algo helper as used in the TI debug and flash tools. This implemention supports the MSP432E4, Falcon, and Falcon 2M variants. The flash driver automatically detects the connected variant and configures itself appropriately. Added command to mass erase device for consistency with TI tools and added command to unlock the protected BSL region. Tested using MSP432E401Y, MSP432P401R, and MSP432P4111 LaunchPads. Tested with embedded XDS110 debug probe in CMSIS-DAP mode and with external SEGGER J-Link probe. Removed ti_msp432p4xx.cfg file made obsolete by this patch. Change-Id: I3b29d39ccc492524ef2c4a1733f7f9942c2684c0 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4153 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * flash/nor/at91sam4: fix sam4sa16c flash banks and its gpnvms count There was already a github fork that had this fixed, but as we try to use the latest, non-modified version of all software we use, I would like to have this fix in the next releases of OpenOCD so that if people uses $packagemanager, they will not have issues flashing the last part of the flash of sam4sa16c chips. Additionally, I've added some more logging related to the flash bank that was used, and the chip ID that was detected. Change-Id: I7ea5970105906e4560b727e46222ae9a91e41559 Signed-off-by: Erwin Oegema <blablaechthema@hotmail.com> Reviewed-on: http://openocd.zylin.com/4599 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins * flash/nor/stm32lx: Add revision 'V' for STM32L1xx Cat.3 devices Change-Id: Ic92b0fb5b738af3bec79ae335876aa9e26f5f4cd Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/4600 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> * Avoid null target->semihosting references. The new common semihosting code introduced a bug, in certain conditions target->semihosting was used without semihosting being initialised. The solution was to explicitly test for target->semihosting before dereferencing it. Change-Id: I4c83e596140c68fe4ab32e586e51f7e981a40798 Signed-off-by: Liviu Ionescu <ilg@livius.net> Reviewed-on: http://openocd.zylin.com/4603 Tested-by: jenkins Reviewed-by: Jonathan Larmour <jifl@eCosCentric.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * nrf5: Add HWID 0x139 (52832 rev E0) Change-Id: I71b7471ccfcb8fcc6de30da57ce4165c7fb1f73f Signed-off-by: James Jacobsson <slowcoder@gmail.com> Reviewed-on: http://openocd.zylin.com/4604 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target: Fix segfault for 'mem2array' Call 'mem2array' without arguments to reproduce the segmentation fault. Change-Id: I02bf46cc8bd317abbb721a8c75d7cbfac99eb34e Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/4534 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com> * target/armv7m_trace: Fix typo in enum Change-Id: I6364ee5011ef2d55c59674e3b97504a285de0cb2 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3904 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * target/armv7m_trace: Use prefix for enums Change-Id: I3f199e6053146a1094d96b98ea174b41bb021599 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3905 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * target/aarch64: Call aarch64_init_debug_access() earlier in aarch64_deassert_reset() On Renesas R-Car, calling 'reset halt' and 'reset init' always made DAP inaccessible. Calling 'reset' and 'halt' seperatly worked fine. The only differences seems to be the point in time when aarch64_init_debug_access() is called. This patch aligns the behaviour. Change-Id: I2296c65e48414a7d9846f12a395e5eca315b49ca Signed-off-by: Dennis Ostermann <dennis.ostermann@renesas.com> Reviewed-on: http://openocd.zylin.com/4607 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * server: Improve signal handling under Linux Commit 5087a955 added custom signal handlers for the openocd server process. Before this commit, when openocd is run as a background process having the same controlling terminal as gdb, Control-C would be handled by gdb to stop target execution and return to the gdb prompt. However, after commit 5087a955, the SIGINT caused by pressing Control-C also terminates openocd, effectively crashing the debugging session. The only way to avoid this is run openocd in a different controling terminal or to detach openocd from its controlling terminal, thus losing all job control for the openocd process. This patch improves the server's handling of POSIX signals: 1) Keyboard generated signals (INT and QUIT) are ignored when server process has is no controlling terminal. 2) SIGHUP and SIGPIPE are handled to ensure that .quit functions for each interface are called if user's logs out of X session or there is a network failure. SIG_INT & SIG_QUIT still stop openocd when it is running in the foreground. Change-Id: I03ad645e62408fdaf4edc49a3550b89b287eda10 Signed-off-by: Brent Roman <genosensor@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3963 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> * armv7a: read ttbcr and ttb0/1 at every entry in debug state Commit bfc5c764df145f68835543119865eabe462e19c2 avoids reading ttbcr and ttb0/1 at every virt2phys translation by caching them, and it updates the cached values in armv7a_arch_state(). But the purpose of any (*arch_state)() method, thus including armv7a_arch_state(), is to only print out and inform the user about some architecture specific status. Moreover, to reduce the verbosity during a GDB session, the method (*arch_state)() is not executed anymore at debug state entry (check use of target->verbose_halt_msg in src/openocd.c), thus the state of translation table gets out-of-sync triggering Error: Address translation failure or even using a wrong address in the memory R/W operation. In addition, the commit above breaks the case of armv7r by calling armv7a_read_ttbcr() unconditionally. Fixed by moving in cortex_a_post_debug_entry() the call to armv7a_read_ttbcr() on armv7a case only. Remove the call to armv7a_read_ttbcr() in armv7a_identify_cache() since it is (conditionally) called only in the same procedure cortex_a_post_debug_entry(). Fixes: bfc5c764df14 ("armv7a: cache ttbcr and ttb0/1 on debug state entry") Change-Id: Ifc20eca190111832e339a01b7f85d28c1547c8ba Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4601 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * Avoid dereferencing NULL pointer. If a NULL pointer is passed, don't attempt to increment it. This avoids passing the now not-NULL pointer on and eventually segfaulting. Also remove some unnecessary temporary variables. Change-Id: I268e225121aa283d59179bfae407ebf6959d3a4e Signed-off-by: Darius Rad <darius@bluespec.com> Reviewed-on: http://openocd.zylin.com/4550 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> * Remove FSF mailing address. Checkpatch complains about this (FSF_MAILING_ADDRESS). Change-Id: Ib46a7704f9aed4ed16ce7733d43c58254a094149 Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4559 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> * drivers: cmsis_dap_usb: implement cmd JTAG_TMS Simply add a wrapper around cmsis_dap_cmd_DAP_SWJ_Sequence() Change-Id: Icf86f84b24e9fec56e2f9e155396aac34b0e06d2 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4517 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> * arm_adi_v5: put SWJ-DP back to JTAG mode at exit When SWD mode is used, current OpenOCD code left the SWJ-DP in SWD mode at exit. Also, current code is unable to switch back the SWJ-DP in JTAG at next run, thus a power cycle of both target and interface is required in order to run OpenOCD in JTAG mode again. Put the SWJ-DP back to JTAG mode before exit from OpenOCD. Use switch_seq(SWD_TO_JTAG) instead of dap_to_jtag(), because the latter is not implemented on some interfaces. This is aligned with the use of switch_seq(JTAG_TO_SWD) in swd_connect(). Change-Id: I55d3faebe60d6402037ec39dd9700dc5f17c53b0 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4493 Tested-by: jenkins Reviewed-by: Bohdan Tymkiv <bhdt@cypress.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * Add RISC-V support. This supports both 0.11 and 0.13 versions of the debug spec. Support for `-rtos riscv` will come in a separate commit since it was easy to separate out, and is likely to be more controversial. Flash support for the SiFive boards will also come in a later commit. Change-Id: I1d38fe669c2041b4e21a5c54a091594aac3e2190 Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4578 Tested-by: jenkins Reviewed-by: Liviu Ionescu <ilg@livius.net> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * usb_blaster: Don't unnecessarily go through DR-/IR-Pause There is no need to pass through DR-/IR-Pause after a scan if we want to go to DR-/IR-Update. We just have to skip the first step of the path to the end state because we already did that step when shifting the last bit. v2: - Fix comments as remarked in review of v1 Change-Id: I3c10f02794b2233f63d2150934e2768430873caa Signed-off-by: Daniel Glöckner <daniel-gl@gmx.net> Reviewed-on: http://openocd.zylin.com/4245 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * cortex_a: fix virt2phys when mmu is disabled When the MMU is not enabled on debug state entry, virt2phys cannot perform a translation since it is unknown whether a valid MMU configuration existed before. In this case, return the virtual address as physical address. Change-Id: I6f85a7a5dbc200be1a4b5badf10a1a717f1c79c0 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4480 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * drivers: cmsis-dap: print serial if available Helpful for sanity checking connections Change-Id: Ife0d8b4e12d4c03685aac8115c9739a4c1e994fe Signed-off-by: Karl Palsson <karlp@tweak.net.au> Reviewed-on: http://openocd.zylin.com/3405 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/cortex_m: make a variable local The vec_ids variable is not referenced anywhere other than the vector catch command handler. Make it local to that function. Change-Id: Ie5865e8f78698c19a09f0b9d58269ced1c9db440 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4606 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/cortex_a: fix compile error for uninitialized variable Commit ad6c71e151590f9d07eb07eda978a8d2a845259c introduced the variable "mmu_enabled" whose pointer is passed to cortex_a_mmu() that initialises it. This initialization is not visible to the compiler that issue a compile error. The same situation is common across the same file and the usual workaround is to initialize it to zero; thus the same fix i applied here. Ticket: https://sourceforge.net/p/openocd/tickets/197/ Fixes: commit ad6c71e15159 ("cortex_a: fix virt2phys when mmu is disabled") Change-Id: I77dec41acdf4c715b45ae37b72e36719d96d9283 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4619 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * mips_m4k: add optional reset handler In some cases by using SRST we can't halt CPU early enough. And option PrRst is not available too. In this case the only way is to set BOOT flag over EJTAG and reset CPU or SoC from CPU itself. For example by writing to some reset register. This patch is providing possibility to use user defined reset-assert handler which will be enabled only in case SRST is disabled. It is needed to be able switch between two different reset variants on run time. Change-Id: I6ef98f1871ea657115877190f7cc7a5e8f3233e4 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4404 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * tcl/target: add config for Qualcomm QCA4531 The QCA4531 is a two stream (2x2) 802.11b/g/n single-band programmable Wi-Fi System-on-Chip (SoC) for the Internet of Things (IoT). https://www.qualcomm.com/products/qca4531 Change-Id: I58398c00943b005cfaf0ac1eaad92d1fa4e2cba7 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4405 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * tcl/board: add config for 8devices LIMA board More information about this board can be found here: https://www.8devices.com/products/lima Change-Id: Id35a35d3e986630d58d37b47828870afd107cc6a Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4406 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * tcl/target|board: move common AR9331 code to atheros_ar9331.cfg The ar9331_25mhz_pll_init and ar9331_ddr1_init routines can be used not only for TP-Link MR3020 board, so move them to the common atheros_ar9331.cfg file. Change-Id: I04090856b08151d6bb0f5ef9cc654efae1c81835 Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-on: http://openocd.zylin.com/2999 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * tcl/target/atheros_ar9331: add DDR2 helper this helper works on many different boards, so it is good to have it in target config Change-Id: I068deac36fdd73dbbcedffc87865cc5b9d992c1d Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4422 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * tcl/target/atheros_ar9331: add documentation and extra helpers Sync it with experience gathered on Qualcomm QCA4531 SoC. This chips are in many ways similar. Change-Id: I06b9c85e5985a09a9be3cb6cc0ce3b37695d2e54 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4423 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * tcl/board: add DPTechnics DPT-Board-v1 it is Atheros AR9331 based IoT dev board. Change-Id: I6fc3cdea1bef49c53045018ff5acfec4d5610ba6 Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4424 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * fpga/altera-10m50: add all device id add all currently know Intel (Alter) MAX 10 device ids Change-Id: I6a88fef222c8e206812499d41be863c3d89fa944 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4598 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * target|board: Add Intel (Altera) Arria 10 target and related board Target information about this SoC can be found here: https://www.altera.com/products/fpga/arria-series/arria-10/overview.html Achilles Instant-Development Kit Arria 10 SoC SoM: https://www.reflexces.com/products-solutions/development-kits/arria-10/achilles-instant-development-kit-arria-10-soc-som Change-Id: Id78c741be6a8b7d3a70f37d41088e47ee61b437a Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4583 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * target/riscv: fix compile error with gcc 8.1.1 Fix compile error: src/target/riscv/riscv-011.c: In function ‘slot_offset’: src/target/riscv/riscv-011.c:238:4: error: this statement may fall through [-Werror=implicit-fallthrough=] switch (slot) { ^~~~~~ src/target/riscv/riscv-011.c:243:3: note: here case 64: ^~~~ Fixes: a51ab8ddf63a ("Add RISC-V support.") Change-Id: I7fa86b305bd90cc590fd4359c3698632d44712e5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4618 Tested-by: jenkins Reviewed-by: Jiri Kastner <cz172638@gmail.com> Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Tim Newsome <tim@sifive.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com> * server: explicitly call "shutdown" when catch CTRL-C or a signal Every TCL command can be renamed (or deleted) and then replaced by a TCL proc that has the same name of the original TCL command. This can be used either to completely replace an existing command or to wrap the original command to extend its functionality. This applies also to the OpenOCD command "shutdown" and can be useful, for example, to set back some default value to the target before quitting OpenOCD. E.g. (TCL code): rename shutdown original_shutdown proc shutdown {} { puts "This is my implementation of shutdown" # my own stuff before exit OpenOCD original_shutdown } Unfortunately, sending a signal (or pressing CTRL-C) to terminate OpenOCD doesn't trigger calling the original "shutdown" command nor its (eventual) replacement. Detect if the main loop is terminated by an external signal and in such case execute explicitly the command "shutdown". Replace with enum the magic numbers assumed by "shutdown_openocd". Please notice that it's possible to write a custom "shutdown" TCL proc that does not call the original "shutdown" command. This is useful, for example, to prevent the user to quit OpenOCD by typing "shutdown" in the telnet session. Such case will not prevent OpenOCD to terminate when receiving a signal; OpenOCD will quit after executing the custom "shutdown" command. Change-Id: I86b8f9eab8dbd7a28dad58b8cafd97caa7a82f43 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4551 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * zy1000: fix compile error with gcc 8.1.1 The fall-through comment is not taken in consideration by gcc 8.1.1 because it is inside the braces of a C-code block. Move the comment outside the C block. Change-Id: I22d87b2dee109fb8bcf2071ac55fdf7171ffcf4b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4614 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * flash/nor/tcl.c: fix flash bank bounds check in 'flash fill' command handler Steps to reproduce ( STM32F103 'Blue Pill', 128KiB of flash ): > flash fillh 0x0801FFFE 00 1 wrote 2 bytes to 0x0801fffe in 0.019088s (0.102 KiB/s) > flash fillw 0x0801FFFE 00 1 Error: stm32f1x.cpu -- clearing lockup after double fault Error: error waiting for target flash write algorithm Error: error writing to flash at address 0x08000000 at offset 0x0001fffe Change-Id: I145092ec5e45bc586b3df48bf37c38c9226915c1 Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com> Reviewed-on: http://openocd.zylin.com/4516 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/arm_adi_v5: add command "dpreg" For very low level debug or development around DAP, it is useful to have direct access to DP registers. Add command "dpreg" by mimic the syntax of the existing "apreg" command: $dap_name dpreg reg [value] Change-Id: Ic4ab451eb5e74453133adee61050b4c6f656ffa3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4612 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * nrf5: add free_driver_priv Change-Id: I429a9868deb0c4b51f47a4bbad844bdc348e8d21 Signed-off-by: Jim Paris <jim@jtan.com> Reviewed-on: http://openocd.zylin.com/4608 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * rtos: add support for NuttX This patch introduces RTOS support for NuttX. Currently, only ARM Cortex-M (both FPU and FPU-less) targets are supported. To use, add the following lines to ~/.gdbinit. define hookpost-file eval "monitor nuttx.pid_offset %d", &((struct tcb_s *)(0))->pid eval "monitor nuttx.xcpreg_offset %d", &((struct tcb_s *)(0))->xcp.regs eval "monitor nuttx.state_offset %d", &((struct tcb_s *)(0))->task_state eval "monitor nuttx.name_offset %d", &((struct tcb_s *)(0))->name eval "monitor nuttx.name_size %d", sizeof(((struct tcb_s *)(0))->name) end And please make sure the above values are the same as in src/rtos/nuttx_header.h Change-Id: I2aaf8644d24dfb84b500516a9685382d5d8fe48f Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com> Signed-off-by: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com> Signed-off-by: Nobuto Kobayashi <Nobuto.Kobayashi@sony.com> Reviewed-on: http://openocd.zylin.com/4103 Tested-by: jenkins Reviewed-by: Alan Carvalho de Assis <acassis@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * server/server: Add ability to remove services Add the ability to remove services while OpenOCD is running. Change-Id: I4067916fda6d03485463fa40901b40484d94e24e Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/4054 Tested-by: jenkins Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/cortex_m: fix incorrect comment The code sets C_MASKINTS if that bit is not already set (correctly). Fix the comment to agree. Change-Id: If4543e2660a9fa2cdabb2d2698427a6c8d9a274c Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4620 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * tcl/target/stm32f0x: Allow overriding the Flash bank size Copy & paste from another stm32 target. Change-Id: I0f6cbcec974ce70c23c1850526354106caee1172 Signed-off-by: Dominik Peklo <dom.peklo@gmail.com> Reviewed-on: http://openocd.zylin.com/4575 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * tcl/target: add Allwinner V3s SoC support Change-Id: I2459d2b137050985b7301047f9651951d72d9e9e Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4427 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * target/arm_adi_v5: allow commands apsel and apcsw during init phase The current implementation of apsel cannot be executed during the initialization phase because it queries the DAP AP to retrieve and print the content of IDR register, and the query is only possible later on during the exec phase. But IDR information is already printed by the dedicated command apid, making redundant printing it by apsel too. Being unable to run apsel during initialization, makes also apcsw command (that depends on apsel) not usable in such phase. Modify the command apsel to only set the current AP, without making any transfer to the (possibly not initialized yet) DAP. When run without parameters, just print the current AP number. Change mode to COMMAND_ANY to apsel and to apcsw. Change-Id: Ibea6d531e435d1d49d782de1ed8ee6846e91bfdf Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4624 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/cortex_a: allow command dacrfixup during init phase There is no reason to restrict the command "cortex_a dacrfixup" to the EXEC phase only. Change the command mode to ANY so the command can be used in the initialization phase too. Change-Id: I498cc6b2dbdc48b3b2dd5f0445519a51857b295f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4623 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * target/armv7a_cache: add gdb keep-alive and fix a missing dpm finish Depending on range size, the loop on cache operations can take quite some time, causing gdb to timeout. Add keep-alive to prevent gdb to timeout. Add also a missing dpm->finish() to balance dpm->prepare(). Change-Id: Ia87934b1ec19a0332bb50e3010b582381e5f3685 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4627 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * Add detail to `wrong register size` error. Signed-off-by: Tim Newsome <tim@sifive.com> Change-Id: Id31499c94b539969970251145e42c89c943fd87c Reviewed-on: http://openocd.zylin.com/4577 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * doc: fix typo in cortex_m maskisr command Change-Id: I37795c320ff7cbf6f2c7434e03b26dbaf6fc6db4 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4621 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/cortex_m: restore C_MASKINTS after reset The cortex_m maskisr user-facing setting is not changed across a target reset. However, the in-core C_MASKINTS bit was always cleared as part of reset processing, meaning that a cortex_m maskisr on setting would not be respected after a reset. Set C_MASKINTS based on the user-facing setting value rather than always clearing it after reset. Change-Id: I5aa5b9dfde04a0fb9c6816fa55b5ef1faf39f8de Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4605 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * tcl/board: update all uses of interface/stlink-v2-1 to interface/stlink Change-Id: I5e27e84d022f73101376e8b4a1bdc65f58fd348a Signed-off-by: Cody P Schafer <openocd@codyps.com> Reviewed-on: http://openocd.zylin.com/4456 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/riscv/riscv-011: fix compile warning about uninitialized variable In MSYS2 MinGW 64-bit git clone git://git.code.sf.net/p/openocd/code openocd $ gcc --version gcc.exe (Rev1, Built by MSYS2 project) 8.2.0 ./bootstrap ./configure --prefix= $ cat config.status | grep CFLAGS CFLAGS='-g -O2' make bindir = "bin-x64" depbase=`echo src/target/riscv/riscv-011.lo | sed 's|[^/]*$|.deps/&|;s|\.lo$||'`;\ /bin/sh ./libtool --tag=CC --mode=compile gcc -DHAVE_CONFIG_H -I. -D__USE_MINGW_ANSI_STDIO -I./src -I./src -I./src/helper -DPKGDATADIR=\"/mingw64/share/openocd\" -DBINDIR=\"bin-x64\" -I./jimtcl -I./jimtcl -Wall -Wstrict-prototypes -Wformat-security -Wshadow -Wextra -Wno-unused-parameter -Wbad-function-cast -Wcast-align -Wredundant-decls -Werror -g -O2 -MT src/target/riscv/riscv-011.lo -MD -MP -MF $depbase.Tpo -c -o src/target/riscv/riscv-011.lo src/target/riscv/riscv-011.c &&\ mv -f $depbase.Tpo $depbase.Plo libtool: compile: gcc -DHAVE_CONFIG_H -I. -D__USE_MINGW_ANSI_STDIO -I./src -I./src -I./src/helper -DPKGDATADIR=\"/mingw64/share/openocd\" -DBINDIR=\"bin-x64\" -I./jimtcl -I./jimtcl -Wall -Wstrict-prototypes -Wformat-security -Wshadow -Wextra -Wno-unused-parameter -Wbad-function-cast -Wcast-align -Wredundant-decls -Werror -g -O2 -MT src/target/riscv/riscv-011.lo -MD -MP -MF src/target/riscv/.deps/riscv-011.Tpo -c src/target/riscv/riscv-011.c -o src/target/riscv/riscv-011.o src/target/riscv/riscv-011.c: In function 'poll_target': src/target/riscv/riscv-011.c:1799:6: error: 'reg' may be used uninitialized in this function [-Werror=maybe-uninitialized] reg_cache_set(target, reg, ((data & 0xffffffff) << 32) | value); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ src/target/riscv/riscv-011.c:1686:17: note: 'reg' was declared here unsigned int reg; ^~~ cc1.exe: all warnings being treated as errors make[2]: *** [Makefile:3250: src/target/riscv/riscv-011.lo] Error 1 Change-Id: I6996dcb866fbace26817636f4bedba09510a087f Signed-off-by: Svetoslav Enchev <svetoslav.enchev@gmail.com> Reviewed-on: http://openocd.zylin.com/4635 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tim Newsome <tim@sifive.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * max32xxx: Support for MAX32XXX devices. Adding flash programming support for Maxim Integrated MAX32XXX devices. Change-Id: I5b0f57a885f9d813240e4bc2d9f765b743e1cfc3 Signed-off-by: Kevin Gillespie <kgills@gmail.com> Reviewed-on: http://openocd.zylin.com/3543 Tested-by: jenkins Reviewed-by: Ismail H. KOSE <ihkose@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> * flash/at91sam4: run probe just once Reread registers in sam4_GetInfo() Change-Id: I3b023b3e642a9c052b5c41673d196317f7e7f2e3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4609 Tested-by: jenkins Reviewed-by: Erwin Oegema <blablaechthema@hotmail.com> Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com> * flash/at91sam4: emit flash bank info Change related LOG_INFO to LOG_DEBUG Change-Id: I0c09b1ec83da631b26980dc8632b9031fe2921a3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4610 Tested-by: jenkins Reviewed-by: Erwin Oegema <blablaechthema@hotmail.com> Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com> * flash/at91sam4: set wait states only once per write Read-modify-write setting of FMR register requires an USB turnaround. Setting FMR before each page write is not necessary and decreases the write speed. Change-Id: I67844c898aaf117f155c762c979840b603c767ed Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4611 Tested-by: jenkins Reviewed-by: Svetoslav Enchev <svetoslav.enchev@gmail.com> * flash/at91sam4: fix clang static analyzer warning Change-Id: I5e5319d855c868adfa012f68086f7f809ec5a069 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4639 Tested-by: jenkins * rtos/linux.c: fix clang static analyzer warning Remove sizeof(int64_t) from string size computation. Change-Id: I029b394df5d62a2594a723c4c0e13608b3423b9b Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4640 Tested-by: jenkins * target: armv8: Ensure target is halted for virt2phys Othewise the error reported as Timeout waiting for dpm prepare Change-Id: Ieed2fdcd94ae4e877a749df3eec07a01dbf80b10 Closes: https://sourceforge.net/p/openocd/tickets/201/ Found-by: Matthias Welwarsky <matthias@welwarsky.de> Signed-off-by: Guido Günther <guido.gunther@puri.sm> Reviewed-on: http://openocd.zylin.com/4647 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * adi_v5: enforce check on AP number value The AP number value is restricted in 8 bits unsigned by ADI-v5 specification. Nevertheless, an "invalid" value is used by target cortex-m to force an automatic detection of the AP. Replace magic numbers by using new macros for AP max number and for the value of AP invalid. Check the value passed through -ap-num flag during configuration. Change-Id: Ic19a367db0ab11c0ebd070750eca0647d25279a5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4668 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * gdb_server: add per target option "-gdb-port" The argument passed to global config command "gdb_port" is usually, but not always, a TCP port number. In case of multiple targets, this numeric value is used as the first port of a set of consecutive TCP ports assigned one per target. If the argument is not a numeric value (e.g. "pipe", "disabled", ...) then incrementing it for the next target has no sense. Add the option "-gdb-port number" to the commands "target create" and "$target_name configure" to override, for the specific target, the general global configuration. This permits to use a per target "-gdb-port disabled", when no gdb port is required for that specific target. It also makes possible to choose a custom TCP port number for each target, overriding the usual sequence of consecutive port numbers. Change-Id: I3b9a1910b28ab4bc757e839d0e5d08ffc29f7ab4 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4530 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * libusb: return oocd error values keep same return style where possible Change-Id: I2f9b85dbc307a483609f76a84de77e3c74d346c7 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4588 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * rtos-helpers: fix minor typo in uC/OS-III helper This patch corrects a spelling error in uCOS-III-openocd.c. Change-Id: I6d1923ff1f5e6361358c45cec3dd6c08ca9ccef0 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4659 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> * flash/stm32f2x: add stm32f7 revision Z identification Signed-off-by: Cody P Schafer <openocd@codyps.com> Change-Id: Ia0169514d494bae2a98d92ebc97c8eccc10bc6c4 Reviewed-on: http://openocd.zylin.com/4657 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/mem_ap: generic mem-ap target This pseudo target allows attaching to any access point on the DAP at the MEM-AP level and read and write addresses on the connected bus. For example, one can create a mem_ap target on the APB-AP and read and write registers of debug components directly. This allows many diagnostic and other features be programmed entirely using TCL, without necessity of adding drivers to OpenOCD. Change-Id: I53229ffd68fb0f96fb68be15b0f3a76cc8843c8e Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4002 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Leonard Crestez <cdleonard@gmail.com> * interface: adapter configuration for FTDI C232HM This patch adds support for the C232HM-DDSL-0 and C232HM-EDSL-0 FT232H-based cables from FTDI. For more information, see: http://www.ftdichip.com/Products/Cables/USBMPSSE.htm Change-Id: Ic97423eb1e2f6b5ebae04943cd5cce86f38771d5 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4081 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * ftdi: extend ftdi_location format To existing <bus>:<port>,<port> format add <bus>-<port>.<port> support. The last format is used by kernel and other drivers. Change-Id: I6528970d3af4f6a8bf7b27a0f7a763b5957fdf2b Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4631 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * target/cortex_a: poll all targets in SMP node after halt The periodic poll scans all the targets in the same order they have been declared in the configuration file. When one target in a SMP node halts, the transition is detected in the following poll and this triggers a halt request to all the other cores of the SMP node. The targets that will be polled afterwards will be identified as "halted", but the targets already scanned will remain as "running" until the next periodic poll. This creates a race condition with GDB; GDB sets the breakpoints when runs the target and removes them as soon as the target is halted. When it receives the halt event, it starts removing the breakpoints and fails on the targets that are still reported as "running". Fixed by polling all the targets in the SMP node before informing GDB about the halt event. This implementation is almost copy/paste from the one in aarch64. Change-Id: Id2bd99f1e56b014e48e9e34ccb891b4219c518f8 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4622 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * tcl/board: Add Emcraft imx8 SOM BSB support Tested with Olimex ARM-USB-TINY-H adapter Simple commands work fine but there are currently issues when attaching remote gdb or running virt2phys: https://sourceforge.net/p/openocd/tickets/201/ Change-Id: I86ccf1d93c5d23870bb522f92b3e2af190d529e8 Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-on: http://openocd.zylin.com/4646 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * arm_adi_v5: remove useless cast to int The field ap_num in struct adiv5_private_config is already of type int. Casting it to type int has no sense. Change-Id: Ida642e808c02591bb58609425eccd096d404e2c4 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4666 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * flash/nrf5: time-based timeout waiting for flash controller Change-Id: Id214df154dc359ca130c8d8fe1554d106621b9cd Signed-off-by: Kai Geissdoerfer <kai.geissdoerfer@tu-dresden.de> Reviewed-on: http://openocd.zylin.com/4648 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * flash/nrf5: support for nRF52840 Q1AAC0 Change-Id: Id3280dadece84e1d68544936e44d506c7930a55d Signed-off-by: Kai Geissdoerfer <kai.geissdoerfer@tu-dresden.de> Reviewed-on: http://openocd.zylin.com/4649 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * doc: fix use of deprecated config file in the example Commit 31c58c139d85 ("jtag: drivers: stlink: handle all versions with single config") deprecates the use of "interface/stlink-v2-1.cfg" in favor of a unique config file "interface/stlink.cfg". Update the example in the documentation. Change-Id: I1aed7c70e15f4edb4f81a3ee8e3bce575fde873b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4667 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> * Added support for STM32L4X option bytes writing. Enables the programming of Write protection lock bits. - Updated/re-factored with option_read, option_write and option_load commands. Change-Id: I86358c7eb1285c3c0baac1564e46da8ced5fd025 Signed-off-by: Thomas Søhus <tls@ceepro.dk> Reviewed-on: http://openocd.zylin.com/4654 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * Clarify what exactly the RISC-V code supports. Change-Id: I8da657426cc52c738ab41bfb0164cbc6721c0aef Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: http://openocd.zylin.com/4655 Tested-by: jenkins Reviewed-by: Philipp Guehring <pg@futureware.at> Reviewed-by: Liviu Ionescu <ilg@livius.net> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/cortex_m: fix typo The subunit of the debug unit is called the Flash Patch and Breakpoint unit, abbreviated (by ARM no less) as FPB, not FBP. Change-Id: Ia2f08470da705f0f1518feeca878f0f500507308 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4675 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> * contrib/60-openocd.rules: provide hint to reload udev rules No need to reboot the Linux box when new rules are added to udev. Suggest the command in the script header. Change-Id: Ie95383bfd73914a3d2e2c05d77fa3eb32e68b7e2 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4665 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> * target/stm32: make APCSW cacheable Change-Id: I7c5c9720ded329848647f17db95f845e46c01c19 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4674 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/atsamv: make APCSW cacheable Change-Id: Ic00d3192642c682f370a6f7f8b70ae29744eb746 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4678 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * gdb_server: avoid gdb server for virtual targets Virtual targets, like mem_ap, do not or cannot implement the required functionality to accept a GDB connection. In the case of mem_ap, the method get_gdb_reg_list() is missing and a following connection from gdb causes OpenOCD to segfault. OpenOCD opens a GDB port for each target; it's always possible to connect, by mistake, GDB to one virtual target. Add a method to check if the target supports GDB connections (for the moment just checking if get_gdb_reg_list is implemented). Skip opening a gdb server for every targets that don't support GDB connections. Change-Id: Ia439a43efe1a9adbb1771cd9d252db8ffa32eb9d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4676 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * tcl/target: Add Renesas R-Car Gen3 targets Add configuration for the Renesas R-Car Generation 3 targets. These are SoCs with Cortex A57s, A53s, and R7s. All cores are supported. Change-Id: I795233210e4f647a1a2a0adea7c058ae98b5db70 Signed-off-by: Adam Bass <adam.bass@renesas.com> Reviewed-on: http://openocd.zylin.com/4669 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * tcl/board: Add Renesas R-Car Salvator-X(S) boards. Add configuration for the Renesas R-Car Salvator-X and Renesas R-Car Salvator-XS boards. Change-Id: I898008f56adb31908d30760f18217583fabf1c51 Signed-off-by: Adam Bass <adam.bass@renesas.com> Reviewed-on: http://openocd.zylin.com/4670 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * flash/nrf5: support for nRF52810 Change-Id: I01c430bfa593d20ea7a51c90d67052e374d239b3 Signed-off-by: Anders Westrup <anders@westrup.se> Reviewed-on: http://openocd.zylin.com/4680 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Slowcoder <slowcoder@gmail.com> * drivers: cmsis-dap: fix connection in JTAG mode Commit 5aceec24122bc222896cfcfd91f7f082f630ac83 ("drivers: cmsis-dap: pull up common connect code") breaks the driver and it cannot connect anymore in JTAG mode. The issue is caused in cmsis_dap_init() by anticipating the call to cmsis_dap_usb_open(), which then sets cmsis_dap_handle and makes the following test to always fail. Actually the original code was quite tricky: if (swd_mode) do something that also sets cmsis_dap_handle; if (cmsis_dap_handle == NULL) do something for !swd_mode; Convert the sequence of tricky "if"s in a single "if-then-else" to handle clearly the cases swd_mode and !swd_mode. Change-Id: I359a23bf26a3edc2461f4352daa0be83e78868f7 Fixes: 5aceec24122b ("drivers: cmsis-dap: pull up common connect code") Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4697 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins * register: support non-existent registers This patch fixes a number of bugs caused by incomplete support for non-existent registers. This is needed for targets that provide optional registers or non-linear register numbers. Change-Id: I216196e0051f28887a2c3da410959382369eed80 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4113 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * rtos: support gdb_get_register_packet This patch adds support for p packet responses by targets configured with RTOS support. This change required moving to a rtos_reg struct, which is similar to struct reg used by targets, which resulted in needing to update each stacking with register numbers. This patch also allows targets with non-linear register numbers to function with RTOSes as well. Change-Id: I5b189d74110d6b6f2fa851a67ab0762ae6b1832f Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4121 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * gdb_server: add support for architecture element This change adds optional support for a target to report architecture information in the target description to GDB. This is needed by some GDB implementations to properly support remote target with custom behavior. More information on the architecture element can be found here: https://sourceware.org/gdb/onlinedocs/gdb/Target-Description-Format.html#Target-Description-Format Change-Id: I57b19cae5ac3496256e4e5cc52cf6526ca5c322d Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4078 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * jtag: make cmd_queue_scan_field_clone public This patch makes the cmd_queue_scan_field_clone function public. This permits targets to insert fields without affecting the submitted scan_field list. This will be used in an upcoming target implementation that needs to insert additional padding bits. Change-Id: I8fbd3b9b4e413432471f4f1444048932c8fa189e Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4082 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * esirisc: support eSi-RISC targets eSi-RISC is a highly configurable microprocessor architecture for embedded systems provided by EnSilica. This patch adds support for 32-bit targets and also includes an internal flash driver and uC/OS-III RTOS support. This is a non-traditional target and required a number of additional changes to support non-linear register numbers and the 'p' packet in RTOS support for proper integration into EnSilica's GDB port. Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4660 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * rtos: check symbol list when updating uCOS-III This patch corrects a crash in uCOS-III on a new GDB connection when RTOS autodetection is not used. The crash was caused by not checking if the symbol list had been loaded prior to updating threads. Change-Id: I64c5133e02fe22fc8d14584cc40d87b49c935b0b Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4719 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * ftdi: demote unhelpful debug messages Some protocols make use of empty scan fields for optional padding, which causes the log to fill with unhelpful messages that a field is empty. The remaining LOG_DEBUG messages in ftdi_execute_scan have been demoted to DEBUG_JTAG_IO such that these messages are only seen when debugging JTAG. Change-Id: I61fd4551411ce851da34e67d003bca5d7a71cd92 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4112 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> * tcl: Add support for the Numato Lab Mimas A7 board The Mimas A7 FPGA board has FTDI FT2232 whose channel B is connected to Artix-7 FPGA's JTAG interface. Hence, OpenOCD can easily interface with it via the its ftdi driver interface. Tested to be working great up to 30 MHz. Change-Id: Ieda015fbc6135bf95ad5a069cbf38650da45911e Signed-off-by: Rohit Singh <rohit91.2008@gmail.com> Reviewed-on: http://openocd.zylin.com/4720 Tested-by: jenkins Reviewed-by: Tim "mithro" Ansell <me@mith.ro> Reviewed-by: Robert Jordens <jordens@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com> * target/arm_adi_v5: fix sync CSW cache on apreg write Commit 0057c71ab6b81d0679b232318fc5f84b4becc471 updates the OpenOCD cached values of CSW and TAR registers if these registers are modified by an apreg command. The condition to force the update of CSW cache is incorrect and it will erase the default CSW value. Moreover, calling mem_ap_setup_csw() does not honor the value requested in the apreg command because such value is incorrectly bitwise or-ed with csw_default. Fix it by updating csw_value, instead of erasing csw_default, and writing directly in CSW register the new value from the command line. Change-Id: I40273cb64d22ccfb9b6d3499bd39b586eb60de38 Fixes: 0057c71ab6b8 ("target/arm_adi_v5: sync CSW and TAR cache on apreg write") Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4679 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * tcl/board: Add Arty-S7 Spartan 7 FPGA Development Board Change-Id: I8bfe780cb67a1777d5112a68e8a9781bfe4f2038 Signed-off-by: William D. Jones <wjones@wdj-consulting.com> Reviewed-on: http://openocd.zylin.com/4525 Reviewed-by: Robert Jordens <jordens@gmail.com> Tested-by: jenkins Reviewed-by: Rohit Singh <rohit91.2008@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * xilinx-xc7: Add additional IDCODEs. Add/detect missing IDCODEs for the Spartan 7 family and Artix 25T and Artix 12T. Change-Id: Ib6c83c5592e90df1eb8e715e79b279da9a95f9c6 Signed-off-by: William D. Jones <wjones@wdj-consulting.com> Reviewed-on: http://openocd.zylin.com/4428 Reviewed-by: Robert Jördens Tested-by: jenkins Reviewed-by: Rohit Singh <rohit91.2008@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * target/cortex_a: fix temporary breakpoint during step Commit c8926d14579528bfcead1e179baf7cb846513db4 introduces the context and hybrid breakpoint types beside existing SW and HW types. The new field "asid" is non-zero only for these new types. The commit above did not properly initialize "asid" to 0 for a temporarily HW breakpoint used during single step. This causes cortex_a_unset_breakpoint() to identify this breakpoint as of type "hybrid". Identified through valgrind error: Conditional jump or move depends on uninitialised value(s) Actually valgrind triggers a total of 10 messages about use of uninitialized variables, but they are all caused by the first conditional jump bases on "asid != 0". Fixed by initializing "asid" to 0 in cortex_a_step(). Fixes: c8926d145795 ("cortex_a hybrid & context breakpoints") Change-Id: Ib674d8457d1e02e10332fd9d73554d13719ef93d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4613 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * zynq_7000: Add zynqpl_program command This allows for programming the PL part of the Xilinx Zynq 7000 Change-Id: I89e86c0f381951091f6948c46802d17d7f1f3500 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-on: http://openocd.zylin.com/4177 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * target/target.c: adding keep_alive() to while loop. Adding the call to keep_alive() to suppress warnings when running the async flash algorithm. Issue observed when loading large pieces of code on slower debuggers. Change-Id: I7660fa05f68ebd7be07b2ca0a55b0f3b6ae718f3 Signed-off-by: Kevin Gillespie <kgills@gmail.com> Reviewed-on: http://openocd.zylin.com/4686 Tested-by: jenkins Reviewed-by: Jesse Marroquin Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * drivers/cmsis-dap: speed up sending multiple HID requests The performance of CMSIS-DAP in long data transfers was improved substantially in ef02b69b14d133b061217a91add5a028a77e86bc. But it not as good as some other USB/MCU based adapters. Using HID and therefore interrupt endpoint is slower than USB bulk transfer. CMSIS-DAP adapter implements multiple HID buffer handling and OpenOCD already reads number of buffers from info command. This change adds capability to sumbit more than one HID requests before driver waits for a HID response. This scenario is used for long transfers only. Results show about double speed on USB FS and ~140% speed on USB HS: | w/o this change | with multi HIDrq -----------------------------------------+-----------------+----------------- Open source CMSIS-DAP, USB FS, adapter_khz 1000 dump_image ram32k.bin 0x1fffe000 0x8000 | 23.225 KiB/s | 45.901 KiB/s load_image ram32k.bin 0x1fffe000 | 23.324 KiB/s | 46.552 KiB/s Cypress' Kitprog in CMSIS-DAP mode, USB FS, adapter_khz 1000 (over firmware limit) dump_image ram64k.bin 0x20000000 0x10000 | 15.537 KiB/s | 42.558 KiB/s load_image ram64k.bin 0x20000000 | 15.605 KiB/s | 43.291 KiB/s Atmel's EDBG, USB HS, adapter_khz 10000 (#3945 applied) dump_image ram384k.bin 0x20400000 0x6000 | 248.402 KiB/s | 345.250 KiB/s load_image ram384k.bin 0x20400000 | 256.039 KiB/s | 365.945 KiB/s Change-Id: I9edbe018086176d357c6aaba5d6b657a5e5e1c64 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4080 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> * tcl: target: omit apcsw for hla When using stlink for CM7 targets we have to rely on its firmware to do the right thing as direct DAP access is not possible. Change-Id: Ieee69f4eeea5c911f89f060f31ce86ed043bdfd0 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/4732 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * flash/nor/at91samd: add SAMR21E19A DID While on it correct RAM amount of SAMR21x16A devices Change-Id: Ie9ab9de1551bdceff17af7597a9a2ee41f5aebe0 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4734 Reviewed-by: Eduardo Montoya Tested-by: jenkins * arm_adi_v5: do not deactivate power domains while trying to clear sticky error At OpenOCD start-up the operation of clearing the sticky error in CTRL/STAT register ignores the current value of the power domains bits CDBGPWRUPREQ and CSYSPWRUPREQ in the same register and incorrectly set them to zero. This abrupt disable does not follow the requirement in IHI0031 to wait for the acknowledgment of power disabled before continuing. The power domains are then re-enabled immediately after; it is possible that such short disable period has passed undetected or has been tested only on devices that do not implement the power domains. Anyway, this sequence is incorrect and can generate unexpected and hard-to-debug issues while OpenOCD attaches to a running target that implements power domains. Anticipate the initialization of dap->dp_ctrl_stat and use it while clearing the sticky bit. This has the additional effect of avoiding a power disable in the error recovery part of the function dap_dp_read_atomic(). Keep the same sequence of read/write in dap_dp_init() to avoid breaking the initialization of some problematic target. Add comments to document these choices. Change-Id: I8d6da788f2dd11909792b5d6b69bc90fbe4df25d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4677 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * flash/nor/stm32f1x: Use of protection blocks, improved option bytes handling Handle write protection status in blocks instead of sectors, removing unnecessary complexity in the process. Now closer to stm32f2x. Support sequential modification of option bytes by read/modify/write directly to option bytes area instead of always starting with the currently loaded bytes from FLASH_OBR/WRPR registers. Added new command 'options_load' to force re-load of option bytes w/o having to power cycle target. Change-Id: I5c76191e29c17a1e11482df06379d10ca8d6d04d Signed-off-by: Dominik Peklo <dom.peklo@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4576 Tested-by: jenkins Reviewed-by: Jan Vojtěch <honza.vojtech@gmail.com> * target/cortex_a: remove unused code controlled by "fast_reg_read" The variable fast_reg_read is always zero, causing some code to never be executed. Such code try to read the target registers by dumping them in memory and then reading back the memory through the debugger. But it is broken due to lack of cache and MMU management. This code also uses the broken memory_ap access that is going to be removed soon. Remove all the code that depends on fast_reg_read not zero. Add a missing check on arm_dpm_read_current_registers() return. Keep the unused function cortex_a_dap_write_coreregister_u32() to balance the used "read" version. Change-Id: If2ff28a8c49eb0a87dc85207f5431978efd158db Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4746 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * target/cortex_a: remove buggy memory AP accesses The armv7m debug port provides a direct access to the CPU memory bus, allowing the debugger to bypass the CPU for every memory operation. The armv7a debug port doesn't offer the same feature, mainly because CPU caches and MMU makes the direct memory access more tricky. Nevertheless most SoC with armv7a provide direct memory access through an AHB bus available on another DAP access port, different from the debug port. The original port of cortex_a in OpenOCD was inspired from the working cortex_m code, and provided optional memory access through the AHB, if present. The code for AHB access is problematic and partially buggy due to incomplete management of cache coherency and missing check of page boundary during virtual address operations. With the commit 5d458cf72734a4474f38bbed10eea4d9acfe93a2 ("target/mem_ap: generic mem-ap target") we have a clean support for memory access through system buses connected to DAP AP, which obsoletes the buggy memory AP hack in cortex_a. Remove any code that uses the memory AP accesses in cortex_a. Change-Id: I7cd1f94885e5817448058953e043d8da90dea3cc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4748 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * target/arm_dpm: uniform names of exported functions The name of the function dpm_modeswitch() does not follow the common style of the other function names in the same file. Rename it as arm_dpm_modeswitch(). Change-Id: Idebf3c7bbddcd9b3c7b44f8d0dea1e5f7549b0eb Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4756 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * target/cortex_a: remove duplicate code to read target registers The functions cortex_a_dap_{read,write}_coreregister_u32() are duplicate of the functions dpm_{read,write}_reg(). Remove both duplicated functions in cortex_a.c while export only dpm_read_reg(), since dpm_write_reg() is currently not used. Rename dpm_read_reg() as arm_dpm_read_reg() to keep uniform the naming style. Change-Id: I501bc99dc402039e630c47917a086a0bb382782c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4747 Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Tested-by: jenkins * armv7a: ARMv7-A MMU tools factor out mmu-related code from armv7a.c, add a 'dump' command for page tables. Change-Id: Ic1ac3c645d7fd097e9d625c7c8302e7065875dd4 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4327 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> * jtag/bitq: array boundary overflow The for loop inside bitq_path_move function is not correct, this will overflow the cmd->path array and produces an unpredictable result. Change-Id: I81e3bc9ee6d1dd948acd2fe4c667103ac22bb26f Signed-off-by: xuguangxiao <szgxxu@qq.com> Reviewed-on: http://openocd.zylin.com/4733 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * target/stm32h7x: Fix documentation of reset_config The stm32h7x.cfg does not specify connect_assert_srst or connect_deassert_srst in its reset_config. The comment claims that it will therefore connect in reset. However, per the manual, the default configuration is actually connect_deassert_srst, not connect_assert_srst. In actual fact, connect_assert_srst does not work on the STM32H7 because, while SRST is asserted, everything on the AXI bus is inaccessible. The CPU core is accessible, but since the examine-end event handler also pokes at the DBGMCU peripheral, that will fail in connect_assert_srst mode. So using connect_deassert_srst is appropriate, so fix the comment accordingly. Change-Id: If3e32e871fb19cc61183bdf911b7c5efd80b62e2 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4741 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> * docs: fix typo in manual Change-Id: I28717105eb2a907b0cb4b03f4b5ff1f47194413b Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/4751 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> * README: fix stlink instructions Since 31c58c139d85c35cc8ebce4196edb2c5eb157c7a there is a unified config for all stlink versions. Change-Id: Id736063496ecd96e2024ed69dcb67a22c44b80bb Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/4672 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> * Permit null target on TCL connection In previous versions of OpenOCD, it was possible to connect to the TCL RPC interface without a current target. In `tcl_new_connection`, the curent target would be queried by number, and the possibility of a null current target was handled properly. In commit bb9d9c60264a905926e0d15f84842858d0de80b7, the `get_target_by_num` call was replaced by a `get_current_target` call, without noticing that `get_current_target` aborts if there is no current target, whereas `tcl_new_connection` is perfectly able to handle that situation. Provide a `get_current_target_or_null` function for use by consumers who are OK with a null current target, and use it in `tcl_new_connection`. Change-Id: I06f7e1e149f1169e23c73ba328c7ad9f9425cc2a Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4730 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Franck Jullien <franck.jullien@gmail.com> * riscv_get_thread_reg_list matches new prototype. None of the existing test cases cause this function to be called. I suspect it never gets called, since it is weird to have a function that only returns the GPRs as a full list of registers. Change-Id: Ib54f182c1b2fc4dd711c877cb5c9b3e0af77461d * Fix conflict resolutions. Change-Id: I5228c308a08ee54530f8c1cadac2afe1c974d41e
2018-11-18efm32: correct erase address if bank->base != 0Andreas Kemnade1-1/+1
Prepare for additional flash banks not located at address 0 Change-Id: I60b78c917f94fa52bf24df9e3315536f776eec84 Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Reviewed-on: http://openocd.zylin.com/4440 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-12Fix memory leaks. (#328)Tim Newsome1-4/+10
Change-Id: Ic5262101b1a572cfcf91f29f813a24df3899fd0c
2018-11-06Clean up fespi flashing code (#313)v20181030Tim Newsome1-260/+109
* WIP upstream review feedback. See http://openocd.zylin.com/#/c/4656/ The main change is to get rid of macros that contain a return statement. Change-Id: Iff79a8aa7c40ee04a8d1f07d973f9b29d4899d5c * Remove unaligned head/tail code. From inspection it's not clear to me that this is necessary at all. I've been unable to make a test case that results in anything besides a 4-byte aligned flash to happen. Sections that aren't multiples of 4 are common, and appear to work fine. Change-Id: Idb6109ca015ae06b9d8f16bd883f9c8f5c51087d * Move fespi native code into contrib/loaders As suggested by http://openocd.zylin.com/#/c/4656/ Change-Id: I275012aa8a1ef6a0e8a2ec8ebe8643d87de24407 * Reenable hw mode if errors happen without it. Change-Id: I1220033c13d02e8a441992bd6daa0ec3b5acbfca * Default flash to not protected. Requested by upstream review. Change-Id: I61753bd9909d7f21ef6624037a865072c18bd1d8
2018-11-03flash/nor/stm32f1x: Use of protection blocks, improved option bytes handlingDominik Peklo1-218/+179
Handle write protection status in blocks instead of sectors, removing unnecessary complexity in the process. Now closer to stm32f2x. Support sequential modification of option bytes by read/modify/write directly to option bytes area instead of always starting with the currently loaded bytes from FLASH_OBR/WRPR registers. Added new command 'options_load' to force re-load of option bytes w/o having to power cycle target. Change-Id: I5c76191e29c17a1e11482df06379d10ca8d6d04d Signed-off-by: Dominik Peklo <dom.peklo@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4576 Tested-by: jenkins Reviewed-by: Jan Vojtěch <honza.vojtech@gmail.com>
2018-11-02flash/nor/at91samd: add SAMR21E19A DIDTomas Vanek1-2/+3
While on it correct RAM amount of SAMR21x16A devices Change-Id: Ie9ab9de1551bdceff17af7597a9a2ee41f5aebe0 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4734 Reviewed-by: Eduardo Montoya Tested-by: jenkins
2018-10-16esirisc: support eSi-RISC targetsSteven Stallion3-0/+624
eSi-RISC is a highly configurable microprocessor architecture for embedded systems provided by EnSilica. This patch adds support for 32-bit targets and also includes an internal flash driver and uC/OS-III RTOS support. This is a non-traditional target and required a number of additional changes to support non-linear register numbers and the 'p' packet in RTOS support for proper integration into EnSilica's GDB port. Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4660 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-08flash/nrf5: support for nRF52810Anders Westrup1-0/+4
Change-Id: I01c430bfa593d20ea7a51c90d67052e374d239b3 Signed-off-by: Anders Westrup <anders@westrup.se> Reviewed-on: http://openocd.zylin.com/4680 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Slowcoder <slowcoder@gmail.com>
2018-09-19Added support for STM32L4X option bytes writing.Thomas Søhus1-177/+235
Enables the programming of Write protection lock bits. - Updated/re-factored with option_read, option_write and option_load commands. Change-Id: I86358c7eb1285c3c0baac1564e46da8ced5fd025 Signed-off-by: Thomas Søhus <tls@ceepro.dk> Reviewed-on: http://openocd.zylin.com/4654 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
generated by cgit v1.1 at 2024-11-16 18:34:50 +0000