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2018-05-14Remove FSF address to satisfy checkpatchTim Newsome4-20/+0
It was giving this error: ERROR: Do not include the paragraph about writing to the Free Software Foundation's mailing address from the sample GPL notice. The FSF has changed addresses in the past, and may do so again. OpenOCD already includes a copy of the GPL. Change-Id: Iae50c2b38f1845d826d7d631072c8c3ded8859da
2018-05-08flash/nor, contrib/loaders: add stm32 loaders Makefile and generated .incTomas Vanek11-43/+82
Flash loaders refactored to the new style - use generated .inc instead of hexadecimal machine code in the flash driver source. Change-Id: If65a2099589e210f9450819b467d67819fd841fc Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4439 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08target armv7m: multi-block erase checkTomas Vanek5-59/+42
Tested on PSoC6 (Cortex-M0+ core), onboard KitProg2 in CMSIS-DAP mode, adapter_khz=1000. Plain read: flash read_bank 0 /dev/null takes 48 seconds. erase_check without this change: flash erase_check 0 takes horrible 149 seconds!! And the same command with the change applied takes 1.8 seconds. Quite a difference. Remove the erase-value=0 version of algorithm as the new one can check for any value. If the target is an insane slow clocked CPU (under 1MHz) algo timeouts. Blocks checked so far are returned and the next call uses increased timeout. Change-Id: Ic0899011256d2114112e67c0b51fab4f6230d9cd Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4298 Tested-by: jenkins Reviewed-by: Jonas Norling <jonas.norling@cyanconnode.com> Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-03-07Added support for STMicroelectronics BlueNRG-1 and BlueNRG-2 SoCMichele Sardo3-0/+177
Added configuration files and flash loaders. Change-Id: I768eb3626f4e0eadb206bef90a867cc146fe8c75 Signed-off-by: Michele Sardo <msmttchr@gmail.com> Reviewed-on: http://openocd.zylin.com/4226 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-13jtagspi: new protocol that includes transfer lengthRobert Jordens1-63/+299
This commit contains a rewrite of the jtagspi protocol and covers both changes in the jtagspi.c openocd driver and the bscan_spi (xilinx_bscan_spi) proxy bitstreams. The changes are as follows: 1. Always perform IR scan to ensure proper clearing of BYPASSed DRs. 2. Insert alignment cycles for all BYPASSed TAPs: The previous logic was erroneous. The delay in clock cyles from a bit written to the jtag interface to a bit read by the jtag interface is: * The number of BYPASSed TAPs before this (jtagspi) tap * The length of the jtagspi data register (1) * The number of BYPASSed TAPs before this one. I.e. it is just the number of enabled TAPs. This also gets rid of the configuration parameter DR_LENGTH. 3. Use marker bit to start spi transfer If there are TAPs ahead of this one on the JTAG chain, and we are in DR-SHIFT, there will be old bits toggled through first before the first valid bit destined for the flash. This delays the begin of the JTAGSPI transaction until the first high bit. 4. New jtagspi protocol A JTAGSPI transfer now consists of: * an arbitrary number of 0 bits (from BYPASS registers in front of the JTAG2SPI DR) * a marker bit (1) indicating the start of the JTAG2SPI transaction * 32 bits (big endian) describing the length of the SPI transaction * a number of SPI clock cycles (corresponding to 3.) with CS_N asserted * an arbitrary number of cycles (to shift MISO/TDO data through subsequent BYPASS registers) 5. xilinx_bscan_spi: clean up, add ultrascale This is tested on the following configurations: * KC705: XC7K325T * Sayma AMC: XCKU040 * Sayma AMC + RTM): XCKU040 + XC7A15T, a board with integrated FTDI JTAG adapter, SCANSTA JTAG router, a Xilinx Ultrascale XCKU040 and a Xilinx Artix 7 15T. https://github.com/m-labs/sinara/wiki/Sayma * Custom board with Lattice FPGA + XC7A35T * CUstom board with 3x XCKU115-2FLVA1517E Change-Id: I7361e9fb284ebb916302941735eebef3612aa103 Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/4236 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-13remote_bitbang_sysfsgpio: fix reset handlingAleksey Shargalin1-1/+1
When both SRST and TRST asserted, 'u' is sent to remote bitbang. Fix for correct handling of such a case Change-Id: I2a93ff71f5bbae658e6c0c3649a9fbcca2c5a14b Signed-off-by: Aleksey Shargalin <myokaski@gmail.com> Reviewed-on: http://openocd.zylin.com/4283 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-12-07stm8 : new targetAke Rehnman4-1/+95
New STM8 target based mostly on mips4k. Target communication through STLINK/SWIM. No flash driver yet but it is still possible to program flash through load_image command. The usual target debug methods are implemented. Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329 Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/3953 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-12-06flash: Add new stm32h7x driver supportAlexandre Torgue1-0/+121
Add basic support for: -STM32H7x (Embedded flash 2M) Erase and write tested on stm32h743. Change-Id: Ie8d8786227cdeee39fcf5663167a053ad8dcef4c Signed-off-by: Rémi Prud'homme <remi.prudhomme@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Reviewed-on: http://openocd.zylin.com/4181 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2017-10-03flash: efm32: add support for EFR-familty (e.g. bluegecko)Andrea Merello1-4/+0
This patch adds support for Blue Gecko and Mighty Gecko chips from Silabs. They have different EFM32_MSC_REGBASE and LOCK register offset. Based on the original patch from Andreas Kemnade. Change-Id: I166c14960ced7c880b68083badd1b31372fefabe Cc: Andreas Kemnade <andreas@kemnade.info> Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Reviewed-on: http://openocd.zylin.com/4034 Reviewed-by: Jonas Norling <jonas.norling@cyanconnode.com> Tested-by: jenkins Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: chrysn <chrysn@fsfe.org>
2017-06-17flash Kinetis: handle all types of watchdog, disable in reset-initTomas Vanek5-11/+96
Active watchdog forces reset during armv7m_checksum_memory() in verify_image command if run just after reset init. COP watchdog in KL series and WDOG32 in KE1 series have longer timeout however they need to be disabled too. The change extends 'kinetis disable_wdog' command to optionally probe the chip and use appropriate algorithm to disable watchdog. Setting of cache type is also split from flash_support flags. Tcl command 'kinetis disable_wdog' is called in reset-init event. Change-Id: I3191e230f38b679ed74f2a97fe323ef8fb3fe22e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3901 Tested-by: jenkins Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-12jtag/drivers: Add Cypress KitProg driverForest Crossman1-0/+6
This patch adds a driver for the SWD-only Cypress KitProg programmer/debugger. Change-Id: I3a9a8011a762781d560ebb305597e782a4f9a8e5 Signed-off-by: Forest Crossman <cyrozap@gmail.com> Reviewed-on: http://openocd.zylin.com/3221 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2017-04-24udev: Add rules for Ambiq Micro EVK's.Karl Palsson1-0/+5
Udev rules for Ambiq Micro ftdi based EVK's. Two new vid:pid's: 2AEC:6010, and 2AEC:6011. Udev rule for multi-target Debug board 2AEC:1106 Change-Id: Id7430d0c70647752375230f4024be9f7a2ba95ce Signed-off-by: Rick Foos <rfoos@solengtech.com> Signed-off-by: Karl Palsson <karlp@tweak.net.au> Reviewed-on: http://openocd.zylin.com/3980 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-04-24Fix flash writing on stm32l0Armin van der Togt1-16/+16
Fix "couldn't use loader, falling back to page memory writes" error on stm32l0 which was caused by the use of cortex-m3 instructions in the flash loader code. The loader is rewritten using cortex-m0 compatible instructions Signed-off-by: Armin van der Togt <armin@otheruse.nl> Change-Id: If23027b8e09f74e45129e1f8452a04bb994c424e Reviewed-on: http://openocd.zylin.com/4036 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-12-25contrib: udev: modify rules for users physically in front of machine ↵Jiri Kastner2-134/+134
(TAG+="uaccess") Modern desktop systems with systemd recommend this way to give users access to devices. We change permissions to sane value along the way. See e.g. https://lists.debian.org/debian-devel-announce/2016/11/msg00008.html We also change the filename to put it in order with 71-seat.rules, 60 is default for dh_installudev so pick that as a reasonable value. Change-Id: I15f6fb1b6be853ac097d0ca91955609f9e5eb9cf Signed-off-by: Jiri Kastner <cz172638@gmail.com> Reviewed-on: http://openocd.zylin.com/2804 Tested-by: jenkins Reviewed-by: Robert Jordens <jordens@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-12-08xscale: Move debug handler to contrib/loadersAndreas Fritiofson6-1/+969
Avoid special rules to generate array at compile time by shipping the generated file. Convert to Makefile build like the other loaders. Change-Id: I5a05edddcfaff3d395086cd3aa33120f8a7aa9dc Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3864 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08rtos: add support for uC/OS-IIISteven Stallion1-0/+32
This patch introduces RTOS support for uC/OS-III. Currently, only FPU-less ARM Cortex-M targets are supported. Due to the configurability of the RTOS, an OpenOCD-specific file must be linked along with the project to determine the correct offsets within the OS_TCB structure. In addition to the above, a crash was fixed in rtos_get_gdb_reg_list such that RTOS support could be used between resets without restarting OpenOCD and support for the Hg packet was cleaned up. Change-Id: Ide004a689e6b886185df665c00fb644629eb31d1 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/3556 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-11-04flash Kinetis: longword programming changed to flash_async_algorithmTomas Vanek3-0/+126
Change-Id: I9c40acfad37760c3dab454f2432817b2d420792d Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3563 Reviewed-by: Steven Stallion <stallion@squareup.com> Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-10-04xilinx_bscan_spi: port to new migen and clean-upRobert Jordens1-193/+121
* port to new migen * streamline package/part specification * add pullup (Series3, Series6) and pullnone (Series7) for unused pins as xilinx impact/vivado do it. * specify respective toolchains * build Series7 with vivado (broader support, faster) * point to prebuilt bitstreams at https://github.com/jordens/bscan_spi_bitstreams Change-Id: Ibfef3d78f855b754425f3e6131e2e49fa111e09a Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/3173 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins Reviewed-by: Robert Jördens Reviewed-by: William D. Jones Reviewed-by: Tim "mithro" Ansell <mithro@mithis.com>
2016-08-14contrib/loaders: Enforce Little Endian ARM machine codeAndreas Färber6-8/+20
arm-none-eabi target triplet defaults to Little Endian, and so far any submitted machine code snippets have been verified to be Little Endian. However a user might override [ARM_]CROSS_COMPILE with an armeb toolchain, potentially resulting in invalid machine code. Let's be safe and enforce Little Endian mode for assembler and compiler. Change-Id: I9cefe24689eaded25d60ffb1f254b254e8d76f9d Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3498 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-08-13kinetis_ke: Switch to standard build variablesAndreas Färber2-10/+10
Instead of using ARM_ prefixed variables and an "arm" target, use CROSS_COMPILE, AS, OBJCOPY. This requires to switch from ?= to = to avoid the host assembler getting invoked. This allows to handle kinetis_ke subdirectory like fm4 and xmc1xxx. Change-Id: I7ea0bf119f6c4716f4d6002794004730af49eef4 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3505 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-08-13contrib/loaders: Add umbrella MakefileAndreas Färber1-0/+33
Add a Makefile that orchestrates the other loader Makefiles. It assumes that the clean target can be run without cross toolchain. at91sam7x does not successfully build and is not really needed either, therefore left out. Add an exception to .gitignore for any contrib/loaders Makefile. Change-Id: I74456b768472f3190a1721bcf41a777bb8daf973 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3504 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22armv4_5: Integrate build of checksum codeAndreas Färber2-1/+17
Add rules to build armv4_5_crc.inc, and convert the code to target endianness the least intrusive way. Change-Id: I7452b2c7e679dae14f9cda5f89bc81c16fc12cad Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3473 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2016-05-22armv4_5: Integrate build of erase check codeAndreas Färber3-3/+13
Add rules to build armv4_5_erase_check.inc, and convert the code to target endianness the least intrusive way. Drop an unused word from the assembler sources to make the ARM bytecode fully match that of armv4_5.c and to not break ARMv4 assumptions. This completes the build rules for contrib/loaders/erase_check directory. Change-Id: I36be7a944e26142088195fa3fb072d4e577bf328 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3135 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-22armv7m: Integrate build of checksum codeAndreas Färber2-0/+24
Add rules to build armv7m_crc.inc and include it via preprocessor. Change-Id: I4482c7acb8454de28bdf210d9f06c0720ada490a Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3474 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-20Fix spelling of ARM CortexAndreas Färber1-2/+2
It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn or CortexXn. Further it's Cortex-M0+, not M0plus. Cf. http://www.arm.com/products/processors/index.php Consistently write it the official way, so that it stops propagating. Originally spotted in the documentation, it mainly affects code comments but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output. Found via: git grep -i "Cortex " git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu" git grep -i "CortexM" Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3483 Tested-by: jenkins Reviewed-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-17udev: add rule for original Keil ULink (version 1)Alexander Kurz1-0/+3
The original ULINK adapter has been introduced by Keil in 2002 and got replaced in 2008 by the incompatible ULINK2. It is not listed on their website any more. For information about it, browse archive.org for http://www.keil.com/ulink1/ or http://www.keil.com/ulink/ Change-Id: Ie52d381580acab53ddb40499594dbdc2d27ef1b6 Signed-off-by: Alexander Kurz <akurz@blala.de> Reviewed-on: http://openocd.zylin.com/3371 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-05Add Altera USB Blaster udev rule.Christopher Head1-0/+3
This udev rule makes the Altera USB Blaster clone I have on my desk accessible to the plugdev group. Change-Id: Ic5e8052c66a270b6a6f89e29de49d9785f18fc1e Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/3423 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-05-05flash/nor: Add Infineon XMC1000 flash driverAndreas Färber8-0/+267
The XMC1000 family uses a very different flash interface from XMC4000. Tested on XMC 2Go and XMC1100 Boot Kit. Change-Id: I3edaed420ef1c0fb89fdf221022c8b04163d41b3 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3418 Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Tested-by: jenkins
2016-05-05flash Kinetis: new KVx family addedTomas Vanek3-0/+87
Cortex-M0+ and M4 motor control MCUs KV10, KV11, KV30, KV31, KV42, KV44 and KV46 added to SDID identification. Watchdog disable code changed to work on Cortex-M0+ (KV1x) Protection size set to 1K for 16K flash devices (KV10Z16) - cherry picked from Andrey Smirnov's change #2051 Change-Id: Ia6f4868eaf7e2cb6ad6a736210c703a67e0027be Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3235 Tested-by: jenkins Reviewed-by: Kyle Manna <kyle.manna@fuel7.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-04 stm32l4x.c: Correct waiting for data.Uwe Bonnes1-1/+4
Old code waited only for 7 bytes and didn't handle buffer wrap-around, but was functional despite. Change-Id: Iceaf7be1e51368b2ec0a8722cc9ac16d12f9aa63 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/3140 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-05-04stm32l4x.c: Use explicit 64-bit flash access as reference manual implies.Uwe Bonnes1-7/+5
Change-Id: I87b540c1ee7158a9d697e9fbc845a603c6bbe74d Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/3139 Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Tested-by: jenkins
2016-05-04RTOS support: Correction of out of bound access of thread arrayJonathan Dumaresq1-1/+1
FreeRTOS use an array to store ready task. The array size is configMAX_PRIORITIES. In the current implementation, the code try to access 1 more priority if the helper from freeRTOS contrib is used. This has effect of detecting bad thread. This patch correct this and have been tested on a code with more than 12 task. Change-Id: Id229f0b2c4bf1aab87a2a69be174cc9b6dda00cb Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca> Reviewed-on: http://openocd.zylin.com/3400 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-05-04flash: Added support for Freescale Kinetis KE family.Ivan Meleca5-0/+269
Tested with MKE04Z8VTG4, MKE02Z64VLC4 and MKE02Z64VLD2. Change-Id: I606e32a2746a3b96d3e50f3656ba78d40c41c1ea Signed-off-by: Ivan Meleca <ivan@artekit.eu> Reviewed-on: http://openocd.zylin.com/3380 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-05-04stm32l4x.c: Free r6/7 for 64-bit operations.Uwe Bonnes1-9/+9
Use r5 instead of r7. Change-Id: I350d00eeabe9446d64dba8f1dbffb5d4beab7dd6 Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/3138 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-02-29armv7m: Integrate build of erase check codeAndreas Färber1-0/+2
Instead of documenting the file path as a comment and inline-commenting the THUMB bytecode, include the hex array via preprocessor. This assures the path is actually up-to-date and facilitates updating the code. Change-Id: Ieb0a7cd0bc14882ac96750f524616d9768a0c6f5 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3134 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-02-29xmc4xxx: Integrate build of erase check codeAndreas Färber2-0/+21
Instead of pointing to the assembler sources in a comment and inline-commenting the THUMB bytecode, place the hex array alongside the assembler sources and include it via preprocessor. Originally inspired by a typo in the file path during driver development, but it also facilitates making changes to the assembler sources. A Makefile is provided to help automate updating the bytecode. It is not integrated with the automake system to avoid forcing an ARM cross-compiler onto every user, i.e. after modifying the sources they need to be rebuilt in that directory before building the usual way. ARM_CROSS_COMPILE= can be passed on the make command line to deal with native ARM toolchains or with varying prefixes of cross-toolchains. Change-Id: I00ceb980a68c8554a180dd13719ac77b677a8bcd Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3133 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-02-29flash: New Spansion FM4 flash driverAndreas Färber6-0/+225
The Spansion FM4 family of microcontrollers does not offer a way to identify the chip model nor the flash size, except for Dual Flash vs. regular layout. Therefore the family is passed as argument and wildcard-matched - MB9BFx6x and S6E2CC families are supported. Iterations showed that ... 1) Just doing the flash command sequence from SRAM loader code for each half-word took 20 minutes for an 8 KB block. 2) Doing the busy-wait in the loader merely reduced the time to 19 minutes. 3) Significant performance gains were achieved by looping in loader code rather than in OpenOCD and by maximizing the batch size across sectors, getting us down to ~2 seconds for 8 KB and ~2.5 minutes for 1.1 MB. (Tested with SK-FM4-176L-S6E2CC-ETH v11, CMSIS-DAP v23.) gcc, objcopy -Obinary and bin2char.sh are used for automating the integration of hand-written assembler snippets. Change-Id: I092c81074662534f50b71b91d54eb8e0098fec76 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2190 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-26Improve J-Link driver and introduce libjaylink.Marc Schink1-3/+11
This patch uses libjaylink which is a library to access J-Link devices. As other tools which are not in the scope of OpenOCD also need to access J-Link devices a library is used. A firmware upgrade tool and an advanced configuration tool for J-Link devices are under development. Further versions of libjaylink will support additional features OpenOCD could benefit from. This includes TCP/IP as additional possibility to connect to J-Link devices as well as power tracing and device internal communication. The latter is used to access peripherals on some development boards (e.g EFM32 STK and DVK). Integration of libjaylink is realized with a git submodule like jimtcl. As libjaylink depends on libusb-1.0 only, no additional dependency is introduced for OpenOCD. All low-level JTAG and SWD implementations of the current driver are left untouched and therefore no incompabilities are to be expected. Improvements of this patch: * Support for more USB Product IDs, including those with the new scheme (0x10xx). The corresponding udev rules are also updated. * Device selection with serial number and USB address. * Adaptive clocking is now correctly implemented and only usable for devices with the corresponding capability. * The target power supply can now be switched without the need for changing configuration and power cycling the device. * Device configuration is more restrictive and only allowed if the required capabilities are available. * Device configuration now shows the changes between the current configuration of the device and the values that will be applied. * Device configuration is verified after it is written to the device exactly as the vendor software does. * Connection registration is now handled properly and checks if the maximum number of connections on a device is reached. This is also necessary for devices which are attached via USB to OpenOCD as some device models also support connections on TCP/IP. * Serial Wire Output (SWO) can now be captured. This feature is not documented by SEGGER however it is completely supported by libjaylink. This patch and libjaylink were tested on Ubuntu 14.04 (i386), Debian 7 (amd64), FreeBSD 10.0 (amd64) and Windows XP SP3 (32-bit) with the following device and target configurations: * JTAG: J-Link v8.0, v9.0 and v9.3 with AT91SAM7S256 * SWD: SiLabs EFM32 STK 3700 (EFM32GG990F1024) * SWD: J-Link v8.0, v9.0 and v9.3 with EFM32GG990F1024 * SWD: XMC 2Go (XMC1100) * SWD: XMC1100 Boot Kit (XMC1100) * SWD: IAR Systems / Olimex Eval Board (LPC1343F) * SWD: Nordic Semiconductor nRF51 Dongle (nRF51422) * SWD: SiLabs EZR32 WSTK 6220A (EZR32WG330FG60G) Except for Windows XP all builds are tested with Clang in addition to GCC. This patch and libjaylink are not tested on OSX yet. Change-Id: I8476c57d37c6091c4b892b183da682c548ca1786 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/2598 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-26niietcm4: support for NIIET's Cortex-M4 microcontrollersBogdan Kolbov1-0/+112
This adds docs, example config, flash driver. Driver is only supports K1921VK01T model for now. Change-Id: I135259bb055dd2df1a17de99f066e2b24eae1b0f Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru> Reviewed-on: http://openocd.zylin.com/3011 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-11flash: New driver for XMC4xxx microcontroller familyJeff Ciesielski1-0/+45
This is a complete flash driver for the Infineon XMC4xxx family of microcontrollers, based on the TMS570 driver by Andrey Yurovsky. The driver attempts to discover the particular variant of MCU via a combination of the SCU register (to determine if this is indeed an XMC4xxx part) and the FLASH0_ID register (to determine the variant). If this fails, the driver will not load. The driver has been added to the README and documentation. Tests: * Hardware: XMC4500 (XMC4500_relax), XMC4200 (XMC4200 enterprise) * SWD + JTAG * Binary: 144k, 1M Note: * Flash protect only partly tested. These parts only allow the flash protection registers (UCB) to be written 4 times total, and my devkits have run out of uses (more on the way) Future Work: * User 1/2(permalock) locking support via custom command * In-memory flash loader bootstrap (flashing is rather slow...) Change-Id: I1d3345d5255d8de8dc4175cf987eb4a037a8cf7f Signed-off-by: Jeff Ciesielski <jeffciesielski@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/2488 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-10-30Add handling for STM32L4.Uwe Bonnes1-0/+99
Option handling not yet implemented. Change-Id: I5a11ef3221896cb02babe4e6e71073c43aa8740b Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2941 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-10-30stm32f2x: Add memory barrier needed for STM32F7 flashing.Uwe Bonnes1-0/+1
Change-Id: I44fca55c46fc8f960ba46a0604692ce98909face Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-on: http://openocd.zylin.com/2939 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-08-06flash/nor/jtagspi: add JTAGSPI driverRobert Jordens1-0/+317
Many FPGA board speak JTAG and have a SPI flash for their bitstream attached to them. The SPI flash is programmed by first uploading a proxy bitstream to the FPGA that connects the JTAG interface to the SPI interface if the IR contains a certain USER instruction. Then the SPI flash can be erase, written, read directly through the JTAG DR. The JTAG and SPI signaling is compatible. Such a proxy bitstream only needs to connect TDO-MISO, TDI-MOSI, TCK-CLK, and the activate the chip select when the IR contains the special instruction and the JTAG state machine is in the DR-SHIFT state. Change-Id: Ibc21d793a83b36fa37e2704966aa5c837c4dd0d2 Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2844 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06udev: Add J-Link on-board nRF51-DKKyle Manna1-0/+1
* Add USB VID and PID for the J-Link interface running on the Nordic Semiconductor nRF51-DK. Also tested with debug out port to debug external boards. * Fixes permissions problems. Change-Id: I01ffc3150fa2af92d399b50e0195dc255a40ec42 Signed-off-by: Kyle Manna <kyle@kylemanna.com> Reviewed-on: http://openocd.zylin.com/2774 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-04-16contrib/itmdump: add a hack to allow direct dumping of specific SWIT, fix ↵Paul Fertser1-3/+30
timestamp Currently itmdump is not a production-quality code hence this hack seems to be appropriate. More robust handling is possible with libswo-based swodec tool that's available from http://git.zapb.de/ . This adds a new command line option -d N where N is a stimulus number you want to dump (counting from 1). The idea here is that if you're interested to live-monitor just a single stimulus port, you can use this utility directly. If one wants to demultiplex the TPIU stream, the following is proposed: 1. Use https://gitorious.org/multiplex/multiplex utility that can accept binary data from a file/pipe/stdin and arbitrary number of TCP connections. It simply mirrors all the incoming data to all the accepted connections; 2. Use socat to connect itmdump to the proxy mentioned in 1. and then either dump the results to separate files or share via their dedicated TCP ports. Example script (inspired by http://openocd.zylin.com/#/c/1662/ , enables and disables specific itm ports on demand): for i in `seq 0 31`; do while true; do socat -U TCP-LISTEN:$((8000+$i)),reuseaddr \ SYSTEM:"echo itm port $i on | nc -q0 localhost 4444 > /dev/null; nc localhost 7777 | stdbuf -oL itmdump -d$((i+1))" echo itm port $i off | nc -q0 localhost 4444 > /dev/null done < /dev/null >&0 2>&0 & done Change-Id: Iaeb102436eaa5b106002083f2ffe758fb7bd83e5 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2537 Tested-by: jenkins
2015-04-16rtos: add instructions and helper code to make FreeRTOS work againAndreas Fritiofson1-0/+20
Run-time tested with FreeRTOS V8.1.2 (current version). For the time being I propose this way of dealing with RTOSes that do not export necessary information on their own. I also suggest implementing a similar scheme for ChibiOS, exporting the necessary struct fields' offsets via an OpenOCD-specific helper. Change-Id: Iacf8b88004d62206215fe80011fd7592438446a3 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/2347 Tested-by: jenkins
2015-03-09contrib/itmdump: fix UB in show_swit, and few compile warningsPaul Fertser1-11/+2
Change-Id: I1c5c99f190f7b4d405dc6fa06533e7ff37a652ec Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2533 Tested-by: jenkins Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-03-09contrib: itmdump: fix incorrect format printfKarl Palsson1-2/+2
Change-Id: I29100e4b284e031613586a66daa74987d86ac9e1 Signed-off-by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2449 Tested-by: jenkins Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-by: Stian Skjelstad <stian@nixia.no> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-02-22cfg: add board and target configs for TI SimpleLink Wi-Fi CC3200 LaunchPadPaul Fertser1-0/+3
Change-Id: I4396ee737c1dad380aa23894bbd1faf75f26d072 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2465 Tested-by: jenkins
2015-02-11sim3x: new flash driver for Silabs SiM3 microcontroller familyAndreas Bomholtz1-0/+81
This is a new driver for Silicon Laboratories SiM3 microcontroller family, based on the work of Ladislav Bábel. The driver will try to detect the type of MCU from the device id register, and if this fails it will use the flash size from the flash bank command. Driver added to the documentation and to the README. TCL script added. Tests: * Hardware: SiM3C166 (pre-production) and SiM3U167 * Binary: 4kb, 197kb, 256kb * Flash protect not tested Change-Id: I701e0cf505ca8ad99be7f83543fe5055b2f65dcc Signed-off-by: Andreas Bomholtz <andreas@seluxit.com> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2078 Tested-by: jenkins
generated by cgit v1.1 at 2024-09-28 16:14:12 +0000