aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2020-12-26cortex-a: fix reset on dapdirect transportsAntonio Borneo1-2/+2
The target code for assert reset on cortex_a has been patched on commit b0698501b0e7 ("cortex_a: fix cortex_a_assert_reset() if srst_gates_jtag") then in cdba6ba0ad63 ("cortex_a: fix reset for SWD transport") to workaround the mismatch between jtag and swd implementations. See discussion for the second patch at http://openocd.zylin.com/3641/ While all of these mismatches should hopefully be cleaned by the reset framework rework, an extension of the workaround of the second patch is required for dapdirect transports, either dapdirect_swd and dapdirect_jtag. Extend the existing workaround to all non-jtag transports. Change-Id: Ia6a9d43bab524cbb3de4c37ce24c45f25187353d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5979 Tested-by: jenkins
2020-12-26armv7m_trace: stop getting traces from adapter at exitAntonio Borneo3-0/+21
If OpenOCD is reading trace data from the target, at exit it should stop the adapter to gather data, but should left the target still producing them. Add a helper in armv7m_trace to disable the adapter's trace and call it during OpenOCD teardown. This also provides a workaround for an issue in the firmware of ST-Link V3 till version V3J7. If the SWD connection is closed when trace is active, at following connection the trace does not work anymore. Change-Id: I47ccab61405384938555096c5aca789eaa090d27 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5978 Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li> Tested-by: jenkins
2020-12-26LICENSES: Update GFDL invariant text to match official wordingJonathan McDowell1-3/+3
This was flagged by lintian against the Debian package; the text stating there are no invariant sections deviates from the official GNU wording. Update it to match the text at the bottom of: https://www.gnu.org/licenses/old-licenses/fdl-1.2.en.html Change-Id: Ie222237a8eede24c1b71218b05e1513b74208a47 Signed-off-by: Jonathan McDowell <noodles@earth.li> Reviewed-on: http://openocd.zylin.com/5974 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-26Makefile.am: fix non-POSIX warning from automakeAntonio Borneo1-1/+2
Automake issues a warning Makefile.am:46: warning: wildcard $(srcdir: non-POSIX variable name Makefile.am:46: (probably a GNU make extension) because the GNU make function 'wildcard' is not POSIX. Also the GNU make function 'shell' triggers a similar warning. Use the POSIX extension '!=', that executes an arbitrary shell command, to replace the GNU make 'wildcard'. Don't include the file 'NEWS' because automake already includes it by default. Change-Id: Ice560c3789cec4f3f2197a255d6f5af7b1fde634 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5965 Tested-by: jenkins Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
2020-12-26Correct warning messageLuca Lindhorst1-2/+2
The warning message regarding wrong verification checksum for LPC2000, claims that the verification will fail, but the checksum written correctly by openocd. Clarify this in the warning message. Change-Id: I929ac767f7f9fdad9bace250c8c04a776462800a Signed-off-by: Luca Lindhorst <l.lindhorst@wut.de> Reviewed-on: http://openocd.zylin.com/5956 Tested-by: jenkins Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-10Restore +dev suffixPaul Fertser1-1/+1
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2020-12-09The openocd-0.11.0-rc1 release candidateAntonio Borneo2-2/+207
Change-Id: I111fec1304482f5c0f9d6ee988be8a2ea3de3981 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-09doc: document adapter drivers linuxgpiod and sysfsgpioAntonio Borneo1-0/+23
Change-Id: If894092a7ae04bb95fa1913d2e3c8465c2d0f75c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5961 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-12-09flash/nor/stmsmi: fix compile error with clang 12.0.0Antonio Borneo1-4/+3
The git preliminarily version of clang 12.0.0_r370171 f067bc3c0ad6 reports an error in the expansion of the macro SMI_READ_REG(): error: '(' and '{' tokens introducing statement expression appear in different macro expansion contexts [-Werror,-Wcompound-token-split-by-macro] Remove one intermediate macro expansion to make clang happy. Change-Id: I8ae6d9c18808467ba8044d70cbf0a4f76a18d3e6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5958 Tested-by: jenkins Reviewed-by: Xiaofan <xiaofanc@gmail.com>
2020-12-09jtag/drivers/ulink: auto-detect OpenULINK USB endpoints numbersŁukasz Misek1-7/+14
This should provide greater compatibility with different OpenULINK targets which might be using various endpoints numbers. Since they're advertised in the USB descriptor anyway it makes sense to autodetect them. Interface is no longer claimed before attempting to load firmware to a freshly booted device, so I have no idea if this will break on windows or other uncommon systems (Paul). Change-Id: Iee10dcb6911dcf46239c430e174d9f98b5bde3c2 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2445 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-09flash/nor/sfdp|stmqspi: fix build issue with clang on mac OSTarek BOCHKATI2-15/+15
Change-Id: I3b3aa4236125523ad65fd615ada0f5647d26f526 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com> Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5940 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-12-05jimtcl: switch to githubAntonio Borneo1-1/+1
The 'historically' main repository of jimtcl in repo.or.cz has lost sync with the github current main repository since July 2020. The new tag 0.80 is not present in repo.or.cz. The developer of jimtcl has been in contact with the admins of repo.or.cz to fix the not better described sync issues and has now decided to stop any further tentative. A new README has been added on 2020-11-19 in the old repository to inform that it is abandoned in favour of github. The old content in repo.or.cz will remain due to forks that still exists in the same server. Switch OpenOCD git submodules to fetch jimtcl code from the main development repository in github. Change-Id: Ia2d59f1347ccfe374538b38131badfd46054eb91 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5948 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05target/register: use an array of uint8_t for register's valueAntonio Borneo7-7/+8
The use of 'void *' makes the pointer arithmetic incompatible with standard C, even if this is allowed by GCC extensions. The use of 'void *' can also hide incorrect pointer assignments. Switch to 'uint8_t *' and add GCC warning flag to track any use of pointer arithmetic extension. Change-Id: Ic4d15a232834cd6b374330f70e2473a359b1607f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5937 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05mips_mips64: fix minor host endianness bugAntonio Borneo1-1/+1
Commit 80f1a92bd798 ("mips64: Add generic mips64 target support") adds a log of the target's program counter in function mips_mips64_debug_entry() by directly casting the little-endian buffer in pc->value. This is going to print an incorrect value on big-endian hosts. Use the function buf_get_u64() to return the register value. Not tested on real HW. Issue identified with GCC compiler flag '-Wcast-align=strict' after change http://openocd.zylin.com/5937/ ("target/register: use an array of uint8_t for register's value"). Change-Id: Icbda2b54a03fdec287c804e623f5db4252f9cd2a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 80f1a92bd798 ("mips64: Add generic mips64 target support") Reviewed-on: http://openocd.zylin.com/5944 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05arm7_9_common: fix host endianness bug in arm7_9_full_context()Antonio Borneo1-4/+20
The original code passes to ->read_core_regs() and to ->read_xpsr() the pointer to the little-endian buffer reg.value. This is incorrect because the two functions above require a pointer to uint32_t, since they already run the conversion with arm_le_to_h_u32() in the jtag callback. This causes a mismatch on big-endian host and the registers get read with the incorrect endianness. Use an intermediate buffer to read the registers as uint32_t and to track the destination reg.value pointer, then copy the value in reg.value after the call to jtag_execute_queue(). Tested with qemu-armeb and an OpenOCD built through buildroot configured for cortex-a7 big-endian. Note that if jtag_execute_queue() fails, the openocd register cache is not updated, so the already modified flags 'valid' and 'dirty' are incorrect. This part should be moved after the call to jtag_execute_queue() too. Change-Id: Iba70d964ffbb74bf0860bfd9d299f218e3bc65bf Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5943 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05armv4_5: fix output of command 'arm reg'Antonio Borneo1-0/+3
Commit fc2abe63fd3c ("armv7m: use generic arm::core_mode") adds two special modes for ARMv6M and ARMv7M in struct arm_mode_data[]. While these modes do not have any additional register to be dumped by command 'arm reg', the command still prints an header for these modes but not followed by any register. Detect the special modes for ARMv6M and ARMv7M and skip them to avoid printing the useless header. Change-Id: I04145769e5742624f143c910eebf9a6f6d8e3cdc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: fc2abe63fd3c ("armv7m: use generic arm::core_mode") Reviewed-on: http://openocd.zylin.com/5942 Tested-by: jenkins
2020-12-05armv4_5: fix segmentation fault in command 'arm reg'Antonio Borneo1-0/+1
Commit fed713104904 ("armv4_5: support weirdo ARMv6 secure monitor mode") introduces the secure mode 28 of ARMv6 as a synonymous of mode 22 (MON), but does not add it in the switch/case in command 'arm reg'. When command 'arm reg' scans the array arm_mode_data[] on targets without secure modes, it does not detect the new secure mode as not supported by the architecture, thus triggers a segmentation fault when it try to read the register's value from unallocated memory. Issue detected with target arm926ejs. Add the new mode in the switch/case and treat it as the mode MON. Change-Id: I2b72cc558e097879a7ee6ea601200bfda6b60270 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: fed713104904 ("armv4_5: support weirdo ARMv6 secure monitor mode") Reviewed-on: http://openocd.zylin.com/5941 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-12-05jep106: Add new IDs from JEDECBoran Car1-243/+503
From JEP106AZ, released on May 24, 2019. Change-Id: I768b7077ec6abcd19ae1530b5715c7ea993add67 Signed-off-by: Boran Car <boran.car@hex-five.com> Reviewed-on: http://openocd.zylin.com/5244 Tested-by: jenkins Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Jiri Kastner <cz172638@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-02Add initial RTT supportMarc Schink15-4/+1732
Real Time Transfer (RTT) is an interface specified by SEGGER based on basic memory reads and writes to transfer data bidirectionally between target and host. Every target that supports so called "background memory access", which means that the target memory can be accessed by the debugger while the target is running, can be used. RTT is especially of interest for targets which do not support Serial Wire Output (SWO) (e.g. ARM Cortex-M0) or where using semihosting is not possible (e.g. real-time applications) [1]. The data transfer is organized in channels where each channel consists of an up- and/or down-channel. See [2] for more details. Channels are exposed via TCP connections. One or more RTT server can be assigned to each channel to make them accessible to an unlimited number of TCP connections. The current implementation does not respect buffer flags which are used to determine what happens when writing to a full buffer. Note that the implementation is designed in a way that the RTT operations can be directly performed by an adapter (e.g. J-Link). [1] https://devzone.nordicsemi.com/tutorials/6/ [2] https://www.segger.com/jlink-rtt.html Change-Id: I8bc8a1b381fb74e08b8752d5cf53804cc573c1e0 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/4055 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-02adi_v5_swd: wait for readable DPIDR, ABORT if stalledTomas Vanek1-13/+56
Reading of DPIDR is the very first operation after JTAG to SWD sequence. Without this change if DPIDR read fails then swd connect fails. Keep trying JTAG to SWD sequence and DPIDR read until success or timeout 0.5 sec. It makes setting of adapter srst delay on SWD transport mostly unnecessary. Also test for ERROR_WAIT (which should not occur according to IHI 0031E B4.3.2 but a quirk is known) and if bus is kept stalled then issue abort to make the next connect possible. Change-Id: Id8fe6618605bbeb4fed5061e987ed55de90a35f2 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5730 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-02arm_adi_v5: prevent possibly endless recursion in dap_dp_init()Tomas Vanek3-23/+43
If dap_dp_read_atomic() in 30 trials loop fails, dap->do_reconnect is set. Following dap_dp_read_atomic() calls dap_queue_dp_read() which in case of SWD transport calls swd_queue_dp_read(). It starts with swd_check_reconnect() and it calls swd_connect() because dap->do_reconnect is set. swd_connect() does some initialization, reads DPIDR and calls dap_dp_init() again! Moreover if dap_dp_init() is called from cortex_m_reset_(de)assert() one level of recursion is necessary to reconnect the target. Introduce dap_dp_init_or_reconnect() for use in cortex_m reset and similar. Remove loop of 30 atomic reads of DP_STAT to prevent unwanted recursion. Change-Id: I54052fdefe50bf5f7c7b59fe751fe2063d5710c9 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5729 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-11-15tcl/target: remove deprecated ${target}_${adapter}.cfg filesTarek BOCHKATI12-23/+0
Change-Id: Ic4837ad3bd06eb353020e44638306f341a923c05 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com> Reviewed-on: http://openocd.zylin.com/5929 Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15helper/command: disable logging of registered commands [RFC]Tomas Vanek1-0/+2
Every debug log of OpenOCD contains approximately 130 lines like: Debug: 264 147 command.c:354 register_command_handler(): registering 'flash'... Because only root name of the command is logged, most of lines is not too informative. E.g. registering 'flash' is repeated 14 times. Karl Passon submitted the patch [1] changing the logged cmd name from root to lowest level. It makes the log better. Unfortunately we also have 'reset_config' and 'cortex_m reset_config' and similar which looks equal in the log after [1]. Moreover [1] has not been reviewed for 5 years. So my guess is that nobody uses that crap in debug log. Save more than 10 kbytes in any debug log and make log analyse easier by blocking log command in #if 0 block. If some developer eventually needs to debug cmd registering he can easily enable logging again. [1] http://openocd.zylin.com/2765 Change-Id: Ib7e528aadd692fd0da2e3c005b4c5a484551b728 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5928 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15flash/nor/stm32f1x: fix error messageTomas Vanek1-1/+1
Backported from gd32vf103.c Change-Id: I9c5bb7b36e6efcee0473c97047058ef26cc46eb7 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5927 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2020-11-15stm32l4x: cosmetic simplification of get_stm32l4_infoTarek BOCHKATI1-10/+8
Change-Id: I2542f946f64388d908b1502f869643080fce9f9e Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5536 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15flash/stm32l4x: STM32L55/L56xx basic support (non-secure mode)Tarek BOCHKATI5-15/+209
STM32L5 have 512 Kbytes of Flash memory with dual bank architecture. STM32L5 flash is quite similar to L4 flash, mainly register names and offsets and some bits are changed. NON-SECURE flash is located at 0x8000000 like L4 devices, so no big change is needed (secure flash will be subject of another change). Note: flash driver name is set stm32l5x, in order to extend the commands with specific L5 commands (to manage TZEN for example ...) Note: this works only when TZEN=0 Change-Id: Ie758abb4aa19a3f29eeb0702d7dcb43992e4c639 Signed-off-by: Michael Jung <mijung@gmx.net> Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5510 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15flash/stm32l4x: introduce table with register offsetsTarek BOCHKATI2-49/+104
This change is a preparation for STM32L5 support on top of L4 driver STM32L5 flash is quite similar to L4 flash, mainly register names and offsets and some bits are changed. flash_regs table is introduced within stm32l4_flash_bank struct in order to get correct register offsets, by using the driver internal function 'stm32l4_get_flash_reg_by_index'. To use efficiently register indexes, stm32l4 _[get|read|write]_flash_reg functions are surcharged to accept register indexes. IMPORTANT: stm32l4_write_option is not surcharged, and they always accept the option register offset. tested on NUCLEO-G474RE and STM32L4R9I-DISCO Change-Id: I739d3e97d63b831af6aa569c5629db0000209551 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5509 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-1560-openocd.rules: add ULINKplus CMSIS-DAP based adapterTarek BOCHKATI1-0/+1
Change-Id: I5935e0a184b8995122d197046ef8fb4e7eefb884 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com> Reviewed-on: http://openocd.zylin.com/5926 Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2020-11-15doc: document CMSIS-DAP v2Tomas Vanek1-1/+19
Change-Id: Ie54e855901c079b456c26a6239177c7678cdcac7 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5930 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15jtag/drivers/cmsis_dap: fix build with gcc 10.1.0Antonio Borneo2-9/+4
Avoid multiple definition of cmsis_dap_usb_backend and cmsis_dap_hid_backend using 'extern'. Move the prototypes in cmsis_dap.h. Remove the useless #if/#endif around the prototypes. Change-Id: I8d73fe148e2155620244bc887d4235e9af530e30 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5790 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15jtag/drivers/cmsis_dap: fix usb bulk connection logicTomas Vanek1-76/+157
http://openocd.zylin.com/4831 has following problems in selecting USB device/interface to connect: - attempts connection to any device with user class and 2 bulk endpoints - regardless of cmsis_dap_vid_pid or cmsis_dap_serial setting connects to the first suitable device Distinguish between real match and no filtering cases and use that info appropriately. Add debug messages to show why the interface is refused. Move CMSIS-DAP interface string detection before checking of class/endpoints to give more understandable debug log in the case the device is refused. Keep track of reliable matches in both device and interface enumeration. First search for the interface with CMSIS-DAP in the interface string. If it fails, chose the first suitable interface. Change-Id: Ia1aacd5631a9f5c5db580bfb5745ceb6240d61ad Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5789 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-11-15Add CMSIS-DAP v2 supportMickaël Thomas7-182/+755
This change implements CMSIS-DAP v2 which works with raw USB bulk transfers. The old driver is now split into a generic CMSIS part and a HID backend, with a new raw USB backend for CMSIS-DAP v2. New commands: - cmsis_dap_backend (usb_bulk | hid | auto) - cmsis_dap_usb interface <interface number> Change-Id: I4218477b12ccbfe19c9b332321cd21394bf44e30 Signed-off-by: Mickaël Thomas <mickael9@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4831 Tested-by: jenkins
2020-11-15target/armv7m, cortex_m: fix misleading commentsTomas Vanek2-6/+9
Change-Id: I4fea29f07f4d3b8b2578b538ef0eef5f1eea285f Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5876 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15flash/nor/psoc6: remove setting of xPSR.T bit from sromalgo_prepare()Tomas Vanek1-6/+0
PSoC6 erases flash to 0x00 not more common 0xff, so a device with erased flash loads xPSR.T=0 from the zeroed reset vector. Wrong thumb bit value caused a target algorithm failed with HardFault. The low level write to xPSR solved the problem only if xPSR cached copy was not marked dirty. Later commit 49bd64347a21f5e12b33c256171b3035126d1260 fixed T setting for all Cortex-M target algorithms. Since 49bd64 this part of code is useless as xPSR target_start_algorithm() sets always xPSR dirty so the effect of the low level write is eliminated (and proper setting of thumb bit is ensured in target_start_algorithm()) Change-Id: I68aea5e921fbc6203f2fe91a45f10d22869327de Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5875 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15target/cortex_m: remove wrong xPSR.ICI/IT bits handlingTomas Vanek1-6/+0
If a Cortex-M (not M0, M0+) target was stopped in the middle of a conditional IT block or in the load/store multiple instruction, cortex_m_debug_entry() used wrong xPSR bits to detect it and then cleared 8 bits of the exception number from xPSR - probably wrong bit mask again. I believe clearing of the ICI/IT bits in cortex_m_debug_entry() has no reason as Cortex-M does not use instruction injecting. Remove the wrong code. The change was originally a part of http://openocd.zylin.com/4862 It is now re-submitted as #4862 is not ready. Change-Id: If91cd91d1b81b2684f7d5f10cf20452cde1a7f56 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5874 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15target/armv7m: use arch_info[i].value instead of allocated memoryTomas Vanek2-6/+1
Change-Id: I9422cab484d0769404516947e16da1baa001a4e0 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5328 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15cortex_m: use the new enum ARMV7M_REGSEL_nameAntonio Borneo2-2/+2
Register xPSR is indexed directly with its value 16 or with the incorrect enum ARMV7M_xPSR. Replace them with the new enum ARMV7M_REGSEL_xPSR. Change-Id: I86600e7f78e39002ce45f66d4792d5067c1f541b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5873 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15stlink: handle read/write FPU registers in HLA APIAntonio Borneo1-0/+21
Old stlink firmware in stlink V1 and stlink V2 pre-J15 do not handle FPU registers in the read_reg() and write_reg() API. Add code to be compatible with the new API of OpenOCD. Change-Id: Ib0439c5294b6911ea75efe8c7fa085b014317a4b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5883 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15hla: API: specify that read_reg/write_reg use regsel as parameterAntonio Borneo4-16/+31
The API of hla have been defined from ST-Link basic operations. By chance, all the current implementation of hla (st-link, ti-icdi and nulink) share the same way to handle the parameter 'num' of the API read_reg() and write_reg(), that is simply using it to initialize the field REGSEL (bits [6:0]) of armv7m Debug Core Register Selector Register (DCRSR). Add a comment in the API definition to highlight this, in case it get used by a further hla implementation, then rename as 'regsel' the 'num' parameter. Change-Id: I4b6a2c7d78b4fc4de2b9b2bdba065414b15c6ba3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5882 Reviewed-by: Edward Fewell <edwardfewell@hotmail.com> Tested-by: jenkins Reviewed-by: Zale Yu Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15target/cortex_m,hla_target: rework Cortex-M register handling part 4Tomas Vanek2-227/+8
Consolidate low level register read/write. Floating point registers were handled by target_read/write_u32 unlike other registers handled by cortexm_dap_read/write_coreregister_u32 There is no reason to do so in cortex_m. Remove cortexm_dap_read/write_coreregister_u32 and use cortex_m_load/store_core_reg_u32 directly. Similarly HLA adapters register read/write interface supports all registers so use it for any floating point and other registers. Change-Id: Ida679e5f4fec02d94ffb0bd3f265ed7ed2221cdc Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5864 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15target/armv7m: rework Cortex-M register handling part 3Tomas Vanek4-165/+159
Move primask/basepri/faultmask/control packing/unpacking from cortex_m.c and hla_target.c to armv7m.c armv7m_read_core_reg() and armv7m_write_core_reg() where also the FP 32/64-bit registers conversion takes place. Introduce a new hidden register ARMV7M_PMSK_BPRI_FLTMSK_CTRL for packing/unpacking of special registers in the register cache. The new packing/unpacking is endianess safe. While on it improve returned error codes and LOG_ messages. Just minimal changes in cortex_m.c and hla_target.c, will be consolidated in the next patch. Change-Id: Id51e764e243e54b5fdaadf2a202eee7c4bc729fe Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5863 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15target/armv7m: rework Cortex-M register handling part 2Tomas Vanek2-37/+3
Make arm register id coherent with reg_list index. Without this reg_list[ARMV7M_R12] was possible but reg_list[ARMV7M_FPSCR] was out of bounds. Remove unused items from reg_list index. Change-Id: I84d3b5c496fc1839d07a5b74cb1fd1c3d4ff8989 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5862 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15target/armv7m: rework Cortex-M register handling part 1Tomas Vanek4-107/+194
Define a new enum with DCRSR.REGSEL selectors. Introduce armv7m_map_id_to_regsel() to unify mapping in one place. Use DCRSR.REGSEL selectors for low level register read/write. Change-Id: Ida0ccdfa9cdb1257a1900b8bfbf172b076374d39 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5327 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15target, register: allow a register hidden from gdb and 'reg' cmdTomas Vanek4-6/+8
Introduce a 'hidden' flag in struct reg to support a register cache containing different views of same data: e.g. Cortex-M has primask, basepri, faultmask and control registers accessed as one word. With the hidden flag we can add an reg_list item corresponding to hw access without exposing the register to user level. All the struct reg are allocated with calloc() but one in xscale.c allocated by malloc(). Change this one to use calloc() as well to guarantee initial value hidden=false Change-Id: I8da9f5a5a60777ae7ef943a841307487bd80fc6f Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5325 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15flash/stmqspi: minor fixes on coding styleAntonio Borneo4-118/+115
Add space around operators; use BIT() macro in place of left shifting constant 1; remove space between cast operator and value; do not check a pointer before free() it; add parenthesis around parameters in macros; fix indentation using only TABs; remove line continuation '\' at code lines out of macros. Change-Id: I809e8ee72d7bfe49d0edf10afb36efe2458de77c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: e44539d66c89 ("Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface") Reviewed-on: http://openocd.zylin.com/5932 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15tcl/board: rename board file ST b-l475e-iot01aAntonio Borneo1-0/+2
Use the board file name as <company>_<name>.cfg Add the SPDX tag to workaround an error in checkpatch that fails to recognize as valid a patch that only changes a file name. Change-Id: I929cd9e5f9fe2e7386950643487534c9a5a05bc6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: e44539d66c89 ("Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface") Reviewed-on: http://openocd.zylin.com/5931 Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Tested-by: jenkins
2020-11-11target/cortex_m: Change sleep to running stateKevin Yang2-7/+3
When the core is in sleep mode, the core is no longer retiring instructions. Cortext M remains in "unknown" state. This patch converts sleep mode to "running" state. Change-Id: I1e9b6c9be51fd0f1f6ce81af9b1f5f9f1f43c661 Signed-off-by: Kevin Yang <kangyang@google.com> Reviewed-on: http://openocd.zylin.com/5921 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2020-11-08Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interfaceAndreas Bolsch57-33/+6709
- write speed up to 150 kByte/s on STM32F469I-disco (due to SWD clock and USB connection), up to 1 MByte/s on Nucleo-F767ZI with external STLink-V3 or Nucleo-G474RE with two W25Q256FV in dual 4-line mode or STM32H73BI-Disco in octal mode - tested with STM32L476G-disco (64MBit flash, 3-byte addr), STM32F412G-Disco, STM32F469I-Disco, STM32F746G-Disco, and STM32L476G-Disco (all 128Mbit flash, 3-byte addr), STM32F723E-Disco, STM32F769I-Disco (512Mbit flash, 4-byte addr) STM32L4R9I-Disco, STM32L4P5G-Disco (512MBit octo-flash, DTR, 4-byte addr) STM32H745I-Disco, STM32H747I-Disco (two 512MBit flash, 4-byte addr) STM32H73BI-Disco, STM32H735G-Disco (512MBit octo-flash, DTR, 4-byte addr) - suitable cfg for Discovery boards included - limited parsing of SFDP data if flash device not hardcoded (tested only in single/quad mode as most devices either don't support SFDP at all or have empty(!) SFDP memory) - 'set' command for auto detection override (e. g. for EEPROMs) - 'cmd' command for arbitrary SPI commands (reconfiguration, testing etc.) - makefile for creation of binary loader files - tcl/board/stm32f469discovery.cfg superseded by stm32f469i-disco.cfg - tcl/board/stm32f7discovery.cfg removed as name is ambiguous (superseded by stm32f746g-disco.cfg vs. stm32f769i-disco.cfg) - dual 4-line mode tested on Nucleo-F767ZI, Nucleo-H743ZI and Nucleo-H7A3ZI-Q with two W25Q256FV, and on Nucleo-L496ZP-P and Nucleo-L4R5ZI with two W25Q128FV, sample cfg files included and on STM32H745I-Disco, STM32H747I-Disco, STM32H750B-Disco - read/verify/erase_check uses indirect read mode to work around silicon bug in H7, L4+ and MP1 memory mapped mode (last bytes not readable, accessing last bytes causes debug interface to hang) - octospi supported only in single/dual 1-line, 2-line, 4-line and single 8-line modes, (not in hyper flash mode) Requirements: GPIOs must be initialized appropriately, and SPI flash chip be configured appropriately (1-line ..., QPI, 4-byte addresses ...). This is board/chip specific, cf. included cfg files. The driver infers most parameters from current setting in CR, CCR, ... registers. Change-Id: I54858fbbe8758c3a5fe58812e93f5f39514704f8 Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-on: http://openocd.zylin.com/4321 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-07stlink: fix computation of trace prescalerAntonio Borneo1-6/+10
Use integer rounding for the computation of prescaler. Improve the test of prescaler range, knowing its value would be decremented before being written in TPIU ACPR. Change-Id: I041dde1dca41323904e36a6b6975028a6de902b3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5909 Tested-by: jenkins
2020-11-07stlink: fix max SWV baudrate on stlink v3Antonio Borneo1-3/+7
While stlink v2 anly accept till to 2 MHz for SWV baudrate, stlink v3 accepts up to 24 MHz. Check the stlink version and use the respective max value. Change-Id: I911207a35983b6acf0b901059076dd31f70e6290 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reported-by: Pawel <phryniszak@users.sourceforge.net> Fixes: https://sourceforge.net/p/openocd/tickets/283/ Reviewed-on: http://openocd.zylin.com/5908 Tested-by: jenkins
generated by cgit v1.1 at 2024-07-19 11:34:17 +0000